2 * linux/arch/i386/traps.c
4 * Copyright (C) 1991, 1992 Linus Torvalds
6 * Pentium III FXSR, SSE support
7 * Gareth Hughes <gareth@valinux.com>, May 2000
11 * 'Traps.c' handles hardware traps and faults after we have saved some
14 #include <linux/config.h>
15 #include <linux/sched.h>
16 #include <linux/kernel.h>
17 #include <linux/string.h>
18 #include <linux/errno.h>
19 #include <linux/timer.h>
21 #include <linux/init.h>
22 #include <linux/delay.h>
23 #include <linux/spinlock.h>
24 #include <linux/interrupt.h>
25 #include <linux/highmem.h>
26 #include <linux/kallsyms.h>
27 #include <linux/ptrace.h>
28 #include <linux/version.h>
29 #include <linux/dump.h>
30 #include <linux/kprobes.h>
33 #include <linux/ioport.h>
34 #include <linux/eisa.h>
38 #include <linux/mca.h>
41 #include <asm/processor.h>
42 #include <asm/system.h>
43 #include <asm/uaccess.h>
45 #include <asm/atomic.h>
46 #include <asm/debugreg.h>
52 #include <asm/arch_hooks.h>
53 #include <asm/kdebug.h>
55 #include <linux/irq.h>
56 #include <linux/module.h>
58 #include "mach_traps.h"
60 asmlinkage int system_call(void);
61 asmlinkage void lcall7(void);
62 asmlinkage void lcall27(void);
64 struct desc_struct default_ldt[] = { { 0, 0 }, { 0, 0 }, { 0, 0 },
67 /* Do we ignore FPU interrupts ? */
68 char ignore_fpu_irq = 0;
71 * The IDT has to be page-aligned to simplify the Pentium
72 * F0 0F bug workaround.. We have a special link segment
75 struct desc_struct idt_table[256] __attribute__((__section__(".data.idt"))) = { {0, 0}, };
77 asmlinkage void divide_error(void);
78 asmlinkage void debug(void);
79 asmlinkage void nmi(void);
80 asmlinkage void int3(void);
81 asmlinkage void overflow(void);
82 asmlinkage void bounds(void);
83 asmlinkage void invalid_op(void);
84 asmlinkage void device_not_available(void);
85 asmlinkage void coprocessor_segment_overrun(void);
86 asmlinkage void invalid_TSS(void);
87 asmlinkage void segment_not_present(void);
88 asmlinkage void stack_segment(void);
89 asmlinkage void general_protection(void);
90 asmlinkage void page_fault(void);
91 asmlinkage void coprocessor_error(void);
92 asmlinkage void simd_coprocessor_error(void);
93 asmlinkage void alignment_check(void);
94 asmlinkage void spurious_interrupt_bug(void);
95 asmlinkage void machine_check(void);
97 static int kstack_depth_to_print = 24;
98 struct notifier_block *i386die_chain;
99 static spinlock_t die_notifier_lock = SPIN_LOCK_UNLOCKED;
101 int register_die_notifier(struct notifier_block *nb)
105 spin_lock_irqsave(&die_notifier_lock, flags);
106 err = notifier_chain_register(&i386die_chain, nb);
107 spin_unlock_irqrestore(&die_notifier_lock, flags);
111 static inline int valid_stack_ptr(struct thread_info *tinfo, void *p)
113 return p > (void *)tinfo &&
114 p < (void *)tinfo + THREAD_SIZE - 3;
117 static inline unsigned long print_context_stack(struct thread_info *tinfo,
118 unsigned long *stack, unsigned long ebp)
122 #ifdef CONFIG_FRAME_POINTER
123 while (valid_stack_ptr(tinfo, (void *)ebp)) {
124 addr = *(unsigned long *)(ebp + 4);
125 printk(" [<%08lx>] ", addr);
126 print_symbol("%s", addr);
128 ebp = *(unsigned long *)ebp;
131 while (valid_stack_ptr(tinfo, stack)) {
133 if (__kernel_text_address(addr)) {
134 printk(" [<%08lx>]", addr);
135 print_symbol(" %s", addr);
143 void show_trace(struct task_struct *task, unsigned long * stack)
150 if (task == current) {
151 /* Grab ebp right from our regs */
152 asm ("movl %%ebp, %0" : "=r" (ebp) : );
154 /* ebp is the last reg pushed by switch_to */
155 ebp = *(unsigned long *) task->thread.esp;
159 struct thread_info *context;
160 context = (struct thread_info *)
161 ((unsigned long)stack & (~(THREAD_SIZE - 1)));
162 ebp = print_context_stack(context, stack, ebp);
163 stack = (unsigned long*)context->previous_esp;
166 printk(" =======================\n");
170 void show_stack(struct task_struct *task, unsigned long *esp)
172 unsigned long *stack;
177 esp = (unsigned long*)task->thread.esp;
179 esp = (unsigned long *)&esp;
183 for(i = 0; i < kstack_depth_to_print; i++) {
184 if (kstack_end(stack))
186 if (i && ((i % 8) == 0))
188 printk("%08lx ", *stack++);
190 printk("\nCall Trace:\n");
191 show_trace(task, esp);
195 * The architecture-independent dump_stack generator
197 void dump_stack(void)
201 show_trace(current, &stack);
204 EXPORT_SYMBOL(dump_stack);
206 void show_registers(struct pt_regs *regs)
213 esp = (unsigned long) (®s->esp);
218 ss = regs->xss & 0xffff;
221 printk("CPU: %d\nEIP: %04x:[<%08lx>] %s VLI\nEFLAGS: %08lx"
223 smp_processor_id(), 0xffff & regs->xcs, regs->eip,
224 print_tainted(), regs->eflags, UTS_RELEASE);
225 print_symbol("EIP is at %s\n", regs->eip);
226 printk("eax: %08lx ebx: %08lx ecx: %08lx edx: %08lx\n",
227 regs->eax, regs->ebx, regs->ecx, regs->edx);
228 printk("esi: %08lx edi: %08lx ebp: %08lx esp: %08lx\n",
229 regs->esi, regs->edi, regs->ebp, esp);
230 printk("ds: %04x es: %04x ss: %04x\n",
231 regs->xds & 0xffff, regs->xes & 0xffff, ss);
232 printk("Process %s (pid: %d, threadinfo=%p task=%p)",
233 current->comm, current->pid, current_thread_info(), current);
235 * When in-kernel, we also print out the stack and code at the
236 * time of the fault..
242 show_stack(NULL, (unsigned long*)esp);
246 eip = (u8 *)regs->eip - 43;
247 for (i = 0; i < 64; i++, eip++) {
250 if (eip < (u8 *)PAGE_OFFSET || __get_user(c, eip)) {
251 printk(" Bad EIP value.");
254 if (eip == (u8 *)regs->eip)
255 printk("<%02x> ", c);
263 static void handle_BUG(struct pt_regs *regs)
272 goto no_bug; /* Not in kernel */
276 if (eip < PAGE_OFFSET)
278 if (__get_user(ud2, (unsigned short *)eip))
282 if (__get_user(line, (unsigned short *)(eip + 2)))
284 if (__get_user(file, (char **)(eip + 4)) ||
285 (unsigned long)file < PAGE_OFFSET || __get_user(c, file))
286 file = "<bad filename>";
288 printk("------------[ cut here ]------------\n");
289 printk(KERN_ALERT "kernel BUG at %s:%d!\n", file, line);
294 /* Here we know it was a BUG but file-n-line is unavailable */
296 printk("Kernel BUG\n");
299 void die(const char * str, struct pt_regs * regs, long err)
304 int lock_owner_depth;
306 .lock = SPIN_LOCK_UNLOCKED,
308 .lock_owner_depth = 0
310 static int die_counter;
312 if (die.lock_owner != smp_processor_id()) {
314 spin_lock_irq(&die.lock);
315 die.lock_owner = smp_processor_id();
316 die.lock_owner_depth = 0;
320 if (++die.lock_owner_depth < 3) {
323 printk(KERN_ALERT "%s: %04lx [#%d]\n", str, err & 0xffff, ++die_counter);
324 #ifdef CONFIG_PREEMPT
332 #ifdef CONFIG_DEBUG_PAGEALLOC
333 printk("DEBUG_PAGEALLOC");
338 notify_die(DIE_OOPS, (char *)str, regs, err, 255, SIGSEGV);
339 show_registers(regs);
340 #warning MEF netdump_func not part of 2.6.9-1.11-FC2; taking out call for now
345 dump((char *)str, regs);
347 printk(KERN_ERR "Recursive die() failure, output suppressed\n");
351 spin_unlock_irq(&die.lock);
353 panic("Fatal exception in interrupt");
356 printk(KERN_EMERG "Fatal exception: panic in 5 seconds\n");
357 set_current_state(TASK_UNINTERRUPTIBLE);
358 schedule_timeout(5 * HZ);
359 panic("Fatal exception");
364 static inline void die_if_kernel(const char * str, struct pt_regs * regs, long err)
366 if (!(regs->eflags & VM_MASK) && !(3 & regs->xcs))
370 static inline unsigned long get_cr2(void)
372 unsigned long address;
374 /* get the address */
375 __asm__("movl %%cr2,%0":"=r" (address));
379 static inline void do_trap(int trapnr, int signr, char *str, int vm86,
380 struct pt_regs * regs, long error_code, siginfo_t *info)
382 if (regs->eflags & VM_MASK) {
388 if (!(regs->xcs & 3))
392 struct task_struct *tsk = current;
393 tsk->thread.error_code = error_code;
394 tsk->thread.trap_no = trapnr;
396 force_sig_info(signr, info, tsk);
398 force_sig(signr, tsk);
403 if (!fixup_exception(regs))
404 die(str, regs, error_code);
409 int ret = handle_vm86_trap((struct kernel_vm86_regs *) regs, error_code, trapnr);
410 if (ret) goto trap_signal;
415 #define DO_ERROR(trapnr, signr, str, name) \
416 asmlinkage void do_##name(struct pt_regs * regs, long error_code) \
418 if (notify_die(DIE_TRAP, str, regs, error_code, trapnr, signr) \
421 do_trap(trapnr, signr, str, 0, regs, error_code, NULL); \
424 #define DO_ERROR_INFO(trapnr, signr, str, name, sicode, siaddr) \
425 asmlinkage void do_##name(struct pt_regs * regs, long error_code) \
428 info.si_signo = signr; \
430 info.si_code = sicode; \
431 info.si_addr = (void __user *)siaddr; \
432 if (notify_die(DIE_TRAP, str, regs, error_code, trapnr, signr) \
435 do_trap(trapnr, signr, str, 0, regs, error_code, &info); \
438 #define DO_VM86_ERROR(trapnr, signr, str, name) \
439 asmlinkage void do_##name(struct pt_regs * regs, long error_code) \
441 if (notify_die(DIE_TRAP, str, regs, error_code, trapnr, signr) \
444 do_trap(trapnr, signr, str, 1, regs, error_code, NULL); \
447 #define DO_VM86_ERROR_INFO(trapnr, signr, str, name, sicode, siaddr) \
448 asmlinkage void do_##name(struct pt_regs * regs, long error_code) \
451 info.si_signo = signr; \
453 info.si_code = sicode; \
454 info.si_addr = (void __user *)siaddr; \
455 if (notify_die(DIE_TRAP, str, regs, error_code, trapnr, signr) \
458 do_trap(trapnr, signr, str, 1, regs, error_code, &info); \
461 DO_VM86_ERROR_INFO( 0, SIGFPE, "divide error", divide_error, FPE_INTDIV, regs->eip)
462 #ifndef CONFIG_KPROBES
463 DO_VM86_ERROR( 3, SIGTRAP, "int3", int3)
465 DO_VM86_ERROR( 4, SIGSEGV, "overflow", overflow)
466 DO_VM86_ERROR( 5, SIGSEGV, "bounds", bounds)
467 DO_ERROR_INFO( 6, SIGILL, "invalid operand", invalid_op, ILL_ILLOPN, regs->eip)
468 DO_ERROR( 9, SIGFPE, "coprocessor segment overrun", coprocessor_segment_overrun)
469 DO_ERROR(10, SIGSEGV, "invalid TSS", invalid_TSS)
470 DO_ERROR(11, SIGBUS, "segment not present", segment_not_present)
471 DO_ERROR(12, SIGBUS, "stack segment", stack_segment)
472 DO_ERROR_INFO(17, SIGBUS, "alignment check", alignment_check, BUS_ADRALN, 0)
475 * the original non-exec stack patch was written by
476 * Solar Designer <solar at openwall.com>. Thanks!
478 asmlinkage void do_general_protection(struct pt_regs * regs, long error_code)
481 struct tss_struct *tss = &per_cpu(init_tss, cpu);
482 struct thread_struct *thread = ¤t->thread;
485 * Perform the lazy TSS's I/O bitmap copy. If the TSS has an
486 * invalid offset set (the LAZY one) and the faulting thread has
487 * a valid I/O bitmap pointer, we copy the I/O bitmap in the TSS
488 * and we set the offset field correctly. Then we let the CPU to
489 * restart the faulting instruction.
491 if (tss->io_bitmap_base == INVALID_IO_BITMAP_OFFSET_LAZY &&
492 thread->io_bitmap_ptr) {
493 memcpy(tss->io_bitmap, thread->io_bitmap_ptr,
494 thread->io_bitmap_max);
496 * If the previously set map was extending to higher ports
497 * than the current one, pad extra space with 0xff (no access).
499 if (thread->io_bitmap_max < tss->io_bitmap_max)
500 memset((char *) tss->io_bitmap +
501 thread->io_bitmap_max, 0xff,
502 tss->io_bitmap_max - thread->io_bitmap_max);
503 tss->io_bitmap_max = thread->io_bitmap_max;
504 tss->io_bitmap_base = IO_BITMAP_OFFSET;
510 if (regs->eflags & VM_MASK)
513 if (!(regs->xcs & 3))
517 * lazy-check for CS validity on exec-shield binaries:
520 int cpu = smp_processor_id();
521 struct desc_struct *desc1, *desc2;
522 struct vm_area_struct *vma;
523 unsigned long limit = 0;
525 spin_lock(¤t->mm->page_table_lock);
526 for (vma = current->mm->mmap; vma; vma = vma->vm_next)
527 if ((vma->vm_flags & VM_EXEC) && (vma->vm_end > limit))
529 spin_unlock(¤t->mm->page_table_lock);
531 current->mm->context.exec_limit = limit;
532 set_user_cs(¤t->mm->context.user_cs, limit);
534 desc1 = ¤t->mm->context.user_cs;
535 desc2 = per_cpu(cpu_gdt_table, cpu) + GDT_ENTRY_DEFAULT_USER_CS;
538 * The CS was not in sync - reload it and retry the
539 * instruction. If the instruction still faults then
540 * we wont hit this branch next time around.
542 if (desc1->a != desc2->a || desc1->b != desc2->b) {
543 if (print_fatal_signals >= 2) {
544 printk("#GPF fixup (%ld[seg:%lx]) at %08lx, CPU#%d.\n", error_code, error_code/8, regs->eip, smp_processor_id());
545 printk(" exec_limit: %08lx, user_cs: %08lx/%08lx, CPU_cs: %08lx/%08lx.\n", current->mm->context.exec_limit, desc1->a, desc1->b, desc2->a, desc2->b);
547 load_user_cs_desc(cpu, current->mm);
551 if (print_fatal_signals) {
552 printk("#GPF(%ld[seg:%lx]) at %08lx, CPU#%d.\n", error_code, error_code/8, regs->eip, smp_processor_id());
553 printk(" exec_limit: %08lx, user_cs: %08lx/%08lx.\n", current->mm->context.exec_limit, current->mm->context.user_cs.a, current->mm->context.user_cs.b);
556 current->thread.error_code = error_code;
557 current->thread.trap_no = 13;
558 force_sig(SIGSEGV, current);
563 handle_vm86_fault((struct kernel_vm86_regs *) regs, error_code);
567 if (!fixup_exception(regs)) {
568 if (notify_die(DIE_GPF, "general protection fault", regs,
569 error_code, 13, SIGSEGV) == NOTIFY_STOP);
571 die("general protection fault", regs, error_code);
575 static void mem_parity_error(unsigned char reason, struct pt_regs * regs)
577 printk("Uhhuh. NMI received. Dazed and confused, but trying to continue\n");
578 printk("You probably have a hardware problem with your RAM chips\n");
580 /* Clear and disable the memory parity error line. */
581 clear_mem_error(reason);
584 static void io_check_error(unsigned char reason, struct pt_regs * regs)
588 printk("NMI: IOCK error (debug interrupt?)\n");
589 show_registers(regs);
591 /* Re-enable the IOCK line, wait for a few seconds */
592 reason = (reason & 0xf) | 8;
595 while (--i) udelay(1000);
600 static void unknown_nmi_error(unsigned char reason, struct pt_regs * regs)
603 /* Might actually be able to figure out what the guilty party
610 printk("Uhhuh. NMI received for unknown reason %02x on CPU %d.\n",
611 reason, smp_processor_id());
612 printk("Dazed and confused, but trying to continue\n");
613 printk("Do you have a strange power saving mode enabled?\n");
616 static spinlock_t nmi_print_lock = SPIN_LOCK_UNLOCKED;
618 void die_nmi (struct pt_regs *regs, const char *msg)
620 spin_lock(&nmi_print_lock);
622 * We are in trouble anyway, lets at least try
623 * to get a message out.
627 printk(" on CPU%d, eip %08lx, registers:\n",
628 smp_processor_id(), regs->eip);
629 show_registers(regs);
630 printk("console shuts up ...\n");
632 spin_unlock(&nmi_print_lock);
637 static void default_do_nmi(struct pt_regs * regs)
639 unsigned char reason = get_nmi_reason();
641 if (!(reason & 0xc0)) {
642 if (notify_die(DIE_NMI_IPI, "nmi_ipi", regs, reason, 0, SIGINT)
645 #ifdef CONFIG_X86_LOCAL_APIC
647 * Ok, so this is none of the documented NMI sources,
648 * so it must be the NMI watchdog.
651 nmi_watchdog_tick(regs);
655 unknown_nmi_error(reason, regs);
658 if (notify_die(DIE_NMI, "nmi", regs, reason, 0, SIGINT) == NOTIFY_STOP)
661 mem_parity_error(reason, regs);
663 io_check_error(reason, regs);
665 * Reassert NMI in case it became active meanwhile
666 * as it's edge-triggered.
671 static int dummy_nmi_callback(struct pt_regs * regs, int cpu)
676 static nmi_callback_t nmi_callback = dummy_nmi_callback;
678 asmlinkage void do_nmi(struct pt_regs * regs, long error_code)
684 cpu = smp_processor_id();
687 if (!nmi_callback(regs, cpu))
688 default_do_nmi(regs);
693 void set_nmi_callback(nmi_callback_t callback)
695 nmi_callback = callback;
698 void unset_nmi_callback(void)
700 nmi_callback = dummy_nmi_callback;
703 #ifdef CONFIG_KPROBES
704 asmlinkage int do_int3(struct pt_regs *regs, long error_code)
706 if (notify_die(DIE_INT3, "int3", regs, error_code, 3, SIGTRAP)
709 /* This is an interrupt gate, because kprobes wants interrupts
710 disabled. Normal trap handlers don't. */
711 restore_interrupts(regs);
712 do_trap(3, SIGTRAP, "int3", 1, regs, error_code, NULL);
718 * Our handling of the processor debug registers is non-trivial.
719 * We do not clear them on entry and exit from the kernel. Therefore
720 * it is possible to get a watchpoint trap here from inside the kernel.
721 * However, the code in ./ptrace.c has ensured that the user can
722 * only set watchpoints on userspace addresses. Therefore the in-kernel
723 * watchpoint trap can only occur in code which is reading/writing
724 * from user space. Such code must not hold kernel locks (since it
725 * can equally take a page fault), therefore it is safe to call
726 * force_sig_info even though that claims and releases locks.
728 * Code in ./signal.c ensures that the debug control register
729 * is restored before we deliver any signal, and therefore that
730 * user code runs with the correct debug control register even though
733 * Being careful here means that we don't have to be as careful in a
734 * lot of more complicated places (task switching can be a bit lazy
735 * about restoring all the debug state, and ptrace doesn't have to
736 * find every occurrence of the TF bit that could be saved away even
739 asmlinkage void do_debug(struct pt_regs * regs, long error_code)
741 unsigned int condition;
742 struct task_struct *tsk = current;
745 __asm__ __volatile__("movl %%db6,%0" : "=r" (condition));
747 if (notify_die(DIE_DEBUG, "debug", regs, condition, error_code,
748 SIGTRAP) == NOTIFY_STOP)
750 /* It's safe to allow irq's after DR6 has been saved */
751 if (regs->eflags & X86_EFLAGS_IF)
754 /* Mask out spurious debug traps due to lazy DR7 setting */
755 if (condition & (DR_TRAP0|DR_TRAP1|DR_TRAP2|DR_TRAP3)) {
756 if (!tsk->thread.debugreg[7])
760 if (regs->eflags & VM_MASK)
763 /* Save debug status register where ptrace can see it */
764 tsk->thread.debugreg[6] = condition;
766 /* Mask out spurious TF errors due to lazy TF clearing */
767 if (condition & DR_STEP) {
769 * The TF error should be masked out only if the current
770 * process is not traced and if the TRAP flag has been set
771 * previously by a tracing process (condition detected by
772 * the PT_DTRACE flag); remember that the i386 TRAP flag
773 * can be modified by the process itself in user mode,
774 * allowing programs to debug themselves without the ptrace()
777 if ((regs->xcs & 3) == 0)
778 goto clear_TF_reenable;
779 if ((tsk->ptrace & (PT_DTRACE|PT_PTRACED)) == PT_DTRACE)
783 /* Ok, finally something we can handle */
784 tsk->thread.trap_no = 1;
785 tsk->thread.error_code = error_code;
786 info.si_signo = SIGTRAP;
788 info.si_code = TRAP_BRKPT;
790 /* If this is a kernel mode trap, save the user PC on entry to
791 * the kernel, that's what the debugger can make sense of.
793 info.si_addr = ((regs->xcs & 3) == 0) ? (void __user *)tsk->thread.eip
794 : (void __user *)regs->eip;
795 force_sig_info(SIGTRAP, &info, tsk);
797 /* Disable additional traps. They'll be re-enabled when
798 * the signal is delivered.
801 __asm__("movl %0,%%db7"
807 handle_vm86_trap((struct kernel_vm86_regs *) regs, error_code, 1);
811 set_tsk_thread_flag(tsk, TIF_SINGLESTEP);
813 regs->eflags &= ~TF_MASK;
818 * Note that we play around with the 'TS' bit in an attempt to get
819 * the correct behaviour even in the presence of the asynchronous
822 void math_error(void __user *eip)
824 struct task_struct * task;
826 unsigned short cwd, swd;
829 * Save the info for the exception handler and clear the error.
833 task->thread.trap_no = 16;
834 task->thread.error_code = 0;
835 info.si_signo = SIGFPE;
837 info.si_code = __SI_FAULT;
840 * (~cwd & swd) will mask out exceptions that are not set to unmasked
841 * status. 0x3f is the exception bits in these regs, 0x200 is the
842 * C1 reg you need in case of a stack fault, 0x040 is the stack
843 * fault bit. We should only be taking one exception at a time,
844 * so if this combination doesn't produce any single exception,
845 * then we have a bad program that isn't syncronizing its FPU usage
846 * and it will suffer the consequences since we won't be able to
847 * fully reproduce the context of the exception
849 cwd = get_fpu_cwd(task);
850 swd = get_fpu_swd(task);
851 switch (((~cwd) & swd & 0x3f) | (swd & 0x240)) {
855 case 0x001: /* Invalid Op */
856 case 0x041: /* Stack Fault */
857 case 0x241: /* Stack Fault | Direction */
858 info.si_code = FPE_FLTINV;
859 /* Should we clear the SF or let user space do it ???? */
861 case 0x002: /* Denormalize */
862 case 0x010: /* Underflow */
863 info.si_code = FPE_FLTUND;
865 case 0x004: /* Zero Divide */
866 info.si_code = FPE_FLTDIV;
868 case 0x008: /* Overflow */
869 info.si_code = FPE_FLTOVF;
871 case 0x020: /* Precision */
872 info.si_code = FPE_FLTRES;
875 force_sig_info(SIGFPE, &info, task);
878 asmlinkage void do_coprocessor_error(struct pt_regs * regs, long error_code)
881 math_error((void __user *)regs->eip);
884 void simd_math_error(void __user *eip)
886 struct task_struct * task;
888 unsigned short mxcsr;
891 * Save the info for the exception handler and clear the error.
895 task->thread.trap_no = 19;
896 task->thread.error_code = 0;
897 info.si_signo = SIGFPE;
899 info.si_code = __SI_FAULT;
902 * The SIMD FPU exceptions are handled a little differently, as there
903 * is only a single status/control register. Thus, to determine which
904 * unmasked exception was caught we must mask the exception mask bits
905 * at 0x1f80, and then use these to mask the exception bits at 0x3f.
907 mxcsr = get_fpu_mxcsr(task);
908 switch (~((mxcsr & 0x1f80) >> 7) & (mxcsr & 0x3f)) {
912 case 0x001: /* Invalid Op */
913 info.si_code = FPE_FLTINV;
915 case 0x002: /* Denormalize */
916 case 0x010: /* Underflow */
917 info.si_code = FPE_FLTUND;
919 case 0x004: /* Zero Divide */
920 info.si_code = FPE_FLTDIV;
922 case 0x008: /* Overflow */
923 info.si_code = FPE_FLTOVF;
925 case 0x020: /* Precision */
926 info.si_code = FPE_FLTRES;
929 force_sig_info(SIGFPE, &info, task);
932 asmlinkage void do_simd_coprocessor_error(struct pt_regs * regs,
936 /* Handle SIMD FPU exceptions on PIII+ processors. */
938 simd_math_error((void __user *)regs->eip);
941 * Handle strange cache flush from user space exception
942 * in all other cases. This is undocumented behaviour.
944 if (regs->eflags & VM_MASK) {
945 handle_vm86_fault((struct kernel_vm86_regs *)regs,
949 die_if_kernel("cache flush denied", regs, error_code);
950 current->thread.trap_no = 19;
951 current->thread.error_code = error_code;
952 force_sig(SIGSEGV, current);
956 asmlinkage void do_spurious_interrupt_bug(struct pt_regs * regs,
960 /* No need to warn about this any longer. */
961 printk("Ignoring P6 Local APIC Spurious Interrupt Bug...\n");
966 * 'math_state_restore()' saves the current math information in the
967 * old math state array, and gets the new ones from the current task
969 * Careful.. There are problems with IBM-designed IRQ13 behaviour.
970 * Don't touch unless you *really* know how it works.
972 * Must be called with kernel preemption disabled (in this case,
973 * local interrupts are disabled at the call-site in entry.S).
975 asmlinkage void math_state_restore(struct pt_regs regs)
977 struct thread_info *thread = current_thread_info();
978 struct task_struct *tsk = thread->task;
980 clts(); /* Allow maths ops (or we recurse) */
984 thread->status |= TS_USEDFPU; /* So we fnsave on switch_to() */
987 #ifndef CONFIG_MATH_EMULATION
989 asmlinkage void math_emulate(long arg)
991 printk("math-emulation not enabled and no coprocessor found.\n");
992 printk("killing %s.\n",current->comm);
993 force_sig(SIGFPE,current);
997 #endif /* CONFIG_MATH_EMULATION */
999 #ifdef CONFIG_X86_F00F_BUG
1000 void __init trap_init_f00f_bug(void)
1002 __set_fixmap(FIX_F00F_IDT, __pa(&idt_table), PAGE_KERNEL_RO);
1005 * Update the IDT descriptor and reload the IDT so that
1006 * it uses the read-only mapped virtual address.
1008 idt_descr.address = fix_to_virt(FIX_F00F_IDT);
1009 __asm__ __volatile__("lidt %0" : : "m" (idt_descr));
1013 #define _set_gate(gate_addr,type,dpl,addr,seg) \
1016 __asm__ __volatile__ ("movw %%dx,%%ax\n\t" \
1017 "movw %4,%%dx\n\t" \
1018 "movl %%eax,%0\n\t" \
1020 :"=m" (*((long *) (gate_addr))), \
1021 "=m" (*(1+(long *) (gate_addr))), "=&a" (__d0), "=&d" (__d1) \
1022 :"i" ((short) (0x8000+(dpl<<13)+(type<<8))), \
1023 "3" ((char *) (addr)),"2" ((seg) << 16)); \
1028 * This needs to use 'idt_table' rather than 'idt', and
1029 * thus use the _nonmapped_ version of the IDT, as the
1030 * Pentium F0 0F bugfix can have resulted in the mapped
1031 * IDT being write-protected.
1033 void set_intr_gate(unsigned int n, void *addr)
1035 _set_gate(idt_table+n,14,0,addr,__KERNEL_CS);
1039 * This routine sets up an interrupt gate at directory privilege level 3.
1041 static inline void set_system_intr_gate(unsigned int n, void *addr)
1043 _set_gate(idt_table+n, 14, 3, addr, __KERNEL_CS);
1046 static void __init set_trap_gate(unsigned int n, void *addr)
1048 _set_gate(idt_table+n,15,0,addr,__KERNEL_CS);
1051 static void __init set_system_gate(unsigned int n, void *addr)
1053 _set_gate(idt_table+n,15,3,addr,__KERNEL_CS);
1056 static void __init set_call_gate(void *a, void *addr)
1058 _set_gate(a,12,3,addr,__KERNEL_CS);
1061 static void __init set_task_gate(unsigned int n, unsigned int gdt_entry)
1063 _set_gate(idt_table+n,5,0,0,(gdt_entry<<3));
1067 void __init trap_init(void)
1070 if (isa_readl(0x0FFFD9) == 'E'+('I'<<8)+('S'<<16)+('A'<<24)) {
1075 #ifdef CONFIG_X86_LOCAL_APIC
1076 init_apic_mappings();
1079 set_trap_gate(0,÷_error);
1080 set_intr_gate(1,&debug);
1081 set_intr_gate(2,&nmi);
1082 set_system_intr_gate(3, &int3); /* int3-5 can be called from all */
1083 set_system_gate(4,&overflow);
1084 set_system_gate(5,&bounds);
1085 set_trap_gate(6,&invalid_op);
1086 set_trap_gate(7,&device_not_available);
1087 set_task_gate(8,GDT_ENTRY_DOUBLEFAULT_TSS);
1088 set_trap_gate(9,&coprocessor_segment_overrun);
1089 set_trap_gate(10,&invalid_TSS);
1090 set_trap_gate(11,&segment_not_present);
1091 set_trap_gate(12,&stack_segment);
1092 set_trap_gate(13,&general_protection);
1093 set_intr_gate(14,&page_fault);
1094 set_trap_gate(15,&spurious_interrupt_bug);
1095 set_trap_gate(16,&coprocessor_error);
1096 set_trap_gate(17,&alignment_check);
1097 #ifdef CONFIG_X86_MCE
1098 set_trap_gate(18,&machine_check);
1100 set_trap_gate(19,&simd_coprocessor_error);
1102 set_system_gate(SYSCALL_VECTOR,&system_call);
1105 * default LDT is a single-entry callgate to lcall7 for iBCS
1106 * and a callgate to lcall27 for Solaris/x86 binaries
1109 set_call_gate(&default_ldt[0],lcall7);
1110 set_call_gate(&default_ldt[4],lcall27);
1113 * Should be a barrier for any external CPU state.