2 * direct.c - Low-level direct PCI config space access
6 #include <linux/init.h>
10 * Functions for accessing PCI configuration space with type 1 accesses
13 #define PCI_CONF1_ADDRESS(bus, devfn, reg) \
14 (0x80000000 | (bus << 16) | (devfn << 8) | (reg & ~3))
16 static int pci_conf1_read (int seg, int bus, int devfn, int reg, int len, u32 *value)
20 if (!value || (bus > 255) || (devfn > 255) || (reg > 255))
23 spin_lock_irqsave(&pci_config_lock, flags);
25 outl(PCI_CONF1_ADDRESS(bus, devfn, reg), 0xCF8);
29 *value = inb(0xCFC + (reg & 3));
32 *value = inw(0xCFC + (reg & 2));
39 spin_unlock_irqrestore(&pci_config_lock, flags);
44 static int pci_conf1_write (int seg, int bus, int devfn, int reg, int len, u32 value)
48 if ((bus > 255) || (devfn > 255) || (reg > 255))
51 spin_lock_irqsave(&pci_config_lock, flags);
53 outl(PCI_CONF1_ADDRESS(bus, devfn, reg), 0xCF8);
57 outb((u8)value, 0xCFC + (reg & 3));
60 outw((u16)value, 0xCFC + (reg & 2));
63 outl((u32)value, 0xCFC);
67 spin_unlock_irqrestore(&pci_config_lock, flags);
72 #undef PCI_CONF1_ADDRESS
74 struct pci_raw_ops pci_direct_conf1 = {
75 .read = pci_conf1_read,
76 .write = pci_conf1_write,
81 * Functions for accessing PCI configuration space with type 2 accesses
84 #define PCI_CONF2_ADDRESS(dev, reg) (u16)(0xC000 | (dev << 8) | reg)
86 static int pci_conf2_read(int seg, int bus, int devfn, int reg, int len, u32 *value)
91 if (!value || (bus > 255) || (devfn > 255) || (reg > 255))
94 dev = PCI_SLOT(devfn);
98 return PCIBIOS_DEVICE_NOT_FOUND;
100 spin_lock_irqsave(&pci_config_lock, flags);
102 outb((u8)(0xF0 | (fn << 1)), 0xCF8);
103 outb((u8)bus, 0xCFA);
107 *value = inb(PCI_CONF2_ADDRESS(dev, reg));
110 *value = inw(PCI_CONF2_ADDRESS(dev, reg));
113 *value = inl(PCI_CONF2_ADDRESS(dev, reg));
119 spin_unlock_irqrestore(&pci_config_lock, flags);
124 static int pci_conf2_write (int seg, int bus, int devfn, int reg, int len, u32 value)
129 if ((bus > 255) || (devfn > 255) || (reg > 255))
132 dev = PCI_SLOT(devfn);
133 fn = PCI_FUNC(devfn);
136 return PCIBIOS_DEVICE_NOT_FOUND;
138 spin_lock_irqsave(&pci_config_lock, flags);
140 outb((u8)(0xF0 | (fn << 1)), 0xCF8);
141 outb((u8)bus, 0xCFA);
145 outb((u8)value, PCI_CONF2_ADDRESS(dev, reg));
148 outw((u16)value, PCI_CONF2_ADDRESS(dev, reg));
151 outl((u32)value, PCI_CONF2_ADDRESS(dev, reg));
157 spin_unlock_irqrestore(&pci_config_lock, flags);
162 #undef PCI_CONF2_ADDRESS
164 static struct pci_raw_ops pci_direct_conf2 = {
165 .read = pci_conf2_read,
166 .write = pci_conf2_write,
171 * Before we decide to use direct hardware access mechanisms, we try to do some
172 * trivial checks to ensure it at least _seems_ to be working -- we just test
173 * whether bus 00 contains a host bridge (this is similar to checking
174 * techniques used in XFree86, but ours should be more reliable since we
175 * attempt to make use of direct access hints provided by the PCI BIOS).
177 * This should be close to trivial, but it isn't, because there are buggy
178 * chipsets (yes, you guessed it, by Intel and Compaq) that have no class ID.
180 static int __init pci_sanity_check(struct pci_raw_ops *o)
185 if (pci_probe & PCI_NO_CHECKS)
188 for (devfn = 0; devfn < 0x100; devfn++) {
189 if (o->read(0, 0, devfn, PCI_CLASS_DEVICE, 2, &x))
191 if (x == PCI_CLASS_BRIDGE_HOST || x == PCI_CLASS_DISPLAY_VGA)
194 if (o->read(0, 0, devfn, PCI_VENDOR_ID, 2, &x))
196 if (x == PCI_VENDOR_ID_INTEL || x == PCI_VENDOR_ID_COMPAQ)
200 DBG("PCI: Sanity check failed\n");
204 static int __init pci_check_type1(void)
210 local_irq_save(flags);
214 outl(0x80000000, 0xCF8);
215 if (inl(0xCF8) == 0x80000000 && pci_sanity_check(&pci_direct_conf1)) {
219 local_irq_restore(flags);
224 static int __init pci_check_type2(void)
229 local_irq_save(flags);
234 if (inb(0xCF8) == 0x00 && inb(0xCFA) == 0x00 &&
235 pci_sanity_check(&pci_direct_conf2)) {
239 local_irq_restore(flags);
244 static int __init pci_direct_init(void)
246 struct resource *region, *region2;
248 if ((pci_probe & PCI_PROBE_CONF1) == 0)
250 region = request_region(0xCF8, 8, "PCI conf1");
254 if (pci_check_type1()) {
255 printk(KERN_INFO "PCI: Using configuration type 1\n");
256 raw_pci_ops = &pci_direct_conf1;
259 release_resource(region);
262 if ((pci_probe & PCI_PROBE_CONF2) == 0)
264 region = request_region(0xCF8, 4, "PCI conf2");
267 region2 = request_region(0xC000, 0x1000, "PCI conf2");
271 if (pci_check_type2()) {
272 printk(KERN_INFO "PCI: Using configuration type 2\n");
273 raw_pci_ops = &pci_direct_conf2;
277 release_resource(region2);
279 release_resource(region);
285 arch_initcall(pci_direct_init);