2 * Low-Level PCI Support for PC -- Routing of Interrupts
4 * (c) 1999--2000 Martin Mares <mj@ucw.cz>
7 #include <linux/config.h>
8 #include <linux/types.h>
9 #include <linux/kernel.h>
10 #include <linux/pci.h>
11 #include <linux/init.h>
12 #include <linux/slab.h>
13 #include <linux/interrupt.h>
14 #include <linux/irq.h>
15 #include <linux/dmi.h>
18 #include <asm/io_apic.h>
19 #include <asm/hw_irq.h>
23 #define PIRQ_SIGNATURE (('$' << 0) + ('P' << 8) + ('I' << 16) + ('R' << 24))
24 #define PIRQ_VERSION 0x0100
26 static int broken_hp_bios_irq9;
27 static int acer_tm360_irqrouting;
29 static struct irq_routing_table *pirq_table;
32 * Never use: 0, 1, 2 (timer, keyboard, and cascade)
33 * Avoid using: 13, 14 and 15 (FP error and IDE).
34 * Penalize: 3, 4, 6, 7, 12 (known ISA uses: serial, floppy, parallel and mouse)
36 unsigned int pcibios_irq_mask = 0xfff8;
38 static int pirq_penalty[16] = {
39 1000000, 1000000, 1000000, 1000, 1000, 0, 1000, 1000,
40 0, 0, 0, 0, 1000, 100000, 100000, 100000
46 int (*get)(struct pci_dev *router, struct pci_dev *dev, int pirq);
47 int (*set)(struct pci_dev *router, struct pci_dev *dev, int pirq, int new);
50 struct irq_router_handler {
52 int (*probe)(struct irq_router *r, struct pci_dev *router, u16 device);
55 int (*pcibios_enable_irq)(struct pci_dev *dev) = NULL;
58 * Search 0xf0000 -- 0xfffff for the PCI IRQ Routing Table.
61 static struct irq_routing_table * __init pirq_find_routing_table(void)
64 struct irq_routing_table *rt;
68 for(addr = (u8 *) __va(0xf0000); addr < (u8 *) __va(0x100000); addr += 16) {
69 rt = (struct irq_routing_table *) addr;
70 if (rt->signature != PIRQ_SIGNATURE ||
71 rt->version != PIRQ_VERSION ||
73 rt->size < sizeof(struct irq_routing_table))
76 for(i=0; i<rt->size; i++)
79 DBG("PCI: Interrupt Routing Table found at 0x%p\n", rt);
87 * If we have a IRQ routing table, use it to search for peer host
88 * bridges. It's a gross hack, but since there are no other known
89 * ways how to get a list of buses, we have to go this way.
92 static void __init pirq_peer_trick(void)
94 struct irq_routing_table *rt = pirq_table;
99 memset(busmap, 0, sizeof(busmap));
100 for(i=0; i < (rt->size - sizeof(struct irq_routing_table)) / sizeof(struct irq_info); i++) {
105 DBG("%02x:%02x slot=%02x", e->bus, e->devfn/8, e->slot);
107 DBG(" %d:%02x/%04x", j, e->irq[j].link, e->irq[j].bitmap);
113 for(i = 1; i < 256; i++) {
114 if (!busmap[i] || pci_find_bus(0, i))
116 if (pci_scan_bus(i, &pci_root_ops, NULL))
117 printk(KERN_INFO "PCI: Discovered primary peer bus %02x [IRQ]\n", i);
119 pcibios_last_bus = -1;
123 * Code for querying and setting of IRQ routes on various interrupt routers.
126 void eisa_set_level_irq(unsigned int irq)
128 unsigned char mask = 1 << (irq & 7);
129 unsigned int port = 0x4d0 + (irq >> 3);
130 unsigned char val = inb(port);
134 outb(val | mask, port);
139 * Common IRQ routing practice: nybbles in config space,
140 * offset by some magic constant.
142 static unsigned int read_config_nybble(struct pci_dev *router, unsigned offset, unsigned nr)
145 unsigned reg = offset + (nr >> 1);
147 pci_read_config_byte(router, reg, &x);
148 return (nr & 1) ? (x >> 4) : (x & 0xf);
151 static void write_config_nybble(struct pci_dev *router, unsigned offset, unsigned nr, unsigned int val)
154 unsigned reg = offset + (nr >> 1);
156 pci_read_config_byte(router, reg, &x);
157 x = (nr & 1) ? ((x & 0x0f) | (val << 4)) : ((x & 0xf0) | val);
158 pci_write_config_byte(router, reg, x);
162 * ALI pirq entries are damn ugly, and completely undocumented.
163 * This has been figured out from pirq tables, and it's not a pretty
166 static int pirq_ali_get(struct pci_dev *router, struct pci_dev *dev, int pirq)
168 static unsigned char irqmap[16] = { 0, 9, 3, 10, 4, 5, 7, 6, 1, 11, 0, 12, 0, 14, 0, 15 };
170 return irqmap[read_config_nybble(router, 0x48, pirq-1)];
173 static int pirq_ali_set(struct pci_dev *router, struct pci_dev *dev, int pirq, int irq)
175 static unsigned char irqmap[16] = { 0, 8, 0, 2, 4, 5, 7, 6, 0, 1, 3, 9, 11, 0, 13, 15 };
176 unsigned int val = irqmap[irq];
179 write_config_nybble(router, 0x48, pirq-1, val);
186 * The Intel PIIX4 pirq rules are fairly simple: "pirq" is
187 * just a pointer to the config space.
189 static int pirq_piix_get(struct pci_dev *router, struct pci_dev *dev, int pirq)
193 pci_read_config_byte(router, pirq, &x);
194 return (x < 16) ? x : 0;
197 static int pirq_piix_set(struct pci_dev *router, struct pci_dev *dev, int pirq, int irq)
199 pci_write_config_byte(router, pirq, irq);
204 * The VIA pirq rules are nibble-based, like ALI,
205 * but without the ugly irq number munging.
206 * However, PIRQD is in the upper instead of lower 4 bits.
208 static int pirq_via_get(struct pci_dev *router, struct pci_dev *dev, int pirq)
210 return read_config_nybble(router, 0x55, pirq == 4 ? 5 : pirq);
213 static int pirq_via_set(struct pci_dev *router, struct pci_dev *dev, int pirq, int irq)
215 write_config_nybble(router, 0x55, pirq == 4 ? 5 : pirq, irq);
220 * ITE 8330G pirq rules are nibble-based
221 * FIXME: pirqmap may be { 1, 0, 3, 2 },
222 * 2+3 are both mapped to irq 9 on my system
224 static int pirq_ite_get(struct pci_dev *router, struct pci_dev *dev, int pirq)
226 static unsigned char pirqmap[4] = { 1, 0, 2, 3 };
227 return read_config_nybble(router,0x43, pirqmap[pirq-1]);
230 static int pirq_ite_set(struct pci_dev *router, struct pci_dev *dev, int pirq, int irq)
232 static unsigned char pirqmap[4] = { 1, 0, 2, 3 };
233 write_config_nybble(router, 0x43, pirqmap[pirq-1], irq);
238 * OPTI: high four bits are nibble pointer..
239 * I wonder what the low bits do?
241 static int pirq_opti_get(struct pci_dev *router, struct pci_dev *dev, int pirq)
243 return read_config_nybble(router, 0xb8, pirq >> 4);
246 static int pirq_opti_set(struct pci_dev *router, struct pci_dev *dev, int pirq, int irq)
248 write_config_nybble(router, 0xb8, pirq >> 4, irq);
253 * Cyrix: nibble offset 0x5C
254 * 0x5C bits 7:4 is INTB bits 3:0 is INTA
255 * 0x5D bits 7:4 is INTD bits 3:0 is INTC
257 static int pirq_cyrix_get(struct pci_dev *router, struct pci_dev *dev, int pirq)
259 return read_config_nybble(router, 0x5C, (pirq-1)^1);
262 static int pirq_cyrix_set(struct pci_dev *router, struct pci_dev *dev, int pirq, int irq)
264 write_config_nybble(router, 0x5C, (pirq-1)^1, irq);
269 * PIRQ routing for SiS 85C503 router used in several SiS chipsets.
270 * We have to deal with the following issues here:
271 * - vendors have different ideas about the meaning of link values
272 * - some onboard devices (integrated in the chipset) have special
273 * links and are thus routed differently (i.e. not via PCI INTA-INTD)
274 * - different revision of the router have a different layout for
275 * the routing registers, particularly for the onchip devices
277 * For all routing registers the common thing is we have one byte
278 * per routeable link which is defined as:
279 * bit 7 IRQ mapping enabled (0) or disabled (1)
280 * bits [6:4] reserved (sometimes used for onchip devices)
281 * bits [3:0] IRQ to map to
282 * allowed: 3-7, 9-12, 14-15
283 * reserved: 0, 1, 2, 8, 13
285 * The config-space registers located at 0x41/0x42/0x43/0x44 are
286 * always used to route the normal PCI INT A/B/C/D respectively.
287 * Apparently there are systems implementing PCI routing table using
288 * link values 0x01-0x04 and others using 0x41-0x44 for PCI INTA..D.
289 * We try our best to handle both link mappings.
291 * Currently (2003-05-21) it appears most SiS chipsets follow the
292 * definition of routing registers from the SiS-5595 southbridge.
293 * According to the SiS 5595 datasheets the revision id's of the
294 * router (ISA-bridge) should be 0x01 or 0xb0.
296 * Furthermore we've also seen lspci dumps with revision 0x00 and 0xb1.
297 * Looks like these are used in a number of SiS 5xx/6xx/7xx chipsets.
298 * They seem to work with the current routing code. However there is
299 * some concern because of the two USB-OHCI HCs (original SiS 5595
300 * had only one). YMMV.
302 * Onchip routing for router rev-id 0x01/0xb0 and probably 0x00/0xb1:
305 * bits [6:5] must be written 01
306 * bit 4 channel-select primary (0), secondary (1)
309 * bit 6 OHCI function disabled (0), enabled (1)
311 * 0x6a: ACPI/SCI IRQ: bits 4-6 reserved
313 * 0x7e: Data Acq. Module IRQ - bits 4-6 reserved
315 * We support USBIRQ (in addition to INTA-INTD) and keep the
316 * IDE, ACPI and DAQ routing untouched as set by the BIOS.
318 * Currently the only reported exception is the new SiS 65x chipset
319 * which includes the SiS 69x southbridge. Here we have the 85C503
320 * router revision 0x04 and there are changes in the register layout
321 * mostly related to the different USB HCs with USB 2.0 support.
323 * Onchip routing for router rev-id 0x04 (try-and-error observation)
325 * 0x60/0x61/0x62/0x63: 1xEHCI and 3xOHCI (companion) USB-HCs
326 * bit 6-4 are probably unused, not like 5595
329 #define PIRQ_SIS_IRQ_MASK 0x0f
330 #define PIRQ_SIS_IRQ_DISABLE 0x80
331 #define PIRQ_SIS_USB_ENABLE 0x40
333 static int pirq_sis_get(struct pci_dev *router, struct pci_dev *dev, int pirq)
339 if (reg >= 0x01 && reg <= 0x04)
341 pci_read_config_byte(router, reg, &x);
342 return (x & PIRQ_SIS_IRQ_DISABLE) ? 0 : (x & PIRQ_SIS_IRQ_MASK);
345 static int pirq_sis_set(struct pci_dev *router, struct pci_dev *dev, int pirq, int irq)
351 if (reg >= 0x01 && reg <= 0x04)
353 pci_read_config_byte(router, reg, &x);
354 x &= ~(PIRQ_SIS_IRQ_MASK | PIRQ_SIS_IRQ_DISABLE);
355 x |= irq ? irq: PIRQ_SIS_IRQ_DISABLE;
356 pci_write_config_byte(router, reg, x);
362 * VLSI: nibble offset 0x74 - educated guess due to routing table and
363 * config space of VLSI 82C534 PCI-bridge/router (1004:0102)
364 * Tested on HP OmniBook 800 covering PIRQ 1, 2, 4, 8 for onboard
365 * devices, PIRQ 3 for non-pci(!) soundchip and (untested) PIRQ 6
366 * for the busbridge to the docking station.
369 static int pirq_vlsi_get(struct pci_dev *router, struct pci_dev *dev, int pirq)
372 printk(KERN_INFO "VLSI router pirq escape (%d)\n", pirq);
375 return read_config_nybble(router, 0x74, pirq-1);
378 static int pirq_vlsi_set(struct pci_dev *router, struct pci_dev *dev, int pirq, int irq)
381 printk(KERN_INFO "VLSI router pirq escape (%d)\n", pirq);
384 write_config_nybble(router, 0x74, pirq-1, irq);
389 * ServerWorks: PCI interrupts mapped to system IRQ lines through Index
390 * and Redirect I/O registers (0x0c00 and 0x0c01). The Index register
391 * format is (PCIIRQ## | 0x10), e.g.: PCIIRQ10=0x1a. The Redirect
392 * register is a straight binary coding of desired PIC IRQ (low nibble).
394 * The 'link' value in the PIRQ table is already in the correct format
395 * for the Index register. There are some special index values:
396 * 0x00 for ACPI (SCI), 0x01 for USB, 0x02 for IDE0, 0x04 for IDE1,
397 * and 0x03 for SMBus.
399 static int pirq_serverworks_get(struct pci_dev *router, struct pci_dev *dev, int pirq)
402 return inb(0xc01) & 0xf;
405 static int pirq_serverworks_set(struct pci_dev *router, struct pci_dev *dev, int pirq, int irq)
412 /* Support for AMD756 PCI IRQ Routing
413 * Jhon H. Caicedo <jhcaiced@osso.org.co>
414 * Jun/21/2001 0.2.0 Release, fixed to use "nybble" functions... (jhcaiced)
415 * Jun/19/2001 Alpha Release 0.1.0 (jhcaiced)
416 * The AMD756 pirq rules are nibble-based
417 * offset 0x56 0-3 PIRQA 4-7 PIRQB
418 * offset 0x57 0-3 PIRQC 4-7 PIRQD
420 static int pirq_amd756_get(struct pci_dev *router, struct pci_dev *dev, int pirq)
426 irq = read_config_nybble(router, 0x56, pirq - 1);
428 printk(KERN_INFO "AMD756: dev %04x:%04x, router pirq : %d get irq : %2d\n",
429 dev->vendor, dev->device, pirq, irq);
433 static int pirq_amd756_set(struct pci_dev *router, struct pci_dev *dev, int pirq, int irq)
435 printk(KERN_INFO "AMD756: dev %04x:%04x, router pirq : %d SET irq : %2d\n",
436 dev->vendor, dev->device, pirq, irq);
439 write_config_nybble(router, 0x56, pirq - 1, irq);
444 #ifdef CONFIG_PCI_BIOS
446 static int pirq_bios_set(struct pci_dev *router, struct pci_dev *dev, int pirq, int irq)
448 struct pci_dev *bridge;
449 int pin = pci_get_interrupt_pin(dev, &bridge);
450 return pcibios_set_irq_routing(bridge, pin, irq);
456 static __init int intel_router_probe(struct irq_router *r, struct pci_dev *router, u16 device)
458 /* 440GX has a proprietary PIRQ router -- don't use it */
459 if ( pci_find_device(PCI_VENDOR_ID_INTEL,
460 PCI_DEVICE_ID_INTEL_82443GX_0, NULL) ||
461 pci_find_device(PCI_VENDOR_ID_INTEL,
462 PCI_DEVICE_ID_INTEL_82443GX_2, NULL))
467 case PCI_DEVICE_ID_INTEL_82371FB_0:
468 case PCI_DEVICE_ID_INTEL_82371SB_0:
469 case PCI_DEVICE_ID_INTEL_82371AB_0:
470 case PCI_DEVICE_ID_INTEL_82371MX:
471 case PCI_DEVICE_ID_INTEL_82443MX_0:
472 case PCI_DEVICE_ID_INTEL_82801AA_0:
473 case PCI_DEVICE_ID_INTEL_82801AB_0:
474 case PCI_DEVICE_ID_INTEL_82801BA_0:
475 case PCI_DEVICE_ID_INTEL_82801BA_10:
476 case PCI_DEVICE_ID_INTEL_82801CA_0:
477 case PCI_DEVICE_ID_INTEL_82801CA_12:
478 case PCI_DEVICE_ID_INTEL_82801DB_0:
479 case PCI_DEVICE_ID_INTEL_82801E_0:
480 case PCI_DEVICE_ID_INTEL_82801EB_0:
481 case PCI_DEVICE_ID_INTEL_ESB_1:
482 case PCI_DEVICE_ID_INTEL_ICH6_0:
483 case PCI_DEVICE_ID_INTEL_ICH6_1:
484 r->name = "PIIX/ICH";
485 r->get = pirq_piix_get;
486 r->set = pirq_piix_set;
492 static __init int via_router_probe(struct irq_router *r, struct pci_dev *router, u16 device)
494 /* FIXME: We should move some of the quirk fixup stuff here */
497 case PCI_DEVICE_ID_VIA_82C586_0:
498 case PCI_DEVICE_ID_VIA_82C596:
499 case PCI_DEVICE_ID_VIA_82C686:
500 case PCI_DEVICE_ID_VIA_8231:
501 /* FIXME: add new ones for 8233/5 */
503 r->get = pirq_via_get;
504 r->set = pirq_via_set;
510 static __init int vlsi_router_probe(struct irq_router *r, struct pci_dev *router, u16 device)
514 case PCI_DEVICE_ID_VLSI_82C534:
515 r->name = "VLSI 82C534";
516 r->get = pirq_vlsi_get;
517 r->set = pirq_vlsi_set;
524 static __init int serverworks_router_probe(struct irq_router *r, struct pci_dev *router, u16 device)
528 case PCI_DEVICE_ID_SERVERWORKS_OSB4:
529 case PCI_DEVICE_ID_SERVERWORKS_CSB5:
530 r->name = "ServerWorks";
531 r->get = pirq_serverworks_get;
532 r->set = pirq_serverworks_set;
538 static __init int sis_router_probe(struct irq_router *r, struct pci_dev *router, u16 device)
540 if (device != PCI_DEVICE_ID_SI_503)
544 r->get = pirq_sis_get;
545 r->set = pirq_sis_set;
549 static __init int cyrix_router_probe(struct irq_router *r, struct pci_dev *router, u16 device)
553 case PCI_DEVICE_ID_CYRIX_5520:
555 r->get = pirq_cyrix_get;
556 r->set = pirq_cyrix_set;
562 static __init int opti_router_probe(struct irq_router *r, struct pci_dev *router, u16 device)
566 case PCI_DEVICE_ID_OPTI_82C700:
568 r->get = pirq_opti_get;
569 r->set = pirq_opti_set;
575 static __init int ite_router_probe(struct irq_router *r, struct pci_dev *router, u16 device)
579 case PCI_DEVICE_ID_ITE_IT8330G_0:
581 r->get = pirq_ite_get;
582 r->set = pirq_ite_set;
588 static __init int ali_router_probe(struct irq_router *r, struct pci_dev *router, u16 device)
592 case PCI_DEVICE_ID_AL_M1533:
593 case PCI_DEVICE_ID_AL_M1563:
594 printk("PCI: Using ALI IRQ Router\n");
596 r->get = pirq_ali_get;
597 r->set = pirq_ali_set;
603 static __init int amd_router_probe(struct irq_router *r, struct pci_dev *router, u16 device)
607 case PCI_DEVICE_ID_AMD_VIPER_740B:
610 case PCI_DEVICE_ID_AMD_VIPER_7413:
613 case PCI_DEVICE_ID_AMD_VIPER_7443:
619 r->get = pirq_amd756_get;
620 r->set = pirq_amd756_set;
624 static __initdata struct irq_router_handler pirq_routers[] = {
625 { PCI_VENDOR_ID_INTEL, intel_router_probe },
626 { PCI_VENDOR_ID_AL, ali_router_probe },
627 { PCI_VENDOR_ID_ITE, ite_router_probe },
628 { PCI_VENDOR_ID_VIA, via_router_probe },
629 { PCI_VENDOR_ID_OPTI, opti_router_probe },
630 { PCI_VENDOR_ID_SI, sis_router_probe },
631 { PCI_VENDOR_ID_CYRIX, cyrix_router_probe },
632 { PCI_VENDOR_ID_VLSI, vlsi_router_probe },
633 { PCI_VENDOR_ID_SERVERWORKS, serverworks_router_probe },
634 { PCI_VENDOR_ID_AMD, amd_router_probe },
635 /* Someone with docs needs to add the ATI Radeon IGP */
638 static struct irq_router pirq_router;
639 static struct pci_dev *pirq_router_dev;
643 * FIXME: should we have an option to say "generic for
647 static void __init pirq_find_router(struct irq_router *r)
649 struct irq_routing_table *rt = pirq_table;
650 struct irq_router_handler *h;
652 #ifdef CONFIG_PCI_BIOS
653 if (!rt->signature) {
654 printk(KERN_INFO "PCI: Using BIOS for IRQ routing\n");
655 r->set = pirq_bios_set;
661 /* Default unless a driver reloads it */
666 DBG("PCI: Attempting to find IRQ router for %04x:%04x\n",
667 rt->rtr_vendor, rt->rtr_device);
669 pirq_router_dev = pci_find_slot(rt->rtr_bus, rt->rtr_devfn);
670 if (!pirq_router_dev) {
671 DBG("PCI: Interrupt router not found at %02x:%02x\n", rt->rtr_bus, rt->rtr_devfn);
675 for( h = pirq_routers; h->vendor; h++) {
676 /* First look for a router match */
677 if (rt->rtr_vendor == h->vendor && h->probe(r, pirq_router_dev, rt->rtr_device))
679 /* Fall back to a device match */
680 if (pirq_router_dev->vendor == h->vendor && h->probe(r, pirq_router_dev, pirq_router_dev->device))
683 printk(KERN_INFO "PCI: Using IRQ router %s [%04x/%04x] at %s\n",
685 pirq_router_dev->vendor,
686 pirq_router_dev->device,
687 pci_name(pirq_router_dev));
690 static struct irq_info *pirq_get_info(struct pci_dev *dev)
692 struct irq_routing_table *rt = pirq_table;
693 int entries = (rt->size - sizeof(struct irq_routing_table)) / sizeof(struct irq_info);
694 struct irq_info *info;
696 for (info = rt->slots; entries--; info++)
697 if (info->bus == dev->bus->number && PCI_SLOT(info->devfn) == PCI_SLOT(dev->devfn))
702 static int pcibios_lookup_irq(struct pci_dev *dev, int assign)
705 struct irq_info *info;
709 struct irq_router *r = &pirq_router;
710 struct pci_dev *dev2 = NULL;
714 pci_read_config_byte(dev, PCI_INTERRUPT_PIN, &pin);
716 DBG(" -> no interrupt pin\n");
721 /* Find IRQ routing entry */
726 DBG("IRQ for %s:%d", pci_name(dev), pin);
727 info = pirq_get_info(dev);
729 DBG(" -> not found in routing table\n");
732 pirq = info->irq[pin].link;
733 mask = info->irq[pin].bitmap;
735 DBG(" -> not routed\n");
738 DBG(" -> PIRQ %02x, mask %04x, excl %04x", pirq, mask, pirq_table->exclusive_irqs);
739 mask &= pcibios_irq_mask;
741 /* Work around broken HP Pavilion Notebooks which assign USB to
742 IRQ 9 even though it is actually wired to IRQ 11 */
744 if (broken_hp_bios_irq9 && pirq == 0x59 && dev->irq == 9) {
746 pci_write_config_byte(dev, PCI_INTERRUPT_LINE, 11);
747 r->set(pirq_router_dev, dev, pirq, 11);
750 /* same for Acer Travelmate 360, but with CB and irq 11 -> 10 */
751 if (acer_tm360_irqrouting && dev->irq == 11 && dev->vendor == PCI_VENDOR_ID_O2) {
754 dev->irq = r->get(pirq_router_dev, dev, pirq);
755 pci_write_config_byte(dev, PCI_INTERRUPT_LINE, dev->irq);
759 * Find the best IRQ to assign: use the one
760 * reported by the device if possible.
763 if (!((1 << newirq) & mask)) {
764 if ( pci_probe & PCI_USE_PIRQ_MASK) newirq = 0;
765 else printk(KERN_WARNING "PCI: IRQ %i for device %s doesn't match PIRQ mask - try pci=usepirqmask\n", newirq, pci_name(dev));
767 if (!newirq && assign) {
768 for (i = 0; i < 16; i++) {
769 if (!(mask & (1 << i)))
771 if (pirq_penalty[i] < pirq_penalty[newirq] && can_request_irq(i, SA_SHIRQ))
775 DBG(" -> newirq=%d", newirq);
777 /* Check if it is hardcoded */
778 if ((pirq & 0xf0) == 0xf0) {
780 DBG(" -> hardcoded IRQ %d\n", irq);
782 } else if ( r->get && (irq = r->get(pirq_router_dev, dev, pirq)) && \
783 ((!(pci_probe & PCI_USE_PIRQ_MASK)) || ((1 << irq) & mask)) ) {
784 DBG(" -> got IRQ %d\n", irq);
786 } else if (newirq && r->set && (dev->class >> 8) != PCI_CLASS_DISPLAY_VGA) {
787 DBG(" -> assigning IRQ %d", newirq);
788 if (r->set(pirq_router_dev, dev, pirq, newirq)) {
789 eisa_set_level_irq(newirq);
797 DBG(" ... failed\n");
798 if (newirq && mask == (1 << newirq)) {
804 printk(KERN_INFO "PCI: %s IRQ %d for device %s\n", msg, irq, pci_name(dev));
806 /* Update IRQ for all devices with the same pirq value */
807 while ((dev2 = pci_find_device(PCI_ANY_ID, PCI_ANY_ID, dev2)) != NULL) {
808 pci_read_config_byte(dev2, PCI_INTERRUPT_PIN, &pin);
812 info = pirq_get_info(dev2);
815 if (info->irq[pin].link == pirq) {
816 /* We refuse to override the dev->irq information. Give a warning! */
817 if ( dev2->irq && dev2->irq != irq && \
818 (!(pci_probe & PCI_USE_PIRQ_MASK) || \
819 ((1 << dev2->irq) & mask)) ) {
820 #ifndef CONFIG_PCI_USE_VECTOR
821 printk(KERN_INFO "IRQ routing conflict for %s, have irq %d, want irq %d\n",
822 pci_name(dev2), dev2->irq, irq);
829 printk(KERN_INFO "PCI: Sharing IRQ %d with %s\n", irq, pci_name(dev2));
835 static void __init pcibios_fixup_irqs(void)
837 struct pci_dev *dev = NULL;
840 DBG("PCI: IRQ fixup\n");
841 while ((dev = pci_find_device(PCI_ANY_ID, PCI_ANY_ID, dev)) != NULL) {
843 * If the BIOS has set an out of range IRQ number, just ignore it.
844 * Also keep track of which IRQ's are already in use.
846 if (dev->irq >= 16) {
847 DBG("%s: ignoring bogus IRQ %d\n", pci_name(dev), dev->irq);
850 /* If the IRQ is already assigned to a PCI device, ignore its ISA use penalty */
851 if (pirq_penalty[dev->irq] >= 100 && pirq_penalty[dev->irq] < 100000)
852 pirq_penalty[dev->irq] = 0;
853 pirq_penalty[dev->irq]++;
857 while ((dev = pci_find_device(PCI_ANY_ID, PCI_ANY_ID, dev)) != NULL) {
858 pci_read_config_byte(dev, PCI_INTERRUPT_PIN, &pin);
859 #ifdef CONFIG_X86_IO_APIC
861 * Recalculate IRQ numbers if we use the I/O APIC.
863 if (io_apic_assign_pci_irqs)
868 pin--; /* interrupt pins are numbered starting from 1 */
869 irq = IO_APIC_get_PCI_irq_vector(dev->bus->number, PCI_SLOT(dev->devfn), pin);
871 * Busses behind bridges are typically not listed in the MP-table.
872 * In this case we have to look up the IRQ based on the parent bus,
873 * parent slot, and pin number. The SMP code detects such bridged
874 * busses itself so we should get into this branch reliably.
876 if (irq < 0 && dev->bus->parent) { /* go back to the bridge */
877 struct pci_dev * bridge = dev->bus->self;
879 pin = (pin + PCI_SLOT(dev->devfn)) % 4;
880 irq = IO_APIC_get_PCI_irq_vector(bridge->bus->number,
881 PCI_SLOT(bridge->devfn), pin);
883 printk(KERN_WARNING "PCI: using PPB(B%d,I%d,P%d) to get irq %d\n",
884 bridge->bus->number, PCI_SLOT(bridge->devfn), pin, irq);
887 if (use_pci_vector() &&
888 !platform_legacy_irq(irq))
889 irq = IO_APIC_VECTOR(irq);
891 printk(KERN_INFO "PCI->APIC IRQ transform: (B%d,I%d,P%d) -> %d\n",
892 dev->bus->number, PCI_SLOT(dev->devfn), pin, irq);
899 * Still no IRQ? Try to lookup one...
901 if (pin && !dev->irq)
902 pcibios_lookup_irq(dev, 0);
907 * Work around broken HP Pavilion Notebooks which assign USB to
908 * IRQ 9 even though it is actually wired to IRQ 11
910 static int __init fix_broken_hp_bios_irq9(struct dmi_system_id *d)
912 if (!broken_hp_bios_irq9) {
913 broken_hp_bios_irq9 = 1;
914 printk(KERN_INFO "%s detected - fixing broken IRQ routing\n", d->ident);
920 * Work around broken Acer TravelMate 360 Notebooks which assign
921 * Cardbus to IRQ 11 even though it is actually wired to IRQ 10
923 static int __init fix_acer_tm360_irqrouting(struct dmi_system_id *d)
925 if (!acer_tm360_irqrouting) {
926 acer_tm360_irqrouting = 1;
927 printk(KERN_INFO "%s detected - fixing broken IRQ routing\n", d->ident);
932 static struct dmi_system_id __initdata pciirq_dmi_table[] = {
934 .callback = fix_broken_hp_bios_irq9,
935 .ident = "HP Pavilion N5400 Series Laptop",
937 DMI_MATCH(DMI_SYS_VENDOR, "Hewlett-Packard"),
938 DMI_MATCH(DMI_BIOS_VERSION, "GE.M1.03"),
939 DMI_MATCH(DMI_PRODUCT_VERSION, "HP Pavilion Notebook Model GE"),
940 DMI_MATCH(DMI_BOARD_VERSION, "OmniBook N32N-736"),
944 .callback = fix_acer_tm360_irqrouting,
945 .ident = "Acer TravelMate 36x Laptop",
947 DMI_MATCH(DMI_SYS_VENDOR, "Acer"),
948 DMI_MATCH(DMI_PRODUCT_NAME, "TravelMate 360"),
954 static int __init pcibios_irq_init(void)
956 DBG("PCI: IRQ init\n");
958 if (pcibios_enable_irq || raw_pci_ops == NULL)
961 dmi_check_system(pciirq_dmi_table);
963 pirq_table = pirq_find_routing_table();
965 #ifdef CONFIG_PCI_BIOS
966 if (!pirq_table && (pci_probe & PCI_BIOS_IRQ_SCAN))
967 pirq_table = pcibios_get_irq_routing_table();
971 pirq_find_router(&pirq_router);
972 if (pirq_table->exclusive_irqs) {
975 if (!(pirq_table->exclusive_irqs & (1 << i)))
976 pirq_penalty[i] += 100;
978 /* If we're using the I/O APIC, avoid using the PCI IRQ routing table */
979 if (io_apic_assign_pci_irqs)
983 pcibios_enable_irq = pirq_enable_irq;
985 pcibios_fixup_irqs();
989 subsys_initcall(pcibios_irq_init);
992 void pcibios_penalize_isa_irq(int irq)
995 * If any ISAPnP device reports an IRQ in its list of possible
996 * IRQ's, we try to avoid assigning it to PCI devices.
998 pirq_penalty[irq] += 100;
1001 int pirq_enable_irq(struct pci_dev *dev)
1004 extern int interrupt_line_quirk;
1005 struct pci_dev *temp_dev;
1007 pci_read_config_byte(dev, PCI_INTERRUPT_PIN, &pin);
1008 if (pin && !pcibios_lookup_irq(dev, 1) && !dev->irq) {
1011 if (io_apic_assign_pci_irqs) {
1015 pin--; /* interrupt pins are numbered starting from 1 */
1016 irq = IO_APIC_get_PCI_irq_vector(dev->bus->number, PCI_SLOT(dev->devfn), pin);
1018 * Busses behind bridges are typically not listed in the MP-table.
1019 * In this case we have to look up the IRQ based on the parent bus,
1020 * parent slot, and pin number. The SMP code detects such bridged
1021 * busses itself so we should get into this branch reliably.
1024 while (irq < 0 && dev->bus->parent) { /* go back to the bridge */
1025 struct pci_dev * bridge = dev->bus->self;
1027 pin = (pin + PCI_SLOT(dev->devfn)) % 4;
1028 irq = IO_APIC_get_PCI_irq_vector(bridge->bus->number,
1029 PCI_SLOT(bridge->devfn), pin);
1031 printk(KERN_WARNING "PCI: using PPB(B%d,I%d,P%d) to get irq %d\n",
1032 bridge->bus->number, PCI_SLOT(bridge->devfn), pin, irq);
1037 #ifdef CONFIG_PCI_USE_VECTOR
1038 if (!platform_legacy_irq(irq))
1039 irq = IO_APIC_VECTOR(irq);
1041 printk(KERN_INFO "PCI->APIC IRQ transform: (B%d,I%d,P%d) -> %d\n",
1042 dev->bus->number, PCI_SLOT(dev->devfn), pin, irq);
1046 msg = " Probably buggy MP table.";
1048 } else if (pci_probe & PCI_BIOS_IRQ_SCAN)
1051 msg = " Please try using pci=biosirq.";
1053 /* With IDE legacy devices the IRQ lookup failure is not a problem.. */
1054 if (dev->class >> 8 == PCI_CLASS_STORAGE_IDE && !(dev->class & 0x5))
1057 printk(KERN_WARNING "PCI: No IRQ known for interrupt pin %c of device %s.%s\n",
1058 'A' + pin - 1, pci_name(dev), msg);
1060 /* VIA bridges use interrupt line for apic/pci steering across
1062 else if (interrupt_line_quirk)
1063 pci_write_config_byte(dev, PCI_INTERRUPT_LINE, dev->irq & 15);
1067 int pci_vector_resources(int last, int nr_released)
1069 int count = nr_released;
1072 int offset = (last % 8);
1074 while (next < FIRST_SYSTEM_VECTOR) {
1076 #ifdef CONFIG_X86_64
1077 if (next == IA32_SYSCALL_VECTOR)
1080 if (next == SYSCALL_VECTOR)
1084 if (next >= FIRST_SYSTEM_VECTOR) {
1086 next = FIRST_DEVICE_VECTOR + offset;