2 * This file contains the light-weight system call handlers (fsyscall-handlers).
4 * Copyright (C) 2003 Hewlett-Packard Co
5 * David Mosberger-Tang <davidm@hpl.hp.com>
7 * 25-Sep-03 davidm Implement fsys_rt_sigprocmask().
8 * 18-Feb-03 louisk Implement fsys_gettimeofday().
9 * 28-Feb-03 davidm Fixed several bugs in fsys_gettimeofday(). Tuned it some more,
10 * probably broke it along the way... ;-)
13 #include <asm/asmmacro.h>
14 #include <asm/errno.h>
15 #include <asm/offsets.h>
16 #include <asm/percpu.h>
17 #include <asm/thread_info.h>
19 #include <asm/signal.h>
20 #include <asm/system.h>
21 #include <asm/unistd.h>
26 * See Documentation/ia64/fsys.txt for details on fsyscalls.
28 * On entry to an fsyscall handler:
29 * r10 = 0 (i.e., defaults to "successful syscall return")
30 * r11 = saved ar.pfs (a user-level value)
31 * r15 = system call number
32 * r16 = "current" task pointer (in normal kernel-mode, this is in r13)
33 * r32-r39 = system call arguments
34 * b6 = return address (a user-level value)
35 * ar.pfs = previous frame-state (a user-level value)
36 * PSR.be = cleared to zero (i.e., little-endian byte order is in effect)
37 * all other registers may contain values passed in from user-mode
39 * On return from an fsyscall handler:
40 * r11 = saved ar.pfs (as passed into the fsyscall handler)
41 * r15 = system call number (as passed into the fsyscall handler)
42 * r32-r39 = system call arguments (as passed into the fsyscall handler)
43 * b6 = return address (as passed into the fsyscall handler)
44 * ar.pfs = previous frame-state (as passed into the fsyscall handler)
47 ENTRY(fsys_ni_syscall)
60 add r9=TI_FLAGS+IA64_TASK_SIZE,r16
63 add r8=IA64_TASK_TGID_OFFSET,r16
65 and r9=TIF_ALLWORK_MASK,r9
66 ld4 r8=[r8] // r8 = current->tgid
69 (p8) br.spnt.many fsys_fallback_syscall
77 add r17=IA64_TASK_GROUP_LEADER_OFFSET,r16
79 ld8 r17=[r17] // r17 = current->group_leader
80 add r9=TI_FLAGS+IA64_TASK_SIZE,r16
84 add r17=IA64_TASK_REAL_PARENT_OFFSET,r17 // r17 = ¤t->group_leader->real_parent
86 and r9=TIF_ALLWORK_MASK,r9
88 1: ld8 r18=[r17] // r18 = current->group_leader->real_parent
91 add r8=IA64_TASK_TGID_OFFSET,r18 // r8 = ¤t->group_leader->real_parent->tgid
95 * The .acq is needed to ensure that the read of tgid has returned its data before
96 * we re-check "real_parent".
98 ld4.acq r8=[r8] // r8 = current->group_leader->real_parent->tgid
101 * Re-read current->group_leader->real_parent.
103 ld8 r19=[r17] // r19 = current->group_leader->real_parent
104 (p8) br.spnt.many fsys_fallback_syscall
106 cmp.ne p6,p0=r18,r19 // did real_parent change?
107 mov r19=0 // i must not leak kernel bits...
108 (p6) br.cond.spnt.few 1b // yes -> redo the read of tgid and the check
110 mov r17=0 // i must not leak kernel bits...
111 mov r18=0 // i must not leak kernel bits...
113 mov r17=0 // i must not leak kernel bits...
114 mov r18=0 // i must not leak kernel bits...
115 mov r19=0 // i must not leak kernel bits...
120 ENTRY(fsys_set_tid_address)
124 add r9=TI_FLAGS+IA64_TASK_SIZE,r16
127 tnat.z p6,p7=r32 // check argument register for being NaT
129 and r9=TIF_ALLWORK_MASK,r9
130 add r8=IA64_TASK_PID_OFFSET,r16
131 add r18=IA64_TASK_CLEAR_CHILD_TID_OFFSET,r16
139 (p8) br.spnt.many fsys_fallback_syscall
141 mov r17=0 // i must not leak kernel bits...
142 mov r18=0 // i must not leak kernel bits...
144 END(fsys_set_tid_address)
147 * Note 1: This routine uses floating-point registers, but only with registers that
148 * operate on integers. Because of that, we don't need to set ar.fpsr to the
149 * kernel default value.
151 * Note 2: For now, we will assume that all CPUs run at the same clock-frequency.
152 * If that wasn't the case, we would have to disable preemption (e.g.,
153 * by disabling interrupts) between reading the ITC and reading
154 * local_cpu_data->nsec_per_cyc.
156 * Note 3: On platforms where the ITC-drift bit is set in the SAL feature vector,
157 * we ought to either skip the ITC-based interpolation or run an ntp-like
158 * daemon to keep the ITCs from drifting too far apart.
161 ENTRY(fsys_gettimeofday)
165 add r9=TI_FLAGS+IA64_TASK_SIZE,r16
166 addl r3=THIS_CPU(cpu_info),r0
169 movl r10=__per_cpu_offset
170 movl r2=sal_platform_features
174 movl r19=xtime // xtime is a timespec struct
176 ld8 r10=[r10] // r10 <- __per_cpu_offset[0]
177 addl r21=THIS_CPU(cpu_info),r0
179 add r10=r21, r10 // r10 <- &cpu_data(time_keeper_id)
180 tbit.nz p8,p0 = r2, IA64_SAL_PLATFORM_FEATURE_ITC_DRIFT_BIT
181 (p8) br.spnt.many fsys_fallback_syscall
185 movl r19=xtime // xtime is a timespec struct
191 // r32, r33 should contain the 2 args of gettimeofday
192 adds r21=IA64_CPUINFO_ITM_NEXT_OFFSET, r10
194 tnat.nz p6,p7=r32 // guard against NaT args
197 adds r10=IA64_CPUINFO_ITM_DELTA_OFFSET, r10
198 (p7) tnat.nz p6,p0=r33
199 (p6) br.cond.spnt.few .fail_einval
201 adds r8=IA64_CPUINFO_NSEC_PER_CYC_OFFSET, r3
202 movl r24=2361183241434822607 // for division hack (only for / 1000)
205 ldf8 f7=[r10] // f7 now contains itm_delta
209 adds r20=IA64_TIMESPEC_TV_NSEC_OFFSET, r19 // r20 = &xtime->tv_nsec
212 setf.sig f9=r24 // f9 is used for division hack
213 movl r27=wall_jiffies
215 and r9=TIF_ALLWORK_MASK,r9
216 movl r25=last_nsec_offset
220 * Verify that we have permission to write to struct timeval. Note:
221 * Another thread might unmap the mapping before we actually get
222 * to store the result. That's OK as long as the stores are also
225 EX(.fail_efault, probe.w.fault r32, 3) // this must come _after_ NaT-check
226 EX(.fail_efault, probe.w.fault r10, 3) // this must come _after_ NaT-check
229 ldf8 f10=[r8] // f10 <- local_cpu_data->nsec_per_cyc value
231 (p8) br.spnt.many fsys_fallback_syscall
233 .retry: // *** seq = read_seqbegin(&xtime_lock); ***
234 ld4.acq r23=[r17] // since &xtime_lock == &xtime_lock->sequence
235 ld8 r14=[r25] // r14 (old) = last_nsec_offset
237 ld8 r28=[r26] // r28 = jiffies
238 ld8 r29=[r27] // r29 = wall_jiffies
241 ldf8 f8=[r21] // f8 now contains itm_next
242 mov.m r31=ar.itc // put time stamp into r31 (ITC) == now
243 sub r28=r29, r28, 1 // r28 now contains "-(lost + 1)"
246 ld8 r2=[r19] // r2 = sec = xtime.tv_sec
247 ld8 r29=[r20] // r29 = nsec = xtime.tv_nsec
248 tbit.nz p9, p10=r23, 0 // p9 <- is_odd(r23), p10 <- is_even(r23)
250 setf.sig f6=r28 // f6 <- -(lost + 1) (6 cyc)
254 xma.l f8=f6, f7, f8 // f8 (last_tick) <- -(lost + 1)*itm_delta + itm_next (5 cyc)
257 setf.sig f12=r31 // f12 <- ITC (6 cyc)
258 // *** if (unlikely(read_seqretry(&xtime_lock, seq))) continue; ***
259 ld4 r24=[r17] // r24 = xtime_lock->sequence (re-read)
263 xma.l f8=f11, f8, f12 // f8 (elapsed_cycles) <- (-1*last_tick + now) = (now - last_tick)
267 getf.sig r18=f8 // r18 <- (now - last_tick)
268 xmpy.l f8=f8, f10 // f8 <- elapsed_cycles*nsec_per_cyc (5 cyc)
269 add r3=r29, r14 // r3 = (nsec + old)
272 cmp.lt p7, p8=r18, r0 // if now < last_tick, set p7 = 1, p8 = 0
273 getf.sig r18=f8 // r18 = elapsed_cycles*nsec_per_cyc (6 cyc)
277 (p10) cmp.ne p9, p0=r23, r24 // if xtime_lock->sequence != seq, set p9
278 shr.u r18=r18, IA64_NSEC_PER_CYC_SHIFT // r18 <- offset
279 (p9) br.spnt.many .retry
282 mov ar.ccv=r14 // ar.ccv = old (1 cyc)
283 cmp.leu p7, p8=r18, r14 // if (offset <= old), set p7 = 1, p8 = 0
286 (p8) cmpxchg8.rel r24=[r25], r18, ar.ccv // compare-and-exchange (atomic!)
287 (p8) add r3=r29, r18 // r3 = (nsec + offset)
289 shr.u r3=r3, 3 // initiate dividing r3 by 1000
291 setf.sig f8=r3 // (6 cyc)
292 mov r10=1000000 // r10 = 1000000
294 (p8) cmp.ne.unc p9, p0=r24, r14
295 xmpy.hu f6=f8, f9 // (5 cyc)
296 (p9) br.spnt.many .retry
299 getf.sig r3=f6 // (6 cyc)
301 shr.u r3=r3, 4 // end of division, r3 is divided by 1000 (=usec)
304 1: cmp.geu p7, p0=r3, r10 // while (usec >= 1000000)
306 (p7) sub r3=r3, r10 // usec -= 1000000
307 (p7) adds r2=1, r2 // ++sec
310 // finally: r2 = sec, r3 = usec
311 EX(.fail_efault, st8 [r32]=r2)
315 EX(.fail_efault, st8 [r9]=r3) // store them in the timeval struct
319 * Note: We are NOT clearing the scratch registers here. Since the only things
320 * in those registers are time-related variables and some addresses (which
321 * can be obtained from System.map), none of this should be security-sensitive
322 * and we should be fine.
326 mov r8=EINVAL // r8 = EINVAL
327 mov r10=-1 // r10 = -1
331 mov r8=EFAULT // r8 = EFAULT
332 mov r10=-1 // r10 = -1
334 END(fsys_gettimeofday)
337 * long fsys_rt_sigprocmask (int how, sigset_t *set, sigset_t *oset, size_t sigsetsize).
340 # error Sorry, fsys_rt_sigprocmask() needs to be updated for _NSIG_WORDS != 1.
342 ENTRY(fsys_rt_sigprocmask)
347 add r2=IA64_TASK_BLOCKED_OFFSET,r16
348 add r9=TI_FLAGS+IA64_TASK_SIZE,r16
349 cmp4.ltu p6,p0=SIG_SETMASK,r32
351 cmp.ne p15,p0=r0,r34 // oset != NULL?
353 add r31=IA64_TASK_SIGHAND_OFFSET,r16
355 ld8 r3=[r2] // read/prefetch current->blocked
359 cmp.ne.or p6,p0=_NSIG_WORDS*8,r35
361 (p6) br.spnt.few .fail_einval // fail with EINVAL
364 ld8 r31=[r31] // r31 <- current->sighand
366 and r9=TIF_ALLWORK_MASK,r9
370 cmp.eq p6,p0=r0,r33 // set == NULL?
371 add r31=IA64_SIGHAND_SIGLOCK_OFFSET,r31 // r31 <- current->sighand->siglock
372 (p8) br.spnt.few .fail_efault // fail with EFAULT
373 (p7) br.spnt.many fsys_fallback_syscall // got pending kernel work...
374 (p6) br.dpnt.many .store_mask // -> short-circuit to just reading the signal mask
376 /* Argh, we actually have to do some work and _update_ the signal mask: */
378 EX(.fail_efault, probe.r.fault r33, 3) // verify user has read-access to *set
379 EX(.fail_efault, ld8 r14=[r33]) // r14 <- *set
380 mov r17=(1 << (SIGKILL - 1)) | (1 << (SIGSTOP - 1))
383 rsm psr.i // mask interrupt delivery
385 andcm r14=r14,r17 // filter out SIGKILL & SIGSTOP
390 cmpxchg4.acq r18=[r31],r17,ar.ccv // try to acquire the lock
391 mov r8=EINVAL // default to EINVAL
393 ld8 r3=[r2] // re-read current->blocked now that we hold the lock
395 (p6) br.cond.spnt.many .lock_contention
398 ld8 r3=[r2] // re-read current->blocked now that we hold the lock
399 mov r8=EINVAL // default to EINVAL
401 add r18=IA64_TASK_PENDING_OFFSET+IA64_SIGPENDING_SIGNAL_OFFSET,r16
402 add r19=IA64_TASK_SIGNAL_OFFSET,r16
403 cmp4.eq p6,p0=SIG_BLOCK,r32
405 ld8 r19=[r19] // r19 <- current->signal
406 cmp4.eq p7,p0=SIG_UNBLOCK,r32
407 cmp4.eq p8,p0=SIG_SETMASK,r32
409 ld8 r18=[r18] // r18 <- current->pending.signal
410 .pred.rel.mutex p6,p7,p8
411 (p6) or r14=r3,r14 // SIG_BLOCK
412 (p7) andcm r14=r3,r14 // SIG_UNBLOCK
414 (p8) mov r14=r14 // SIG_SETMASK
415 (p6) mov r8=0 // clear error code
416 // recalc_sigpending()
417 add r17=IA64_SIGNAL_GROUP_STOP_COUNT_OFFSET,r19
419 add r19=IA64_SIGNAL_SHARED_PENDING_OFFSET+IA64_SIGPENDING_SIGNAL_OFFSET,r19
421 ld4 r17=[r17] // r17 <- current->signal->group_stop_count
422 (p7) mov r8=0 // clear error code
424 ld8 r19=[r19] // r19 <- current->signal->shared_pending
426 cmp4.gt p6,p7=r17,r0 // p6/p7 <- (current->signal->group_stop_count > 0)?
427 (p8) mov r8=0 // clear error code
429 or r18=r18,r19 // r18 <- current->pending | current->signal->shared_pending
431 // r18 <- (current->pending | current->signal->shared_pending) & ~current->blocked:
433 add r9=TI_FLAGS+IA64_TASK_SIZE,r16
436 (p7) cmp.ne.or.andcm p6,p7=r18,r0 // p6/p7 <- signal pending
437 mov r19=0 // i must not leak kernel bits...
438 (p6) br.cond.dpnt.many .sig_pending
441 1: ld4 r17=[r9] // r17 <- current->thread_info->flags
444 and r18=~_TIF_SIGPENDING,r17 // r18 <- r17 & ~(1 << TIF_SIGPENDING)
447 st8 [r2]=r14 // update current->blocked with new mask
448 cmpxchg4.acq r14=[r9],r18,ar.ccv // current->thread_info->flags <- r18
450 cmp.ne p6,p0=r17,r14 // update failed?
451 (p6) br.cond.spnt.few 1b // yes -> retry
454 st4.rel [r31]=r0 // release the lock
459 srlz.d // ensure psr.i is set again
460 mov r18=0 // i must not leak kernel bits...
463 EX(.fail_efault, (p15) probe.w.fault r34, 3) // verify user has write-access to *oset
464 EX(.fail_efault, (p15) st8 [r34]=r3)
465 mov r2=0 // i must not leak kernel bits...
466 mov r3=0 // i must not leak kernel bits...
468 mov r9=0 // i must not leak kernel bits...
469 mov r14=0 // i must not leak kernel bits...
470 mov r17=0 // i must not leak kernel bits...
471 mov r31=0 // i must not leak kernel bits...
476 st4.rel [r31]=r0 // release the lock
481 br.sptk.many fsys_fallback_syscall // with signal pending, do the heavy-weight syscall
485 /* Rather than spinning here, fall back on doing a heavy-weight syscall. */
489 br.sptk.many fsys_fallback_syscall
491 END(fsys_rt_sigprocmask)
493 ENTRY(fsys_fallback_syscall)
498 * We only get here from light-weight syscall handlers. Thus, we already
499 * know that r15 contains a valid syscall number. No need to re-check.
502 movl r14=sys_call_table
507 ld8 r18=[r18] // load normal (heavy-weight) syscall entry-point
508 mov r29=psr // read psr (12 cyc load latency)
512 END(fsys_fallback_syscall)
514 GLOBAL_ENTRY(fsys_bubble_down)
519 * We get here for syscalls that don't have a lightweight handler. For those, we
520 * need to bubble down into the kernel and that requires setting up a minimal
521 * pt_regs structure, and initializing the CPU state more or less as if an
522 * interruption had occurred. To make syscall-restarts work, we setup pt_regs
523 * such that cr_iip points to the second instruction in syscall_via_break.
524 * Decrementing the IP hence will restart the syscall via break and not
525 * decrementing IP will return us to the caller, as usual. Note that we preserve
526 * the value of psr.pp rather than initializing it from dcr.pp. This makes it
527 * possible to distinguish fsyscall execution from other privileged execution.
530 * - normal fsyscall handler register usage, except that we also have:
531 * - r18: address of syscall entry point
537 # define PSR_PRESERVED_BITS (IA64_PSR_UP | IA64_PSR_MFL | IA64_PSR_MFH | IA64_PSR_PK \
538 | IA64_PSR_DT | IA64_PSR_PP | IA64_PSR_SP | IA64_PSR_RT \
541 * Reading psr.l gives us only bits 0-31, psr.it, and psr.mc. The rest we have
544 # define PSR_ONE_BITS ((3 << IA64_PSR_CPL0_BIT) | (0x1 << IA64_PSR_RI_BIT) \
545 | IA64_PSR_BN | IA64_PSR_I)
550 mov r25=ar.unat // save ar.unat (5 cyc)
551 movl r9=PSR_PRESERVED_BITS
553 mov ar.rsc=0 // set enforced lazy mode, pl 0, little-endian, loadrs=0
554 movl r28=__kernel_syscall_via_break
556 mov r23=ar.bspstore // save ar.bspstore (12 cyc)
557 mov r31=pr // save pr (2 cyc)
558 mov r20=r1 // save caller's gp in r20
560 mov r2=r16 // copy current task addr to addl-addressable register
562 mov r19=b6 // save b6 (2 cyc)
564 mov psr.l=r9 // slam the door (17 cyc to srlz.i)
565 or r29=r8,r29 // construct cr.ipsr value to save
566 addl r22=IA64_RBS_OFFSET,r2 // compute base of RBS
568 // GAS reports a spurious RAW hazard on the read of ar.rnat because it thinks
569 // we may be reading ar.itc after writing to psr.l. Avoid that message with
572 mov.m r24=ar.rnat // read ar.rnat (5 cyc lat)
573 lfetch.fault.excl.nt1 [r22]
574 adds r16=IA64_TASK_THREAD_ON_USTACK_OFFSET,r2
576 // ensure previous insn group is issued before we stall for srlz.i:
578 srlz.i // ensure new psr.l has been established
579 /////////////////////////////////////////////////////////////////////////////
580 ////////// from this point on, execution is not interruptible anymore
581 /////////////////////////////////////////////////////////////////////////////
582 addl r1=IA64_STK_OFFSET-IA64_PT_REGS_SIZE,r2 // compute base of memory stack
583 cmp.ne pKStk,pUStk=r0,r0 // set pKStk <- 0, pUStk <- 1
585 st1 [r16]=r0 // clear current->thread.on_ustack flag
586 mov ar.bspstore=r22 // switch to kernel RBS
587 mov b6=r18 // copy syscall entry-point to b6 (7 cyc)
588 add r3=TI_FLAGS+IA64_TASK_SIZE,r2
590 ld4 r3=[r3] // r2 = current_thread_info()->flags
591 mov r18=ar.bsp // save (kernel) ar.bsp (12 cyc)
592 mov ar.rsc=0x3 // set eager mode, pl 0, little-endian, loadrs=0
593 br.call.sptk.many b7=ia64_syscall_setup
596 movl r2=ia64_ret_from_syscall
598 mov rp=r2 // set the real return addr
599 tbit.z p8,p0=r3,TIF_SYSCALL_TRACE
601 (p8) br.call.sptk.many b6=b6 // ignore this return addr
602 br.cond.sptk ia64_trace_syscall
603 END(fsys_bubble_down)
607 .globl fsyscall_table
609 data8 fsys_bubble_down
611 data8 fsys_ni_syscall
612 data8 0 // exit // 1025
617 data8 0 // creat // 1030
622 data8 0 // fchdir // 1035
627 data8 0 // lseek // 1040
628 data8 fsys_getpid // getpid
629 data8 fsys_getppid // getppid
632 data8 0 // setuid // 1045
637 data8 0 // sync // 1050
642 data8 0 // mkdir // 1055
647 data8 0 // brk // 1060
652 data8 0 // ioctl // 1065
657 data8 0 // dup2 // 1070
662 data8 0 // getresgid // 1075
667 data8 0 // setpgid // 1080
670 data8 0 // sethostname
672 data8 0 // getrlimit // 1085
674 data8 fsys_gettimeofday // gettimeofday
675 data8 0 // settimeofday
677 data8 0 // poll // 1090
682 data8 0 // swapoff // 1095
687 data8 0 // fchown // 1100
688 data8 0 // getpriority
689 data8 0 // setpriority
692 data8 0 // gettid // 1105
697 data8 0 // msgsnd // 1110
702 data8 0 // shmdt // 1115
712 data8 0 // remap_file_pages // 1125
716 data8 0 // setdomainname
717 data8 0 // newuname // 1130
720 data8 0 // init_module
721 data8 0 // delete_module
727 data8 0 // personality // 1140
728 data8 0 // afs_syscall
732 data8 0 // flock // 1145
737 data8 0 // sysctl // 1150
742 data8 0 // mprotect // 1155
746 data8 0 // munlockall
747 data8 0 // sched_getparam // 1160
748 data8 0 // sched_setparam
749 data8 0 // sched_getscheduler
750 data8 0 // sched_setscheduler
751 data8 0 // sched_yield
752 data8 0 // sched_get_priority_max // 1165
753 data8 0 // sched_get_priority_min
754 data8 0 // sched_rr_get_interval
756 data8 0 // nfsservctl
757 data8 0 // prctl // 1170
758 data8 0 // getpagesize
760 data8 0 // pciconfig_read
761 data8 0 // pciconfig_write
762 data8 0 // perfmonctl // 1175
763 data8 0 // sigaltstack
764 data8 0 // rt_sigaction
765 data8 0 // rt_sigpending
766 data8 fsys_rt_sigprocmask // rt_sigprocmask
767 data8 0 // rt_sigqueueinfo // 1180
768 data8 0 // rt_sigreturn
769 data8 0 // rt_sigsuspend
770 data8 0 // rt_sigtimedwait
772 data8 0 // capget // 1185
777 data8 0 // socket // 1190
782 data8 0 // getsockname // 1195
783 data8 0 // getpeername
784 data8 0 // socketpair
787 data8 0 // recv // 1200
790 data8 0 // setsockopt
791 data8 0 // getsockopt
792 data8 0 // sendmsg // 1205
794 data8 0 // pivot_root
797 data8 0 // newstat // 1210
801 data8 0 // getdents64
802 data8 0 // getunwind // 1215
807 data8 0 // getxattr // 1220
811 data8 0 // llistxattr
812 data8 0 // flistxattr // 1225
813 data8 0 // removexattr
814 data8 0 // lremovexattr
815 data8 0 // fremovexattr
817 data8 0 // futex // 1230
818 data8 0 // sched_setaffinity
819 data8 0 // sched_getaffinity
820 data8 fsys_set_tid_address // set_tid_address
821 data8 0 // fadvise64_64
822 data8 0 // tgkill // 1235
823 data8 0 // exit_group
824 data8 0 // lookup_dcookie
826 data8 0 // io_destroy
827 data8 0 // io_getevents // 1240
830 data8 0 // epoll_create
832 data8 0 // epoll_wait // 1245
833 data8 0 // restart_syscall
834 data8 0 // semtimedop
835 data8 0 // timer_create
836 data8 0 // timer_settime
837 data8 0 // timer_gettime // 1250
838 data8 0 // timer_getoverrun
839 data8 0 // timer_delete
840 data8 0 // clock_settime
841 data8 0 // clock_gettime
842 data8 0 // clock_getres // 1255
843 data8 0 // clock_nanosleep
851 data8 0 // mq_timedsend
852 data8 0 // mq_timedreceive // 1265
854 data8 0 // mq_getsetattr
855 data8 0 // kexec_load
868 .org fsyscall_table + 8*NR_syscalls // guard against failures to increase NR_syscalls