3 ** head.S -- This file contains the initial boot code for the
6 ** Copyright 1993 by Hamish Macdonald
8 ** 68040 fixes by Michael Rausch
9 ** 68060 fixes by Roman Hodek
10 ** MMU cleanup by Randy Thelen
11 ** Final MMU cleanup by Roman Zippel
13 ** Atari support by Andreas Schwab, using ideas of Robert de Vries
15 ** VME Support by Richard Hirst
17 ** 94/11/14 Andreas Schwab: put kernel at PAGESIZE
18 ** 94/11/18 Andreas Schwab: remove identity mapping of STRAM for Atari
19 ** ++ Bjoern & Roman: ATARI-68040 support for the Medusa
20 ** 95/11/18 Richard Hirst: Added MVME166 support
21 ** 96/04/26 Guenther Kelleter: fixed identity mapping for Falcon with
22 ** Magnum- and FX-alternate ram
23 ** 98/04/25 Phil Blundell: added HP300 support
24 ** 1998/08/30 David Kilzer: Added support for font_desc structures
26 ** 9/02/11 Richard Zidlicky: added Q40 support (initial vesion 99/01/01)
28 ** This file is subject to the terms and conditions of the GNU General Public
29 ** License. See the file README.legal in the main directory of this archive
37 * At this point, the boot loader has:
40 * Put us in supervisor state.
42 * The kernel setup code takes the following steps:
43 * . Raise interrupt level
44 * . Set up initial kernel memory mapping.
45 * . This sets up a mapping of the 4M of memory the kernel is located in.
46 * . It also does a mapping of any initial machine specific areas.
48 * . Enable cache memories
49 * . Jump to kernel startup
51 * Much of the file restructuring was to accomplish:
52 * 1) Remove register dependency through-out the file.
53 * 2) Increase use of subroutines to perform functions
54 * 3) Increase readability of the code
56 * Of course, readability is a subjective issue, so it will never be
57 * argued that that goal was accomplished. It was merely a goal.
58 * A key way to help make code more readable is to give good
59 * documentation. So, the first thing you will find is exaustive
60 * write-ups on the structure of the file, and the features of the
61 * functional subroutines.
65 * Without a doubt the single largest chunk of head.S is spent
66 * mapping the kernel and I/O physical space into the logical range
68 * There are new subroutines and data structures to make MMU
69 * support cleaner and easier to understand.
70 * First, you will find a routine call "mmu_map" which maps
71 * a logical to a physical region for some length given a cache
72 * type on behalf of the caller. This routine makes writing the
73 * actual per-machine specific code very simple.
74 * A central part of the code, but not a subroutine in itself,
75 * is the mmu_init code which is broken down into mapping the kernel
76 * (the same for all machines) and mapping machine-specific I/O
78 * Also, there will be a description of engaging the MMU and
80 * You will notice that there is a chunk of code which
81 * can emit the entire MMU mapping of the machine. This is present
82 * only in debug modes and can be very helpful.
83 * Further, there is a new console driver in head.S that is
84 * also only engaged in debug mode. Currently, it's only supported
85 * on the Macintosh class of machines. However, it is hoped that
86 * others will plug-in support for specific machines.
88 * ######################################################################
92 * mmu_map was written for two key reasons. First, it was clear
93 * that it was very difficult to read the previous code for mapping
94 * regions of memory. Second, the Macintosh required such extensive
95 * memory allocations that it didn't make sense to propagate the
96 * existing code any further.
97 * mmu_map requires some parameters:
99 * mmu_map (logical, physical, length, cache_type)
101 * While this essentially describes the function in the abstract, you'll
102 * find more indepth description of other parameters at the implementation site.
104 * mmu_get_root_table_entry
105 * ------------------------
106 * mmu_get_ptr_table_entry
107 * -----------------------
108 * mmu_get_page_table_entry
109 * ------------------------
111 * These routines are used by other mmu routines to get a pointer into
112 * a table, if necessary a new table is allocated. These routines are working
113 * basically like pmd_alloc() and pte_alloc() in <asm/pgtable.h>. The root
114 * table needs of course only to be allocated once in mmu_get_root_table_entry,
115 * so that here also some mmu specific initialization is done. The second page
116 * at the start of the kernel (the first page is unmapped later) is used for
117 * the kernel_pg_dir. It must be at a position known at link time (as it's used
118 * to initialize the init task struct) and since it needs special cache
119 * settings, it's the easiest to use this page, the rest of the page is used
120 * for further pointer tables.
121 * mmu_get_page_table_entry allocates always a whole page for page tables, this
122 * means 1024 pages and so 4MB of memory can be mapped. It doesn't make sense
123 * to manage page tables in smaller pieces as nearly all mappings have that
126 * ######################################################################
129 * ######################################################################
133 * Thanks to a small helping routine enabling the mmu got quite simple
134 * and there is only one way left. mmu_engage makes a complete a new mapping
135 * that only includes the absolute necessary to be able to jump to the final
136 * postion and to restore the original mapping.
137 * As this code doesn't need a transparent translation register anymore this
138 * means all registers are free to be used by machines that needs them for
141 * ######################################################################
145 * This algorithm will print out the page tables of the system as
146 * appropriate for an 030 or an 040. This is useful for debugging purposes
147 * and as such is enclosed in #ifdef MMU_PRINT/#endif clauses.
149 * ######################################################################
153 * The console is also able to be turned off. The console in head.S
154 * is specifically for debugging and can be very useful. It is surrounded by
155 * #ifdef CONSOLE/#endif clauses so it doesn't have to ship in known-good
156 * kernels. It's basic algorithm is to determine the size of the screen
157 * (in height/width and bit depth) and then use that information for
158 * displaying an 8x8 font or an 8x16 (widthxheight). I prefer the 8x8 for
159 * debugging so I can see more good data. But it was trivial to add support
160 * for both fonts, so I included it.
161 * Also, the algorithm for plotting pixels is abstracted so that in
162 * theory other platforms could add support for different kinds of frame
163 * buffers. This could be very useful.
165 * console_put_penguin
166 * -------------------
167 * An important part of any Linux bring up is the penguin and there's
168 * nothing like getting the Penguin on the screen! This algorithm will work
169 * on any machine for which there is a console_plot_pixel.
173 * My hope is that the scroll algorithm does the right thing on the
174 * various platforms, but it wouldn't be hard to add the test conditions
175 * and new code if it doesn't.
180 * ######################################################################
182 * Register usage has greatly simplified within head.S. Every subroutine
183 * saves and restores all registers that it modifies (except it returns a
184 * value in there of course). So the only register that needs to be initialized
185 * is the stack pointer.
186 * All other init code and data is now placed in the init section, so it will
187 * be automatically freed at the end of the kernel initialization.
189 * ######################################################################
193 * There are many options available in a build of this file. I've
194 * taken the time to describe them here to save you the time of searching
195 * for them and trying to understand what they mean.
197 * CONFIG_xxx: These are the obvious machine configuration defines created
198 * during configuration. These are defined in include/linux/autoconf.h.
200 * CONSOLE: There is support for head.S console in this file. This
201 * console can talk to a Mac frame buffer, but could easily be extrapolated
202 * to extend it to support other platforms.
204 * TEST_MMU: This is a test harness for running on any given machine but
205 * getting an MMU dump for another class of machine. The classes of machines
206 * that can be tested are any of the makes (Atari, Amiga, Mac, VME, etc.)
207 * and any of the models (030, 040, 060, etc.).
209 * NOTE: TEST_MMU is NOT permanent! It is scheduled to be removed
210 * When head.S boots on Atari, Amiga, Macintosh, and VME
211 * machines. At that point the underlying logic will be
212 * believed to be solid enough to be trusted, and TEST_MMU
213 * can be dropped. Do note that that will clean up the
214 * head.S code significantly as large blocks of #if/#else
215 * clauses can be removed.
217 * MMU_NOCACHE_KERNEL: On the Macintosh platform there was an inquiry into
218 * determing why devices don't appear to work. A test case was to remove
219 * the cacheability of the kernel bits.
221 * MMU_PRINT: There is a routine built into head.S that can display the
222 * MMU data structures. It outputs its result through the serial_putc
223 * interface. So where ever that winds up driving data, that's where the
224 * mmu struct will appear. On the Macintosh that's typically the console.
226 * SERIAL_DEBUG: There are a series of putc() macro statements
227 * scattered through out the code to give progress of status to the
228 * person sitting at the console. This constant determines whether those
231 * DEBUG: This is the standard DEBUG flag that can be set for building
232 * the kernel. It has the effect adding additional tests into
238 * In theory these could be determined at run time or handed
239 * over by the booter. But, let's be real, it's a fine hard
240 * coded value. (But, you will notice the code is run-time
241 * flexible!) A pointer to the font's struct font_desc
242 * is kept locally in Lconsole_font. It is used to determine
243 * font size information dynamically.
246 * USE_PRINTER: Use the printer port for serial debug.
247 * USE_SCC_B: Use the SCC port A (Serial2) for serial debug.
248 * USE_SCC_A: Use the SCC port B (Modem2) for serial debug.
249 * USE_MFP: Use the ST-MFP port (Modem1) for serial debug.
251 * Macintosh constants:
252 * MAC_SERIAL_DEBUG: Turns on serial debug output for the Macintosh.
253 * MAC_USE_SCC_A: Use the SCC port A (modem) for serial debug.
254 * MAC_USE_SCC_B: Use the SCC port B (printer) for serial debug (default).
257 #include <linux/config.h>
258 #include <linux/linkage.h>
259 #include <linux/init.h>
260 #include <asm/bootinfo.h>
261 #include <asm/setup.h>
262 #include <asm/entry.h>
263 #include <asm/pgtable.h>
264 #include <asm/page.h>
265 #include <asm/offsets.h>
269 #include <asm/machw.h>
272 * Macintosh console support
276 #define CONSOLE_PENGUIN
279 * Macintosh serial debug support; outputs boot info to the printer
280 * and/or modem serial ports
282 #undef MAC_SERIAL_DEBUG
285 * Macintosh serial debug port selection; define one or both;
286 * requires MAC_SERIAL_DEBUG to be defined
288 #define MAC_USE_SCC_A /* Macintosh modem serial port */
289 #define MAC_USE_SCC_B /* Macintosh printer serial port */
291 #endif /* CONFIG_MAC */
294 #undef MMU_NOCACHE_KERNEL
299 * For the head.S console, there are three supported fonts, 6x11, 8x16 and 8x8.
300 * The 8x8 font is harder to read but fits more on the screen.
302 #define FONT_8x8 /* default */
303 /* #define FONT_8x16 */ /* 2nd choice */
304 /* #define FONT_6x11 */ /* 3rd choice */
308 .globl m68k_pgtable_cachemode
309 .globl m68k_supervisor_cachemode
310 #ifdef CONFIG_MVME16x
317 .globl hp300_phys_ram_base
320 CPUTYPE_040 = 1 /* indicates an 040 */
321 CPUTYPE_060 = 2 /* indicates an 060 */
322 CPUTYPE_0460 = 3 /* if either above are set, this is set */
323 CPUTYPE_020 = 4 /* indicates an 020 */
325 /* Translation control register */
330 /* Transparent translation registers */
331 TTR_ENABLE = 0x8000 /* enable transparent translation */
332 TTR_ANYMODE = 0x4000 /* user and kernel mode access */
333 TTR_KERNELMODE = 0x2000 /* only kernel mode access */
334 TTR_USERMODE = 0x0000 /* only user mode access */
335 TTR_CI = 0x0400 /* inhibit cache */
336 TTR_RW = 0x0200 /* read/write mode */
337 TTR_RWM = 0x0100 /* read/write mask */
338 TTR_FCB2 = 0x0040 /* function code base bit 2 */
339 TTR_FCB1 = 0x0020 /* function code base bit 1 */
340 TTR_FCB0 = 0x0010 /* function code base bit 0 */
341 TTR_FCM2 = 0x0004 /* function code mask bit 2 */
342 TTR_FCM1 = 0x0002 /* function code mask bit 1 */
343 TTR_FCM0 = 0x0001 /* function code mask bit 0 */
345 /* Cache Control registers */
346 CC6_ENABLE_D = 0x80000000 /* enable data cache (680[46]0) */
347 CC6_FREEZE_D = 0x40000000 /* freeze data cache (68060) */
348 CC6_ENABLE_SB = 0x20000000 /* enable store buffer (68060) */
349 CC6_PUSH_DPI = 0x10000000 /* disable CPUSH invalidation (68060) */
350 CC6_HALF_D = 0x08000000 /* half-cache mode for data cache (68060) */
351 CC6_ENABLE_B = 0x00800000 /* enable branch cache (68060) */
352 CC6_CLRA_B = 0x00400000 /* clear all entries in branch cache (68060) */
353 CC6_CLRU_B = 0x00200000 /* clear user entries in branch cache (68060) */
354 CC6_ENABLE_I = 0x00008000 /* enable instruction cache (680[46]0) */
355 CC6_FREEZE_I = 0x00004000 /* freeze instruction cache (68060) */
356 CC6_HALF_I = 0x00002000 /* half-cache mode for instruction cache (68060) */
357 CC3_ALLOC_WRITE = 0x00002000 /* write allocate mode(68030) */
358 CC3_ENABLE_DB = 0x00001000 /* enable data burst (68030) */
359 CC3_CLR_D = 0x00000800 /* clear data cache (68030) */
360 CC3_CLRE_D = 0x00000400 /* clear entry in data cache (68030) */
361 CC3_FREEZE_D = 0x00000200 /* freeze data cache (68030) */
362 CC3_ENABLE_D = 0x00000100 /* enable data cache (68030) */
363 CC3_ENABLE_IB = 0x00000010 /* enable instruction burst (68030) */
364 CC3_CLR_I = 0x00000008 /* clear instruction cache (68030) */
365 CC3_CLRE_I = 0x00000004 /* clear entry in instruction cache (68030) */
366 CC3_FREEZE_I = 0x00000002 /* freeze instruction cache (68030) */
367 CC3_ENABLE_I = 0x00000001 /* enable instruction cache (68030) */
369 /* Miscellaneous definitions */
373 ROOT_TABLE_SIZE = 128
376 ROOT_INDEX_SHIFT = 25
378 PAGE_INDEX_SHIFT = 12
381 /* When debugging use readable names for labels */
383 #define L(name) .head.S.##name
385 #define L(name) .head.S./**/name
389 #define L(name) .L##name
391 #define L(name) .L/**/name
395 /* The __INITDATA stuff is a no-op when ftrace or kgdb are turned on */
397 #define __INITDATA .data
398 #define __FINIT .previous
401 /* Several macros to make the writing of subroutines easier:
402 * - func_start marks the beginning of the routine which setups the frame
403 * register and saves the registers, it also defines another macro
404 * to automatically restore the registers again.
405 * - func_return marks the end of the routine and simply calls the prepared
406 * macro to restore registers and jump back to the caller.
407 * - func_define generates another macro to automatically put arguments
408 * onto the stack call the subroutine and cleanup the stack again.
411 /* Within subroutines these macros can be used to access the arguments
412 * on the stack. With STACK some allocated memory on the stack can be
413 * accessed and ARG0 points to the return address (used by mmu_engage).
415 #define STACK %a6@(stackstart)
418 #define ARG2 %a6@(12)
419 #define ARG3 %a6@(16)
420 #define ARG4 %a6@(20)
422 .macro func_start name,saveregs,stack=0
425 moveml \saveregs,%sp@-
426 .set stackstart,-\stack
428 .macro func_return_\name
429 moveml %sp@+,\saveregs
435 .macro func_return name
439 .macro func_call name
443 .macro move_stack nr,arg1,arg2,arg3,arg4
445 move_stack "(\nr-1)",\arg2,\arg3,\arg4
450 .macro func_define name,nr=0
451 .macro \name arg1,arg2,arg3,arg4
452 move_stack \nr,\arg1,\arg2,\arg3,\arg4
460 func_define mmu_map,4
461 func_define mmu_map_tt,4
462 func_define mmu_fixup_page_mmu_cache,1
463 func_define mmu_temp_map,2
464 func_define mmu_engage
465 func_define mmu_get_root_table_entry,1
466 func_define mmu_get_ptr_table_entry,2
467 func_define mmu_get_page_table_entry,2
468 func_define mmu_print
469 func_define get_new_page
474 .macro mmu_map_eq arg1,arg2,arg3
475 mmu_map \arg1,\arg1,\arg2,\arg3
478 .macro get_bi_record record
480 func_call get_bi_record
484 func_define serial_putc,1
485 func_define console_putc,1
487 func_define console_init
488 func_define console_put_stats
489 func_define console_put_penguin
490 func_define console_plot_pixel,3
491 func_define console_scroll
494 #if defined(CONSOLE) || defined(SERIAL_DEBUG)
498 func_call console_putc
501 func_call serial_putc
503 #if defined(CONSOLE) || defined(SERIAL_DEBUG)
523 #if defined(CONSOLE) || defined(SERIAL_DEBUG)
540 #define is_not_amiga(lab) cmpl &MACH_AMIGA,%pc@(m68k_machtype); jne lab
541 #define is_not_atari(lab) cmpl &MACH_ATARI,%pc@(m68k_machtype); jne lab
542 #define is_not_mac(lab) cmpl &MACH_MAC,%pc@(m68k_machtype); jne lab
543 #define is_not_mvme147(lab) cmpl &MACH_MVME147,%pc@(m68k_machtype); jne lab
544 #define is_not_mvme16x(lab) cmpl &MACH_MVME16x,%pc@(m68k_machtype); jne lab
545 #define is_not_bvme6000(lab) cmpl &MACH_BVME6000,%pc@(m68k_machtype); jne lab
546 #define is_mvme147(lab) cmpl &MACH_MVME147,%pc@(m68k_machtype); jeq lab
547 #define is_mvme16x(lab) cmpl &MACH_MVME16x,%pc@(m68k_machtype); jeq lab
548 #define is_bvme6000(lab) cmpl &MACH_BVME6000,%pc@(m68k_machtype); jeq lab
549 #define is_not_hp300(lab) cmpl &MACH_HP300,%pc@(m68k_machtype); jne lab
550 #define is_not_apollo(lab) cmpl &MACH_APOLLO,%pc@(m68k_machtype); jne lab
551 #define is_not_q40(lab) cmpl &MACH_Q40,%pc@(m68k_machtype); jne lab
552 #define is_not_sun3x(lab) cmpl &MACH_SUN3X,%pc@(m68k_machtype); jne lab
554 #define hasnt_leds(lab) cmpl &MACH_HP300,%pc@(m68k_machtype); \
556 cmpl &MACH_APOLLO,%pc@(m68k_machtype); \
560 #define is_040_or_060(lab) btst &CPUTYPE_0460,%pc@(L(cputype)+3); jne lab
561 #define is_not_040_or_060(lab) btst &CPUTYPE_0460,%pc@(L(cputype)+3); jeq lab
562 #define is_040(lab) btst &CPUTYPE_040,%pc@(L(cputype)+3); jne lab
563 #define is_060(lab) btst &CPUTYPE_060,%pc@(L(cputype)+3); jne lab
564 #define is_not_060(lab) btst &CPUTYPE_060,%pc@(L(cputype)+3); jeq lab
565 #define is_020(lab) btst &CPUTYPE_020,%pc@(L(cputype)+3); jne lab
566 #define is_not_020(lab) btst &CPUTYPE_020,%pc@(L(cputype)+3); jeq lab
568 /* On the HP300 we use the on-board LEDs for debug output before
569 the console is running. Writing a 1 bit turns the corresponding LED
570 _off_ - on the 340 bit 7 is towards the back panel of the machine. */
572 #if defined(CONFIG_HP300) || defined(CONFIG_APOLLO)
584 * Version numbers of the bootinfo interface
585 * The area from _stext to _start will later be used as kernel pointer table
587 bras 1f /* Jump over bootinfo version numbers */
589 .long BOOTINFOV_MAGIC
590 .long MACH_AMIGA, AMIGA_BOOTI_VERSION
591 .long MACH_ATARI, ATARI_BOOTI_VERSION
592 .long MACH_MVME147, MVME147_BOOTI_VERSION
593 .long MACH_MVME16x, MVME16x_BOOTI_VERSION
594 .long MACH_BVME6000, BVME6000_BOOTI_VERSION
595 .long MACH_MAC, MAC_BOOTI_VERSION
596 .long MACH_Q40, Q40_BOOTI_VERSION
600 .equ kernel_pg_dir,_stext
602 .equ .,_stext+PAGESIZE
610 /* This is a hack. The HP NetBSD bootloader loads us at an arbitrary
611 address (apparently 0xff002000 in practice) which is not good if we need
612 to be able to map this to VA 0x1000. We could do it with pagetables but
613 a better solution seems to be to relocate the kernel in physical memory
616 So, we copy the entire kernel image (code+data+bss) down to the 16MB
617 boundary that marks the start of RAM. This is slightly tricky because
618 we must not overwrite the copying code itself. :-) */
620 /* 15/5/98. The start address of physical RAM changes depending on how much
621 RAM is present. This is actually a blessing in disguise as it provides
622 a way for us to work out the RAM size rather than hardwiring it. */
627 lea %pc@(hp300_phys_ram_base),%a0
629 movel %pc@(L(custom)),%a3
631 moveb %d7,%a3@(0x1ffff)
632 lea %pc@(Lcopystart),%a0
633 lea %pc@(Lcopyend),%a1
634 movel %d6,%a2 /* Start of physical RAM */
641 moveb %d7,%a3@(0x1ffff)
648 moveb %d7,%a3@(0x1ffff)
649 movel %d6,%a2 /* Start of kernel */
656 moveb %d7,%a3@(0x1ffff)
664 moveb %d7,%a3@(0x1ffff)
665 #endif /* CONFIG_HP300 */
668 * Setup initial stack pointer
673 * Record the CPU and machine type.
677 get_bi_record BI_MACHTYPE
678 lea %pc@(m68k_machtype),%a1
681 get_bi_record BI_FPUTYPE
682 lea %pc@(m68k_fputype),%a1
685 get_bi_record BI_MMUTYPE
686 lea %pc@(m68k_mmutype),%a1
689 get_bi_record BI_CPUTYPE
690 lea %pc@(m68k_cputype),%a1
692 #else /* CONFIG_HP300 */
693 /* FIXME HP300 doesn't use bootinfo yet */
694 movel #MACH_HP300,%d4
695 lea %pc@(m68k_machtype),%a0
698 lea %pc@(m68k_fputype),%a0
701 lea %pc@(m68k_mmutype),%a0
704 lea %pc@(m68k_cputype),%a0
708 #endif /* CONFIG_HP300 */
712 * For Macintosh, we need to determine the display parameters early (at least
713 * while debugging it).
716 is_not_mac(L(test_notmac))
718 get_bi_record BI_MAC_VADDR
719 lea %pc@(L(mac_videobase)),%a1
722 get_bi_record BI_MAC_VDEPTH
723 lea %pc@(L(mac_videodepth)),%a1
726 get_bi_record BI_MAC_VDIM
727 lea %pc@(L(mac_dimensions)),%a1
730 get_bi_record BI_MAC_VROW
731 lea %pc@(L(mac_rowbytes)),%a1
734 #ifdef MAC_SERIAL_DEBUG
735 get_bi_record BI_MAC_SCCBASE
736 lea %pc@(L(mac_sccbase)),%a1
738 #endif /* MAC_SERIAL_DEBUG */
744 lea %pc@(L(mac_videobase)),%a0
746 lea %pc@(L(mac_dimensions)),%a0
748 swap %d1 /* #rows is high bytes */
749 andl #0xFFFF,%d1 /* rows */
751 lea %pc@(L(mac_rowbytes)),%a0
762 #endif /* CONFIG_MAC */
766 * There are ultimately two pieces of information we want for all kinds of
767 * processors CpuType and CacheBits. The CPUTYPE was passed in from booter
768 * and is converted here from a booter type definition to a separate bit
769 * number which allows for the standard is_0x0 macro tests.
771 movel %pc@(m68k_cputype),%d0
778 * Test the BootInfo cputype for 060
782 bset #CPUTYPE_060,%d1
783 bset #CPUTYPE_0460,%d1
787 * Test the BootInfo cputype for 040
791 bset #CPUTYPE_040,%d1
792 bset #CPUTYPE_0460,%d1
796 * Test the BootInfo cputype for 020
800 bset #CPUTYPE_020,%d1
804 * Record the cpu type
806 lea %pc@(L(cputype)),%a0
812 * Now the macros are valid:
821 * Determine the cache mode for pages holding MMU tables
822 * and for supervisor mode, unused for '020 and '030
827 is_not_040_or_060(L(save_cachetype))
831 * d1 := cacheable write-through
832 * NOTE: The 68040 manual strongly recommends non-cached for MMU tables,
833 * but we have been using write-through since at least 2.0.29 so I
836 #ifdef CONFIG_060_WRITETHROUGH
838 * If this is a 68060 board using drivers with cache coherency
839 * problems, then supervisor memory accesses need to be write-through
840 * also; otherwise, we want copyback.
844 movel #_PAGE_CACHE040W,%d0
845 jra L(save_cachetype)
846 #endif /* CONFIG_060_WRITETHROUGH */
848 movew #_PAGE_CACHE040,%d0
850 movel #_PAGE_CACHE040W,%d1
853 /* Save cache mode for supervisor mode and page tables
855 lea %pc@(m68k_supervisor_cachemode),%a0
857 lea %pc@(m68k_pgtable_cachemode),%a0
861 * raise interrupt level
866 If running on an Atari, determine the I/O base of the
867 serial port and test if we are running on a Medusa or Hades.
868 This test is necessary here, because on the Hades the serial
869 port is only accessible in the high I/O memory area.
871 The test whether it is a Medusa is done by writing to the byte at
872 phys. 0x0. This should result in a bus error on all other machines.
874 ...should, but doesn't. The Afterburner040 for the Falcon has the
875 same behaviour (0x0..0x7 are no ROM shadow). So we have to do
876 another test to distinguish Medusa and AB040. This is a
877 read attempt for 0x00ff82fe phys. that should bus error on a Falcon
878 (+AB040), but is in the range where the Medusa always asserts DTACK.
880 The test for the Hades is done by reading address 0xb0000000. This
881 should give a bus error on the Medusa.
885 is_not_atari(L(notypetest))
887 /* get special machine type (Medusa/Hades/AB40) */
888 moveq #0,%d3 /* default if tag doesn't exist */
889 get_bi_record BI_ATARI_MCH_TYPE
893 lea %pc@(atari_mch_type),%a0
896 /* On the Hades, the iobase must be set up before opening the
897 * serial port. There are no I/O regs at 0x00ffxxxx at all. */
899 cmpl #ATARI_MACH_HADES,%d3
901 movel #0xff000000,%d0 /* Hades I/O base addr: 0xff000000 */
902 1: lea %pc@(L(iobase)),%a0
909 is_mvme147(L(getvmetype))
910 is_bvme6000(L(getvmetype))
911 is_not_mvme16x(L(gvtdone))
913 /* See if the loader has specified the BI_VME_TYPE tag. Recent
914 * versions of VMELILO and TFTPLILO do this. We have to do this
915 * early so we know how to handle console output. If the tag
916 * doesn't exist then we use the Bug for output on MVME16x.
919 get_bi_record BI_VME_TYPE
923 lea %pc@(vme_brdtype),%a0
926 #ifdef CONFIG_MVME16x
927 is_not_mvme16x(L(gvtdone))
929 /* Need to get the BRD_ID info to differentiate between 162, 167,
930 * etc. This is available as a BI_VME_BRDINFO tag with later
931 * versions of VMELILO and TFTPLILO, otherwise we call the Bug.
933 get_bi_record BI_VME_BRDINFO
937 /* Get pointer to board ID data from Bug */
940 .word 0x70 /* trap 0x70 - .BRD_ID */
943 lea %pc@(mvme_bdid),%a1
944 /* Structure is 32 bytes long */
960 * Initialize serial port
971 #ifdef CONSOLE_PENGUIN
973 #endif /* CONSOLE_PENGUIN */
977 #endif /* CONFIG_MAC */
984 #endif /* CONFIG_HP300 */
985 dputn %pc@(L(cputype))
986 dputn %pc@(m68k_supervisor_cachemode)
987 dputn %pc@(m68k_pgtable_cachemode)
991 * Save physical start address of kernel
993 lea %pc@(L(phys_kernel_start)),%a0
996 addl #PAGE_OFFSET,%a1
1006 * This block of code does what's necessary to map in the various kinds
1007 * of machines for execution of Linux.
1008 * First map the first 4 MB of kernel code & data
1011 mmu_map #PAGE_OFFSET,%pc@(L(phys_kernel_start)),#4*1024*1024,\
1012 %pc@(m68k_supervisor_cachemode)
1020 is_not_amiga(L(mmu_init_not_amiga))
1027 is_not_040_or_060(1f)
1030 * 040: Map the 16Meg range physical 0x0 upto logical 0x8000.0000
1032 mmu_map #0x80000000,#0,#0x01000000,#_PAGE_NOCACHE_S
1034 * Map the Zorro III I/O space with transparent translation
1035 * for frame buffer memory etc.
1037 mmu_map_tt #1,#0x40000000,#0x20000000,#_PAGE_NOCACHE_S
1039 jbra L(mmu_init_done)
1043 * 030: Map the 32Meg range physical 0x0 upto logical 0x8000.0000
1045 mmu_map #0x80000000,#0,#0x02000000,#_PAGE_NOCACHE030
1046 mmu_map_tt #1,#0x40000000,#0x20000000,#_PAGE_NOCACHE030
1048 jbra L(mmu_init_done)
1050 L(mmu_init_not_amiga):
1057 is_not_atari(L(mmu_init_not_atari))
1061 /* On the Atari, we map the I/O region (phys. 0x00ffxxxx) by mapping
1062 the last 16 MB of virtual address space to the first 16 MB (i.e.
1063 0xffxxxxxx -> 0x00xxxxxx). For this, an additional pointer table is
1064 needed. I/O ranges are marked non-cachable.
1066 For the Medusa it is better to map the I/O region transparently
1067 (i.e. 0xffxxxxxx -> 0xffxxxxxx), because some I/O registers are
1068 accessible only in the high area.
1070 On the Hades all I/O registers are only accessible in the high
1074 /* I/O base addr for non-Medusa, non-Hades: 0x00000000 */
1076 movel %pc@(atari_mch_type),%d3
1077 cmpl #ATARI_MACH_MEDUSA,%d3
1079 cmpl #ATARI_MACH_HADES,%d3
1081 2: movel #0xff000000,%d0 /* Medusa/Hades base addr: 0xff000000 */
1084 is_040_or_060(L(spata68040))
1086 /* Map everything non-cacheable, though not all parts really
1087 * need to disable caches (crucial only for 0xff8000..0xffffff
1088 * (standard I/O) and 0xf00000..0xf3ffff (IDE)). The remainder
1089 * isn't really used, except for sometimes peeking into the
1090 * ROMs (mirror at phys. 0x0), so caching isn't necessary for
1092 mmu_map #0xff000000,%d3,#0x01000000,#_PAGE_NOCACHE030
1094 jbra L(mmu_init_done)
1098 mmu_map #0xff000000,%d3,#0x01000000,#_PAGE_NOCACHE_S
1100 jbra L(mmu_init_done)
1102 L(mmu_init_not_atari):
1106 is_not_q40(L(notq40))
1108 * add transparent mapping for 0xff00 0000 - 0xffff ffff
1109 * non-cached serialized etc..
1110 * this includes master chip, DAC, RTC and ISA ports
1111 * 0xfe000000-0xfeffffff is for screen and ROM
1116 mmu_map_tt #0,#0xfe000000,#0x01000000,#_PAGE_CACHE040W
1117 mmu_map_tt #1,#0xff000000,#0x01000000,#_PAGE_NOCACHE_S
1119 jbra L(mmu_init_done)
1125 is_not_hp300(L(nothp300))
1127 /* On the HP300, we map the ROM, INTIO and DIO regions (phys. 0x00xxxxxx)
1128 by mapping 32MB from 0xf0xxxxxx -> 0x00xxxxxx) using an 030 early
1129 termination page descriptor. The ROM mapping is needed because the LEDs
1130 are mapped there too. */
1132 mmu_map #0xf0000000,#0,#0x02000000,#_PAGE_NOCACHE030
1138 #ifdef CONFIG_MVME147
1140 is_not_mvme147(L(not147))
1143 * On MVME147 we have already created kernel page tables for
1144 * 4MB of RAM at address 0, so now need to do a transparent
1145 * mapping of the top of memory space. Make it 0.5GByte for now,
1146 * so we can access on-board i/o areas.
1149 mmu_map_tt #1,#0xe0000000,#0x20000000,#_PAGE_NOCACHE030
1151 jbra L(mmu_init_done)
1154 #endif /* CONFIG_MVME147 */
1156 #ifdef CONFIG_MVME16x
1158 is_not_mvme16x(L(not16x))
1161 * On MVME16x we have already created kernel page tables for
1162 * 4MB of RAM at address 0, so now need to do a transparent
1163 * mapping of the top of memory space. Make it 0.5GByte for now.
1164 * Supervisor only access, so transparent mapping doesn't
1165 * clash with User code virtual address space.
1166 * this covers IO devices, PROM and SRAM. The PROM and SRAM
1167 * mapping is needed to allow 167Bug to run.
1168 * IO is in the range 0xfff00000 to 0xfffeffff.
1169 * PROM is 0xff800000->0xffbfffff and SRAM is
1170 * 0xffe00000->0xffe1ffff.
1173 mmu_map_tt #1,#0xe0000000,#0x20000000,#_PAGE_NOCACHE_S
1175 jbra L(mmu_init_done)
1178 #endif /* CONFIG_MVME162 | CONFIG_MVME167 */
1180 #ifdef CONFIG_BVME6000
1182 is_not_bvme6000(L(not6000))
1185 * On BVME6000 we have already created kernel page tables for
1186 * 4MB of RAM at address 0, so now need to do a transparent
1187 * mapping of the top of memory space. Make it 0.5GByte for now,
1188 * so we can access on-board i/o areas.
1189 * Supervisor only access, so transparent mapping doesn't
1190 * clash with User code virtual address space.
1193 mmu_map_tt #1,#0xe0000000,#0x20000000,#_PAGE_NOCACHE_S
1195 jbra L(mmu_init_done)
1198 #endif /* CONFIG_BVME6000 */
1203 * The Macintosh mappings are less clear.
1205 * Even as of this writing, it is unclear how the
1206 * Macintosh mappings will be done. However, as
1207 * the first author of this code I'm proposing the
1210 * Map the kernel (that's already done),
1211 * Map the I/O (on most machines that's the
1212 * 0x5000.0000 ... 0x5300.0000 range,
1213 * Map the video frame buffer using as few pages
1214 * as absolutely (this requirement mostly stems from
1215 * the fact that when the frame buffer is at
1216 * 0x0000.0000 then we know there is valid RAM just
1217 * above the screen that we don't want to waste!).
1219 * By the way, if the frame buffer is at 0x0000.0000
1220 * then the Macintosh is known as an RBV based Mac.
1222 * By the way 2, the code currently maps in a bunch of
1223 * regions. But I'd like to cut that out. (And move most
1224 * of the mappings up into the kernel proper ... or only
1225 * map what's necessary.)
1232 is_not_mac(L(mmu_init_not_mac))
1236 is_not_040_or_060(1f)
1238 moveq #_PAGE_NOCACHE_S,%d3
1241 moveq #_PAGE_NOCACHE030,%d3
1244 * Mac Note: screen address of logical 0xF000.0000 -> <screen physical>
1245 * we simply map the 4MB that contains the videomem
1248 movel #VIDEOMEMMASK,%d0
1249 andl %pc@(L(mac_videobase)),%d0
1251 mmu_map #VIDEOMEMBASE,%d0,#VIDEOMEMSIZE,%d3
1252 /* ROM from 4000 0000 to 4200 0000 (only for mac_reset()) */
1253 mmu_map_eq #0x40000000,#0x02000000,%d3
1254 /* IO devices (incl. serial port) from 5000 0000 to 5300 0000 */
1255 mmu_map_eq #0x50000000,#0x03000000,%d3
1256 /* Nubus slot space (video at 0xF0000000, rom at 0xF0F80000) */
1257 mmu_map_tt #1,#0xf8000000,#0x08000000,%d3
1259 jbra L(mmu_init_done)
1261 L(mmu_init_not_mac):
1265 is_not_sun3x(L(notsun3x))
1267 /* oh, the pain.. We're gonna want the prom code after
1268 * starting the MMU, so we copy the mappings, translating
1269 * from 8k -> 4k pages as we go.
1272 /* copy maps from 0xfee00000 to 0xff000000 */
1273 movel #0xfee00000, %d0
1274 moveq #ROOT_INDEX_SHIFT, %d1
1276 mmu_get_root_table_entry %d0
1278 movel #0xfee00000, %d0
1279 moveq #PTR_INDEX_SHIFT, %d1
1281 andl #PTR_TABLE_SIZE-1, %d0
1282 mmu_get_ptr_table_entry %a0,%d0
1284 movel #0xfee00000, %d0
1285 moveq #PAGE_INDEX_SHIFT, %d1
1287 andl #PAGE_TABLE_SIZE-1, %d0
1288 mmu_get_page_table_entry %a0,%d0
1290 /* this is where the prom page table lives */
1291 movel 0xfefe00d4, %a1
1294 movel #((0x200000 >> 13)-1), %d1
1304 /* setup tt1 for I/O */
1305 mmu_map_tt #1,#0x40000000,#0x40000000,#_PAGE_NOCACHE_S
1306 jbra L(mmu_init_done)
1311 #ifdef CONFIG_APOLLO
1312 is_not_apollo(L(notapollo))
1315 mmu_map #0x80000000,#0,#0x02000000,#_PAGE_NOCACHE030
1318 jbra L(mmu_init_done)
1329 * On the 040 class machines, all pages that are used for the
1330 * mmu have to be fixed up. According to Motorola, pages holding mmu
1331 * tables should be non-cacheable on a '040 and write-through on a
1332 * '060. But analysis of the reasons for this, and practical
1333 * experience, showed that write-through also works on a '040.
1335 * Allocated memory so far goes from kernel_end to memory_start that
1336 * is used for all kind of tables, for that the cache attributes
1341 is_not_040_or_060(L(mmu_fixup_done))
1343 #ifdef MMU_NOCACHE_KERNEL
1344 jbra L(mmu_fixup_done)
1347 /* first fix the page at the start of the kernel, that
1348 * contains also kernel_pg_dir.
1350 movel %pc@(L(phys_kernel_start)),%d0
1351 subl #PAGE_OFFSET,%d0
1352 lea %pc@(_stext),%a0
1354 mmu_fixup_page_mmu_cache %a0
1356 movel %pc@(L(kernel_end)),%a0
1358 movel %pc@(L(memory_start)),%a1
1362 mmu_fixup_page_mmu_cache %a0
1377 * This chunk of code performs the gruesome task of engaging the MMU.
1378 * The reason its gruesome is because when the MMU becomes engaged it
1379 * maps logical addresses to physical addresses. The Program Counter
1380 * register is then passed through the MMU before the next instruction
1381 * is fetched (the instruction following the engage MMU instruction).
1382 * This may mean one of two things:
1383 * 1. The Program Counter falls within the logical address space of
1384 * the kernel of which there are two sub-possibilities:
1385 * A. The PC maps to the correct instruction (logical PC == physical
1386 * code location), or
1387 * B. The PC does not map through and the processor will read some
1388 * data (or instruction) which is not the logically next instr.
1389 * As you can imagine, A is good and B is bad.
1391 * 2. The Program Counter does not map through the MMU. The processor
1392 * will take a Bus Error.
1393 * Clearly, 2 is bad.
1394 * It doesn't take a wiz kid to figure you want 1.A.
1395 * This code creates that possibility.
1396 * There are two possible 1.A. states (we now ignore the other above states):
1397 * A. The kernel is located at physical memory addressed the same as
1398 * the logical memory for the kernel, i.e., 0x01000.
1399 * B. The kernel is located some where else. e.g., 0x0400.0000
1401 * Under some conditions the Macintosh can look like A or B.
1402 * [A friend and I once noted that Apple hardware engineers should be
1403 * wacked twice each day: once when they show up at work (as in, Whack!,
1404 * "This is for the screwy hardware we know you're going to design today."),
1405 * and also at the end of the day (as in, Whack! "I don't know what
1406 * you designed today, but I'm sure it wasn't good."). -- rst]
1408 * This code works on the following premise:
1409 * If the kernel start (%d5) is within the first 16 Meg of RAM,
1410 * then create a mapping for the kernel at logical 0x8000.0000 to
1411 * the physical location of the pc. And, create a transparent
1412 * translation register for the first 16 Meg. Then, after the MMU
1413 * is engaged, the PC can be moved up into the 0x8000.0000 range
1414 * and then the transparent translation can be turned off and then
1415 * the PC can jump to the correct logical location and it will be
1416 * home (finally). This is essentially the code that the Amiga used
1417 * to use. Now, it's generalized for all processors. Which means
1418 * that a fresh (but temporary) mapping has to be created. The mapping
1419 * is made in page 0 (an as of yet unused location -- except for the
1420 * stack!). This temporary mapping will only require 1 pointer table
1421 * and a single page table (it can map 256K).
1423 * OK, alternatively, imagine that the Program Counter is not within
1424 * the first 16 Meg. Then, just use Transparent Translation registers
1425 * to do the right thing.
1427 * Last, if _start is already at 0x01000, then there's nothing special
1428 * to do (in other words, in a degenerate case of the first case above,
1441 * After this point no new memory is allocated and
1442 * the start of available memory is stored in availmem.
1443 * (The bootmem allocator requires now the physicall address.)
1446 movel L(memory_start),availmem
1450 /* fixup the Amiga custom register location before printing */
1457 /* fixup the Atari iobase register location before printing */
1458 movel #0xff000000,L(iobase)
1464 movel #~VIDEOMEMMASK,%d0
1465 andl L(mac_videobase),%d0
1466 addl #VIDEOMEMBASE,%d0
1467 movel %d0,L(mac_videobase)
1468 #if defined(CONSOLE)
1469 movel %pc@(L(phys_kernel_start)),%d0
1470 subl #PAGE_OFFSET,%d0
1471 subl %d0,L(console_font)
1472 subl %d0,L(console_font_data)
1474 #ifdef MAC_SERIAL_DEBUG
1475 orl #0x50000000,L(mac_sccbase)
1483 * Fix up the custom register to point to the new location of the LEDs.
1485 movel #0xf0000000,L(custom)
1488 * Energise the FPU and caches.
1490 movel #0x60,0xf05f400c
1498 oriw #0x4000,0x61000000
1502 #ifdef CONFIG_APOLLO
1506 * Fix up the iobase before printing
1508 movel #0x80000000,L(iobase)
1519 is_not_040_or_060(L(cache_not_680460))
1527 is_060(L(cache68060))
1529 movel #CC6_ENABLE_D+CC6_ENABLE_I,%d0
1530 /* MMU stuff works in copyback mode now, so enable the cache */
1535 movel #CC6_ENABLE_D+CC6_ENABLE_I+CC6_ENABLE_SB+CC6_PUSH_DPI+CC6_ENABLE_B+CC6_CLRA_B,%d0
1536 /* MMU stuff works in copyback mode now, so enable the cache */
1538 /* enable superscalar dispatch in PCR */
1544 L(cache_not_680460):
1547 movel #CC3_ENABLE_DB+CC3_CLR_D+CC3_ENABLE_D+CC3_ENABLE_IB+CC3_CLR_I+CC3_ENABLE_I,%d0
1557 * Setup initial stack pointer
1559 lea init_task,%curptr
1560 lea init_thread_union+THREAD_SIZE,%sp
1564 subl %a6,%a6 /* clear a6 for gdb */
1567 * The new 64bit printf support requires an early exception initialization.
1571 /* jump to the kernel start */
1579 * Find a tag record in the bootinfo structure
1580 * The bootinfo structure is located right after the kernel bss
1581 * Returns: d0: size (-1 if not found)
1582 * a0: data pointer (end-of-records if not found)
1584 func_start get_bi_record,%d1
1588 #ifndef CONFIG_HP300
1589 1: tstw %a0@(BIR_TAG)
1591 cmpw %a0@(BIR_TAG),%d0
1593 addw %a0@(BIR_SIZE),%a0
1596 movew %a0@(BIR_SIZE),%d0
1597 lea %a0@(BIR_DATA),%a0
1600 lea %a0@(BIR_SIZE),%a0
1602 #endif /* CONFIG_HP300 */
1603 func_return get_bi_record
1607 * MMU Initialization Begins Here
1609 * The structure of the MMU tables on the 68k machines
1612 * Logical addresses are translated through
1613 * a hierarchical translation mechanism where the high-order
1614 * seven bits of the logical address (LA) are used as an
1615 * index into the "root table." Each entry in the root
1616 * table has a bit which specifies if it's a valid pointer to a
1617 * pointer table. Each entry defines a 32KMeg range of memory.
1618 * If an entry is invalid then that logical range of 32M is
1619 * invalid and references to that range of memory (when the MMU
1620 * is enabled) will fault. If the entry is valid, then it does
1621 * one of two things. On 040/060 class machines, it points to
1622 * a pointer table which then describes more finely the memory
1623 * within that 32M range. On 020/030 class machines, a technique
1624 * called "early terminating descriptors" are used. This technique
1625 * allows an entire 32Meg to be described by a single entry in the
1626 * root table. Thus, this entry in the root table, contains the
1627 * physical address of the memory or I/O at the logical address
1628 * which the entry represents and it also contains the necessary
1629 * cache bits for this region.
1632 * Per the Root Table, there will be one or more
1633 * pointer tables. Each pointer table defines a 32M range.
1634 * Not all of the 32M range need be defined. Again, the next
1635 * seven bits of the logical address are used an index into
1636 * the pointer table to point to page tables (if the pointer
1637 * is valid). There will undoubtedly be more than one
1638 * pointer table for the kernel because each pointer table
1639 * defines a range of only 32M. Valid pointer table entries
1640 * point to page tables, or are early terminating entries
1644 * Per the Pointer Tables, each page table entry points
1645 * to the physical page in memory that supports the logical
1646 * address that translates to the particular index.
1648 * In short, the Logical Address gets translated as follows:
1649 * bits 31..26 - index into the Root Table
1650 * bits 25..18 - index into the Pointer Table
1651 * bits 17..12 - index into the Page Table
1652 * bits 11..0 - offset into a particular 4K page
1654 * The algorithms which follows do one thing: they abstract
1655 * the MMU hardware. For example, there are three kinds of
1656 * cache settings that are relevant. Either, memory is
1657 * being mapped in which case it is either Kernel Code (or
1658 * the RamDisk) or it is MMU data. On the 030, the MMU data
1659 * option also describes the kernel. Or, I/O is being mapped
1660 * in which case it has its own kind of cache bits. There
1661 * are constants which abstract these notions from the code that
1662 * actually makes the call to map some range of memory.
1672 * This algorithm will print out the current MMU mappings.
1675 * %a5 points to the root table. Everything else is calculated
1679 #define mmu_next_valid 0
1680 #define mmu_start_logical 4
1681 #define mmu_next_logical 8
1682 #define mmu_start_physical 12
1683 #define mmu_next_physical 16
1685 #define MMU_PRINT_INVALID -1
1686 #define MMU_PRINT_VALID 1
1687 #define MMU_PRINT_UNINITED 0
1689 #define putZc(z,n) jbne 1f; putc z; jbra 2f; 1: putc n; 2:
1691 func_start mmu_print,%a0-%a6/%d0-%d7
1693 movel %pc@(L(kernel_pgdir_ptr)),%a5
1694 lea %pc@(L(mmu_print_data)),%a0
1695 movel #MMU_PRINT_UNINITED,%a0@(mmu_next_valid)
1697 is_not_040_or_060(mmu_030_print)
1706 * The following #if/#endif block is a tight algorithm for dumping the 040
1707 * MMU Map in gory detail. It really isn't that practical unless the
1708 * MMU Map algorithm appears to go awry and you need to debug it at the
1709 * entry per entry level.
1711 movel #ROOT_TABLE_SIZE,%d5
1713 movel %a5@+,%d7 | Burn an entry to skip the kernel mappings,
1714 subql #1,%d5 | they (might) work
1724 andil #0xFFFFFE00,%d7
1726 movel #PTR_TABLE_SIZE,%d4
1736 andil #0xFFFFFF00,%d7
1738 movel #PAGE_TABLE_SIZE,%d3
1752 movel #8+1+8+1+1,%d2
1767 #endif /* MMU 040 Dumping code that's gory and detailed */
1769 lea %pc@(kernel_pg_dir),%a5
1770 movel %a5,%a0 /* a0 has the address of the root table ptr */
1771 movel #0x00000000,%a4 /* logical address */
1774 /* Increment the logical address and preserve in d5 */
1776 addil #PAGESIZE<<13,%d5
1780 jbsr mmu_print_tuple_invalidate
1784 andil #0xfffffe00,%d6
1788 addil #PAGESIZE<<6,%d5
1792 jbsr mmu_print_tuple_invalidate
1796 andil #0xffffff00,%d6
1804 jbsr mmu_print_tuple_invalidate
1807 moveml %d0-%d1,%sp@-
1810 andil #0xfffff4e0,%d1
1811 lea %pc@(mmu_040_print_flags),%a6
1812 jbsr mmu_print_tuple
1813 moveml %sp@+,%d0-%d1
1825 movel %d5,%a4 /* move to the next logical address */
1833 andiw #0x8000,%d1 /* is it valid ? */
1834 jbeq 1f /* No, bail out */
1837 andil #0xff000000,%d1 /* Get the address */
1843 jbsr mmu_040_print_flags_tt
1847 andiw #0x8000,%d1 /* is it valid ? */
1848 jbeq 1f /* No, bail out */
1851 andil #0xff000000,%d1 /* Get the address */
1857 jbsr mmu_040_print_flags_tt
1863 mmu_040_print_flags:
1865 putZc(' ','G') /* global bit */
1867 putZc(' ','S') /* supervisor bit */
1868 mmu_040_print_flags_tt:
1873 putZc('w','c') /* write through or copy-back */
1878 putZc('s',' ') /* serialized non-cacheable, or non-cacheable */
1882 mmu_030_print_flags:
1884 putZc('C','I') /* write through or copy-back */
1893 andil #0xfffffff0,%d0
1895 movel #0x00000000,%a4 /* logical address */
1899 addil #PAGESIZE<<13,%d5
1901 btst #1,%d6 /* is it a table ptr? */
1903 btst #0,%d6 /* is it early terminating? */
1905 jbsr mmu_030_print_helper
1908 jbsr mmu_print_tuple_invalidate
1912 andil #0xfffffff0,%d6
1916 addil #PAGESIZE<<6,%d5
1918 btst #1,%d6 /* is it a table ptr? */
1920 btst #0,%d6 /* is it a page descriptor? */
1922 jbsr mmu_030_print_helper
1925 jbsr mmu_print_tuple_invalidate
1929 andil #0xfffffff0,%d6
1937 jbsr mmu_print_tuple_invalidate
1940 jbsr mmu_030_print_helper
1952 movel %d5,%a4 /* move to the next logical address */
1960 func_return mmu_print
1963 mmu_030_print_helper:
1964 moveml %d0-%d1,%sp@-
1967 lea %pc@(mmu_030_print_flags),%a6
1968 jbsr mmu_print_tuple
1969 moveml %sp@+,%d0-%d1
1972 mmu_print_tuple_invalidate:
1973 moveml %a0/%d7,%sp@-
1975 lea %pc@(L(mmu_print_data)),%a0
1976 tstl %a0@(mmu_next_valid)
1977 jbmi mmu_print_tuple_invalidate_exit
1979 movel #MMU_PRINT_INVALID,%a0@(mmu_next_valid)
1985 mmu_print_tuple_invalidate_exit:
1986 moveml %sp@+,%a0/%d7
1991 moveml %d0-%d7/%a0,%sp@-
1993 lea %pc@(L(mmu_print_data)),%a0
1995 tstl %a0@(mmu_next_valid)
1996 jble mmu_print_tuple_print
1998 cmpl %a0@(mmu_next_physical),%d1
1999 jbeq mmu_print_tuple_increment
2001 mmu_print_tuple_print:
2009 mmu_print_tuple_record:
2010 movel #MMU_PRINT_VALID,%a0@(mmu_next_valid)
2012 movel %d1,%a0@(mmu_next_physical)
2014 mmu_print_tuple_increment:
2017 addl %d7,%a0@(mmu_next_physical)
2019 mmu_print_tuple_exit:
2020 moveml %sp@+,%d0-%d7/%a0
2023 mmu_print_machine_cpu_types:
2045 is_not_040_or_060(2f)
2053 #endif /* MMU_PRINT */
2058 * This is a specific function which works on all 680x0 machines.
2059 * On 030, 040 & 060 it will attempt to use Transparent Translation
2061 * On 020 it will call the standard mmu_map which will use early
2062 * terminating descriptors.
2064 func_start mmu_map_tt,%d0/%d1/%a0,4
2075 /* Extract the highest bit set
2077 bfffo ARG3{#0,#32},%d1
2093 /* Generate the upper 16bit of the tt register
2099 is_040_or_060(L(mmu_map_tt_040))
2101 /* set 030 specific bits (read/write access for supervisor mode
2102 * (highest function code set, lower two bits masked))
2104 orw #TTR_ENABLE+TTR_RWM+TTR_FCB2+TTR_FCM1+TTR_FCM0,%d1
2120 jra L(mmu_map_tt_done)
2122 /* set 040 specific bits
2125 orw #TTR_ENABLE+TTR_KERNELMODE,%d1
2139 jra L(mmu_map_tt_done)
2142 mmu_map_eq ARG2,ARG3,ARG4
2146 func_return mmu_map_tt
2151 * This routine will map a range of memory using a pointer
2152 * table and allocating the pages on the fly from the kernel.
2153 * The pointer table does not have to be already linked into
2154 * the root table, this routine will do that if necessary.
2157 * This routine will assert failure and use the serial_putc
2158 * routines in the case of a run-time error. For example,
2159 * if the address is already mapped.
2162 * This routine will use early terminating descriptors
2163 * where possible for the 68020+68851 and 68030 type
2166 func_start mmu_map,%d0-%d4/%a0-%a4
2175 /* Get logical address and round it down to 256KB
2178 andl #-(PAGESIZE*PAGE_TABLE_SIZE),%d0
2181 /* Get the end address
2187 /* Get physical address and round it down to 256KB
2190 andl #-(PAGESIZE*PAGE_TABLE_SIZE),%d0
2193 /* Add page attributes to the physical address
2196 orw #_PAGE_PRESENT+_PAGE_ACCESSED+_PAGE_DIRTY,%d0
2203 is_not_040_or_060(L(mmu_map_030))
2205 addw #_PAGE_GLOBAL040,%a2
2207 * MMU 040 & 060 Support
2209 * The MMU usage for the 040 and 060 is different enough from
2210 * the 030 and 68851 that there is separate code. This comment
2211 * block describes the data structures and algorithms built by
2214 * The 040 does not support early terminating descriptors, as
2215 * the 030 does. Therefore, a third level of table is needed
2216 * for the 040, and that would be the page table. In Linux,
2217 * page tables are allocated directly from the memory above the
2223 /* Calculate the offset into the root table
2226 moveq #ROOT_INDEX_SHIFT,%d1
2228 mmu_get_root_table_entry %d0
2230 /* Calculate the offset into the pointer table
2233 moveq #PTR_INDEX_SHIFT,%d1
2235 andl #PTR_TABLE_SIZE-1,%d0
2236 mmu_get_ptr_table_entry %a0,%d0
2238 /* Calculate the offset into the page table
2241 moveq #PAGE_INDEX_SHIFT,%d1
2243 andl #PAGE_TABLE_SIZE-1,%d0
2244 mmu_get_page_table_entry %a0,%d0
2246 /* The page table entry must not no be busy
2249 jne L(mmu_map_error)
2251 /* Do the mapping and advance the pointers
2258 /* Ready with mapping?
2266 /* Calculate the offset into the root table
2269 moveq #ROOT_INDEX_SHIFT,%d1
2271 mmu_get_root_table_entry %d0
2273 /* Check if logical address 32MB aligned,
2274 * so we can try to map it once
2277 andl #(PTR_TABLE_SIZE*PAGE_TABLE_SIZE*PAGESIZE-1)&(-ROOT_TABLE_SIZE),%d0
2280 /* Is there enough to map for 32MB at once
2282 lea %a3@(PTR_TABLE_SIZE*PAGE_TABLE_SIZE*PAGESIZE-1),%a1
2288 /* The root table entry must not no be busy
2291 jne L(mmu_map_error)
2293 /* Do the mapping and advance the pointers
2303 lea %a2@(PTR_TABLE_SIZE*PAGE_TABLE_SIZE*PAGESIZE),%a2
2304 jra L(mmu_mapnext_030)
2306 /* Calculate the offset into the pointer table
2309 moveq #PTR_INDEX_SHIFT,%d1
2311 andl #PTR_TABLE_SIZE-1,%d0
2312 mmu_get_ptr_table_entry %a0,%d0
2314 /* The pointer table entry must not no be busy
2317 jne L(mmu_map_error)
2319 /* Do the mapping and advance the pointers
2327 addl #PAGE_TABLE_SIZE*PAGESIZE,%a2
2328 addl #PAGE_TABLE_SIZE*PAGESIZE,%a3
2331 /* Ready with mapping?
2340 dputs "mmu_map error:"
2352 * On the 040 class machines, all pages that are used for the
2353 * mmu have to be fixed up.
2356 func_start mmu_fixup_page_mmu_cache,%d0/%a0
2358 dputs "mmu_fixup_page_mmu_cache"
2361 /* Calculate the offset into the root table
2364 moveq #ROOT_INDEX_SHIFT,%d1
2366 mmu_get_root_table_entry %d0
2368 /* Calculate the offset into the pointer table
2371 moveq #PTR_INDEX_SHIFT,%d1
2373 andl #PTR_TABLE_SIZE-1,%d0
2374 mmu_get_ptr_table_entry %a0,%d0
2376 /* Calculate the offset into the page table
2379 moveq #PAGE_INDEX_SHIFT,%d1
2381 andl #PAGE_TABLE_SIZE-1,%d0
2382 mmu_get_page_table_entry %a0,%d0
2385 andil #_CACHEMASK040,%d0
2386 orl %pc@(m68k_pgtable_cachemode),%d0
2391 func_return mmu_fixup_page_mmu_cache
2396 * create a temporary mapping to enable the mmu,
2397 * this we don't need any transparation translation tricks.
2400 func_start mmu_temp_map,%d0/%d1/%a0/%a1
2402 dputs "mmu_temp_map"
2407 lea %pc@(L(temp_mmap_mem)),%a1
2409 /* Calculate the offset in the root table
2412 moveq #ROOT_INDEX_SHIFT,%d1
2414 mmu_get_root_table_entry %d0
2416 /* Check if the table is temporary allocated, so we have to reuse it
2419 cmpl %pc@(L(memory_start)),%d0
2422 /* Temporary allocate a ptr table and insert it into the root table
2425 addl #PTR_TABLE_SIZE*4,%a1@
2426 orw #_PAGE_TABLE+_PAGE_ACCESSED,%d0
2431 /* Mask the root table entry for the ptr table
2433 andw #-ROOT_TABLE_SIZE,%d0
2436 /* Calculate the offset into the pointer table
2439 moveq #PTR_INDEX_SHIFT,%d1
2441 andl #PTR_TABLE_SIZE-1,%d0
2445 /* Check if a temporary page table is already allocated
2450 /* Temporary allocate a page table and insert it into the ptr table
2453 /* The 512 should be PAGE_TABLE_SIZE*4, but that violates the
2454 alignment restriction for pointer tables on the '0[46]0. */
2456 orw #_PAGE_TABLE+_PAGE_ACCESSED,%d0
2461 /* Mask the ptr table entry for the page table
2463 andw #-PTR_TABLE_SIZE,%d0
2466 /* Calculate the offset into the page table
2469 moveq #PAGE_INDEX_SHIFT,%d1
2471 andl #PAGE_TABLE_SIZE-1,%d0
2475 /* Insert the address into the page table
2479 orw #_PAGE_PRESENT+_PAGE_ACCESSED+_PAGE_DIRTY,%d0
2485 func_return mmu_temp_map
2487 func_start mmu_engage,%d0-%d2/%a0-%a3
2489 moveq #ROOT_TABLE_SIZE-1,%d0
2490 /* Temporarily use a different root table. */
2491 lea %pc@(L(kernel_pgdir_ptr)),%a0
2493 movel %pc@(L(memory_start)),%a1
2500 lea %pc@(L(temp_mmap_mem)),%a0
2503 movew #PAGESIZE-1,%d0
2510 /* Skip temp mappings if phys == virt */
2514 mmu_temp_map %a0,%a0
2515 mmu_temp_map %a0,%a1
2519 mmu_temp_map %a0,%a0
2520 mmu_temp_map %a0,%a1
2522 movel %pc@(L(memory_start)),%a3
2523 movel %pc@(L(phys_kernel_start)),%d2
2525 is_not_040_or_060(L(mmu_engage_030))
2535 movel #TC_ENABLE+TC_PAGE4K,%d0
2536 movec %d0,%tc /* enable the MMU */
2545 jra L(mmu_engage_cleanup)
2547 L(mmu_engage_030_temp):
2551 lea %pc@(L(mmu_engage_030_temp)),%a0
2552 movel #0x80000002,%a0@
2559 * enable,super root enable,4096 byte pages,7 bit root index,
2560 * 7 bit pointer index, 6 bit page table index.
2562 movel #0x82c07760,%a0@(8)
2563 pmove %a0@(8),%tc /* enable the MMU */
2565 1: movel %a2,%a0@(4)
2572 L(mmu_engage_cleanup):
2573 subl #PAGE_OFFSET,%d2
2575 movel %a2,L(kernel_pgdir_ptr)
2580 func_return mmu_engage
2582 func_start mmu_get_root_table_entry,%d0/%a1
2585 dputs "mmu_get_root_table_entry:"
2590 movel %pc@(L(kernel_pgdir_ptr)),%a0
2596 /* Find the start of free memory, get_bi_record does this for us,
2597 * as the bootinfo structure is located directly behind the kernel
2598 * and and we simply search for the last entry.
2600 get_bi_record BI_LAST
2601 addw #PAGESIZE-1,%a0
2607 lea %pc@(L(memory_start)),%a0
2609 lea %pc@(L(kernel_end)),%a0
2612 /* we have to return the first page at _stext since the init code
2613 * in mm/init.c simply expects kernel_pg_dir there, the rest of
2614 * page is used for further ptr tables in get_ptr_table.
2616 lea %pc@(_stext),%a0
2617 lea %pc@(L(mmu_cached_pointer_tables)),%a1
2619 addl #ROOT_TABLE_SIZE*4,%a1@
2621 lea %pc@(L(mmu_num_pointer_tables)),%a1
2627 movew #PAGESIZE/4-1,%d0
2632 lea %pc@(L(kernel_pgdir_ptr)),%a1
2646 func_return mmu_get_root_table_entry
2650 func_start mmu_get_ptr_table_entry,%d0/%a1
2653 dputs "mmu_get_ptr_table_entry:"
2663 /* Keep track of the number of pointer tables we use
2665 dputs "\nmmu_get_new_ptr_table:"
2666 lea %pc@(L(mmu_num_pointer_tables)),%a0
2670 /* See if there is a free pointer table in our cache of pointer tables
2672 lea %pc@(L(mmu_cached_pointer_tables)),%a1
2676 /* Get a new pointer table page from above the kernel memory
2681 /* There is an unused pointer table in our cache... use it
2684 addl #PTR_TABLE_SIZE*4,%a1@
2689 /* Insert the new pointer table into the root table
2692 orw #_PAGE_TABLE+_PAGE_ACCESSED,%d0
2695 /* Extract the pointer table entry
2697 andw #-PTR_TABLE_SIZE,%d0
2707 func_return mmu_get_ptr_table_entry
2710 func_start mmu_get_page_table_entry,%d0/%a1
2713 dputs "mmu_get_page_table_entry:"
2723 /* If the page table entry doesn't exist, we allocate a complete new
2724 * page and use it as one continues big page table which can cover
2725 * 4MB of memory, nearly almost all mappings have that alignment.
2728 addw #_PAGE_TABLE+_PAGE_ACCESSED,%a0
2730 /* align pointer table entry for a page of page tables
2733 andw #-(PAGESIZE/PAGE_TABLE_SIZE),%d0
2736 /* Insert the page tables into the pointer entries
2738 moveq #PAGESIZE/PAGE_TABLE_SIZE/4-1,%d0
2741 lea %a0@(PAGE_TABLE_SIZE*4),%a0
2744 /* Now we can get the initialized pointer table entry
2749 /* Extract the page table entry
2751 andw #-PAGE_TABLE_SIZE,%d0
2761 func_return mmu_get_page_table_entry
2766 * Return a new page from the memory start and clear it.
2768 func_start get_new_page,%d0/%a1
2770 dputs "\nget_new_page:"
2772 /* allocate the page and adjust memory_start
2774 lea %pc@(L(memory_start)),%a0
2778 /* clear the new page
2781 movew #PAGESIZE/4-1,%d0
2789 func_return get_new_page
2794 * Debug output support
2795 * Atarians have a choice between the parallel port, the serial port
2796 * from the MFP or a serial port of the SCC
2801 L(scc_initable_mac):
2802 .byte 9,12 /* Reset */
2803 .byte 4,0x44 /* x16, 1 stopbit, no parity */
2804 .byte 3,0xc0 /* receiver: 8 bpc */
2805 .byte 5,0xe2 /* transmitter: 8 bpc, assert dtr/rts */
2806 .byte 9,0 /* no interrupts */
2807 .byte 10,0 /* NRZ */
2808 .byte 11,0x50 /* use baud rate generator */
2809 .byte 12,10,13,0 /* 9600 baud */
2810 .byte 14,1 /* Baud rate generator enable */
2811 .byte 3,0xc1 /* enable receiver */
2812 .byte 5,0xea /* enable transmitter */
2818 /* #define USE_PRINTER */
2819 /* #define USE_SCC_B */
2820 /* #define USE_SCC_A */
2823 #if defined(USE_SCC_A) || defined(USE_SCC_B)
2825 /* Initialisation table for SCC */
2827 .byte 9,12 /* Reset */
2828 .byte 4,0x44 /* x16, 1 stopbit, no parity */
2829 .byte 3,0xc0 /* receiver: 8 bpc */
2830 .byte 5,0xe2 /* transmitter: 8 bpc, assert dtr/rts */
2831 .byte 9,0 /* no interrupts */
2832 .byte 10,0 /* NRZ */
2833 .byte 11,0x50 /* use baud rate generator */
2834 .byte 12,24,13,0 /* 9600 baud */
2835 .byte 14,2,14,3 /* use master clock for BRG, enable */
2836 .byte 3,0xc1 /* enable receiver */
2837 .byte 5,0xea /* enable transmitter */
2844 LPSG_SELECT = 0xff8800
2845 LPSG_READ = 0xff8800
2846 LPSG_WRITE = 0xff8802
2850 LSTMFP_GPIP = 0xfffa01
2851 LSTMFP_DDR = 0xfffa05
2852 LSTMFP_IERB = 0xfffa09
2854 #elif defined(USE_SCC_B)
2856 LSCC_CTRL = 0xff8c85
2857 LSCC_DATA = 0xff8c87
2859 #elif defined(USE_SCC_A)
2861 LSCC_CTRL = 0xff8c81
2862 LSCC_DATA = 0xff8c83
2864 #elif defined(USE_MFP)
2867 LMFP_TDCDR = 0xfffa1d
2868 LMFP_TDDR = 0xfffa25
2873 #endif /* CONFIG_ATARI */
2876 * Serial port output support.
2880 * Initialize serial port hardware for 9600/8/1
2882 func_start serial_init,%d0/%d1/%a0/%a1
2884 * Some of the register usage that follows
2886 * a0 = pointer to boot info record
2887 * d0 = boot info offset
2889 * a0 = address of SCC
2890 * a1 = Liobase address/address of scc_initable
2891 * d0 = init data for serial port
2893 * a0 = address of SCC
2894 * a1 = address of scc_initable_mac
2895 * d0 = init data for serial port
2899 #define SERIAL_DTR 7
2900 #define SERIAL_CNTRL CIABBASE+C_PRA
2903 lea %pc@(L(custom)),%a0
2904 movel #-ZTWOBASE,%a0@
2905 bclr #SERIAL_DTR,SERIAL_CNTRL-ZTWOBASE
2906 get_bi_record BI_AMIGA_SERPER
2907 movew %a0@,CUSTOMBASE+C_SERPER-ZTWOBASE
2908 | movew #61,CUSTOMBASE+C_SERPER-ZTWOBASE
2913 movel %pc@(L(iobase)),%a1
2914 #if defined(USE_PRINTER)
2915 bclr #0,%a1@(LSTMFP_IERB)
2916 bclr #0,%a1@(LSTMFP_DDR)
2917 moveb #LPSG_CONTROL,%a1@(LPSG_SELECT)
2918 moveb #0xff,%a1@(LPSG_WRITE)
2919 moveb #LPSG_IO_B,%a1@(LPSG_SELECT)
2920 clrb %a1@(LPSG_WRITE)
2921 moveb #LPSG_IO_A,%a1@(LPSG_SELECT)
2922 moveb %a1@(LPSG_READ),%d0
2924 moveb %d0,%a1@(LPSG_WRITE)
2925 #elif defined(USE_SCC)
2926 lea %a1@(LSCC_CTRL),%a0
2927 lea %pc@(L(scc_initable)),%a1
2934 #elif defined(USE_MFP)
2935 bclr #1,%a1@(LMFP_TSR)
2936 moveb #0x88,%a1@(LMFP_UCR)
2937 andb #0x70,%a1@(LMFP_TDCDR)
2938 moveb #2,%a1@(LMFP_TDDR)
2939 orb #1,%a1@(LMFP_TDCDR)
2940 bset #1,%a1@(LMFP_TSR)
2942 jra L(serial_init_done)
2946 is_not_mac(L(serial_init_not_mac))
2947 #ifdef MAC_SERIAL_DEBUG
2948 #if !defined(MAC_USE_SCC_A) && !defined(MAC_USE_SCC_B)
2949 #define MAC_USE_SCC_B
2951 #define mac_scc_cha_b_ctrl_offset 0x0
2952 #define mac_scc_cha_a_ctrl_offset 0x2
2953 #define mac_scc_cha_b_data_offset 0x4
2954 #define mac_scc_cha_a_data_offset 0x6
2956 #ifdef MAC_USE_SCC_A
2957 /* Initialize channel A */
2958 movel %pc@(L(mac_sccbase)),%a0
2959 lea %pc@(L(scc_initable_mac)),%a1
2962 moveb %d0,%a0@(mac_scc_cha_a_ctrl_offset)
2963 moveb %a1@+,%a0@(mac_scc_cha_a_ctrl_offset)
2966 #endif /* MAC_USE_SCC_A */
2968 #ifdef MAC_USE_SCC_B
2969 /* Initialize channel B */
2970 #ifndef MAC_USE_SCC_A /* Load mac_sccbase only if needed */
2971 movel %pc@(L(mac_sccbase)),%a0
2972 #endif /* MAC_USE_SCC_A */
2973 lea %pc@(L(scc_initable_mac)),%a1
2976 moveb %d0,%a0@(mac_scc_cha_b_ctrl_offset)
2977 moveb %a1@+,%a0@(mac_scc_cha_b_ctrl_offset)
2980 #endif /* MAC_USE_SCC_B */
2981 #endif /* MAC_SERIAL_DEBUG */
2983 jra L(serial_init_done)
2984 L(serial_init_not_mac):
2985 #endif /* CONFIG_MAC */
2989 /* debug output goes into SRAM, so we don't do it unless requested
2990 - check for '%LX$' signature in SRAM */
2991 lea %pc@(q40_mem_cptr),%a1
2992 move.l #0xff020010,%a1@ /* must be inited - also used by debug=mem */
2993 move.l #0xff020000,%a1
3006 lea %pc@(L(q40_do_debug)),%a1
3008 /*nodbg: q40_do_debug is 0 by default*/
3012 #ifdef CONFIG_APOLLO
3013 /* We count on the PROM initializing SIO1 */
3016 L(serial_init_done):
3017 func_return serial_init
3020 * Output character on serial port.
3022 func_start serial_putc,%d0/%d1/%a0/%a1
3028 /* A little safe recursion is good for the soul */
3036 movel %pc@(L(custom)),%a0
3037 movew %d0,%a0@(CUSTOMBASE+C_SERDAT)
3038 1: movew %a0@(CUSTOMBASE+C_SERDATR),%d0
3041 jra L(serial_putc_done)
3048 #ifdef MAC_SERIAL_DEBUG
3050 #ifdef MAC_USE_SCC_A
3051 movel %pc@(L(mac_sccbase)),%a1
3052 3: btst #2,%a1@(mac_scc_cha_a_ctrl_offset)
3054 moveb %d0,%a1@(mac_scc_cha_a_data_offset)
3055 #endif /* MAC_USE_SCC_A */
3057 #ifdef MAC_USE_SCC_B
3058 #ifndef MAC_USE_SCC_A /* Load mac_sccbase only if needed */
3059 movel %pc@(L(mac_sccbase)),%a1
3060 #endif /* MAC_USE_SCC_A */
3061 4: btst #2,%a1@(mac_scc_cha_b_ctrl_offset)
3063 moveb %d0,%a1@(mac_scc_cha_b_data_offset)
3064 #endif /* MAC_USE_SCC_B */
3066 #endif /* MAC_SERIAL_DEBUG */
3068 jra L(serial_putc_done)
3070 #endif /* CONFIG_MAC */
3074 movel %pc@(L(iobase)),%a1
3075 #if defined(USE_PRINTER)
3076 3: btst #0,%a1@(LSTMFP_GPIP)
3078 moveb #LPSG_IO_B,%a1@(LPSG_SELECT)
3079 moveb %d0,%a1@(LPSG_WRITE)
3080 moveb #LPSG_IO_A,%a1@(LPSG_SELECT)
3081 moveb %a1@(LPSG_READ),%d0
3083 moveb %d0,%a1@(LPSG_WRITE)
3087 moveb %d0,%a1@(LPSG_WRITE)
3088 #elif defined(USE_SCC)
3089 3: btst #2,%a1@(LSCC_CTRL)
3091 moveb %d0,%a1@(LSCC_DATA)
3092 #elif defined(USE_MFP)
3093 3: btst #7,%a1@(LMFP_TSR)
3095 moveb %d0,%a1@(LMFP_UDR)
3097 jra L(serial_putc_done)
3099 #endif /* CONFIG_ATARI */
3101 #ifdef CONFIG_MVME147
3103 1: btst #2,M147_SCC_CTRL_A
3105 moveb %d0,M147_SCC_DATA_A
3106 jbra L(serial_putc_done)
3110 #ifdef CONFIG_MVME16x
3113 * If the loader gave us a board type then we can use that to
3114 * select an appropriate output routine; otherwise we just use
3115 * the Bug code. If we haev to use the Bug that means the Bug
3116 * workspace has to be valid, which means the Bug has to use
3117 * the SRAM, which is non-standard.
3119 moveml %d0-%d7/%a2-%a6,%sp@-
3120 movel vme_brdtype,%d1
3121 jeq 1f | No tag - use the Bug
3122 cmpi #VME_TYPE_MVME162,%d1
3124 cmpi #VME_TYPE_MVME172,%d1
3126 /* 162/172; it's an SCC */
3127 6: btst #2,M162_SCC_CTRL_A
3132 moveb #8,M162_SCC_CTRL_A
3136 moveb %d0,M162_SCC_CTRL_A
3139 /* 166/167/177; it's a CD2401 */
3141 moveb M167_CYIER,%d2
3142 moveb #0x02,M167_CYIER
3144 btst #5,M167_PCSCCTICR
3146 moveb M167_PCTPIACKR,%d1
3147 moveb M167_CYLICR,%d1
3149 moveb #0x08,M167_CYTEOIR
3152 moveb %d0,M167_CYTDR
3153 moveb #0,M167_CYTEOIR
3154 moveb %d2,M167_CYIER
3159 .word 0x0020 /* TRAP 0x020 */
3161 moveml %sp@+,%d0-%d7/%a2-%a6
3162 jbra L(serial_putc_done)
3164 #endif /* CONFIG_MVME16x */
3166 #ifdef CONFIG_BVME6000
3169 * The BVME6000 machine has a serial port ...
3171 1: btst #2,BVME_SCC_CTRL_A
3173 moveb %d0,BVME_SCC_DATA_A
3174 jbra L(serial_putc_done)
3181 movel 0xFEFE0018,%a1
3184 jbra L(serial_putc_done)
3190 tst.l %pc@(L(q40_do_debug)) /* only debug if requested */
3192 lea %pc@(q40_mem_cptr),%a1
3197 jbra L(serial_putc_done)
3201 #ifdef CONFIG_APOLLO
3203 movl %pc@(L(iobase)),%a1
3204 moveb %d0,%a1@(LTHRB0)
3205 1: moveb %a1@(LSRB0),%d0
3211 L(serial_putc_done):
3212 func_return serial_putc
3217 func_start puts,%d0/%a0
3234 * Output number in hex notation.
3237 func_start putn,%d0-%d2
3249 addb #'A'-('9'+1),%d2
3265 * This routine takes its parameters on the stack. It then
3266 * turns around and calls the internal routine. This routine
3267 * is used until the Linux console driver initializes itself.
3269 * The calling parameters are:
3270 * void mac_serial_print(const char *str);
3272 * This routine does NOT understand variable arguments only
3275 ENTRY(mac_serial_print)
3276 moveml %d0/%a0,%sp@-
3281 movel %sp@(10),%a0 /* fetch parameter */
3289 moveml %sp@+,%d0/%a0
3291 #endif /* CONFIG_MAC */
3293 #if defined(CONFIG_HP300) || defined(CONFIG_APOLLO)
3294 func_start set_leds,%d0/%a0
3298 movel %pc@(L(custom)),%a0
3299 moveb %d0,%a0@(0x1ffff)
3303 #ifdef CONFIG_APOLLO
3304 movel %pc@(L(iobase)),%a0
3307 moveb %d0,%a0@(LCPUCTRL)
3310 func_return set_leds
3315 * For continuity, see the data alignment
3316 * to which this structure is tied.
3318 #define Lconsole_struct_cur_column 0
3319 #define Lconsole_struct_cur_row 4
3320 #define Lconsole_struct_num_columns 8
3321 #define Lconsole_struct_num_rows 12
3322 #define Lconsole_struct_left_edge 16
3323 #define Lconsole_struct_penguin_putc 20
3325 func_start console_init,%a0-%a4/%d0-%d7
3327 * Some of the register usage that follows
3328 * a0 = pointer to boot_info
3329 * a1 = pointer to screen
3330 * a2 = pointer to Lconsole_globals
3331 * d3 = pixel width of screen
3332 * d4 = pixel height of screen
3333 * (d3,d4) ~= (x,y) of a point just below
3334 * and to the right of the screen
3335 * NOT on the screen!
3336 * d5 = number of bytes per scan line
3337 * d6 = number of bytes on the entire screen
3340 lea %pc@(L(console_globals)),%a2
3341 movel %pc@(L(mac_videobase)),%a1
3342 movel %pc@(L(mac_rowbytes)),%d5
3343 movel %pc@(L(mac_dimensions)),%d3 /* -> low byte */
3345 swap %d4 /* -> high byte */
3346 andl #0xffff,%d3 /* d3 = screen width in pixels */
3347 andl #0xffff,%d4 /* d4 = screen height in pixels */
3351 mulul %d4,%d6 /* scan line bytes x num scan lines */
3352 divul #8,%d6 /* we'll clear 8 bytes at a time */
3353 moveq #-1,%d0 /* Mac_black */
3356 L(console_clear_loop):
3359 dbra %d6,L(console_clear_loop)
3361 /* Calculate font size */
3363 #if defined(FONT_8x8) && defined(CONFIG_FONT_8x8)
3364 lea %pc@(font_vga_8x8),%a0
3365 #elif defined(FONT_8x16) && defined(CONFIG_FONT_8x16)
3366 lea %pc@(font_vga_8x16),%a0
3367 #elif defined(FONT_6x11) && defined(CONFIG_FONT_6x11)
3368 lea %pc@(font_vga_6x11),%a0
3369 #elif defined(CONFIG_FONT_8x8) /* default */
3370 lea %pc@(font_vga_8x8),%a0
3371 #else /* no compiled-in font */
3376 * At this point we make a shift in register usage
3377 * a1 = address of console_font pointer
3379 lea %pc@(L(console_font)),%a1
3380 movel %a0,%a1@ /* store pointer to struct fbcon_font_desc in console_font */
3383 lea %pc@(L(console_font_data)),%a4
3384 movel %a0@(FONT_DESC_DATA),%d0
3385 subl #L(console_font),%a1
3390 * Calculate global maxs
3391 * Note - we can use either an
3392 * 8 x 16 or 8 x 8 character font
3393 * 6 x 11 also supported
3395 /* ASSERT: a0 = contents of Lconsole_font */
3396 movel %d3,%d0 /* screen width in pixels */
3397 divul %a0@(FONT_DESC_WIDTH),%d0 /* d0 = max num chars per row */
3399 movel %d4,%d1 /* screen height in pixels */
3400 divul %a0@(FONT_DESC_HEIGHT),%d1 /* d1 = max num rows */
3402 movel %d0,%a2@(Lconsole_struct_num_columns)
3403 movel %d1,%a2@(Lconsole_struct_num_rows)
3406 * Clear the current row and column
3408 clrl %a2@(Lconsole_struct_cur_column)
3409 clrl %a2@(Lconsole_struct_cur_row)
3410 clrl %a2@(Lconsole_struct_left_edge)
3413 * Initialization is complete
3416 func_return console_init
3418 func_start console_put_stats,%a0/%d7
3420 * Some of the register usage that follows
3421 * a0 = pointer to boot_info
3422 * d7 = value of boot_info fields
3424 puts "\nMacLinux\n\n"
3428 putn %pc@(L(mac_videobase)) /* video addr. */
3431 lea %pc@(_stext),%a0
3439 putn %pc@(L(cputype))
3442 #ifdef MAC_SERIAL_DEBUG
3443 putn %pc@(L(mac_sccbase))
3446 # if defined(MMU_PRINT)
3447 jbsr mmu_print_machine_cpu_types
3448 # endif /* MMU_PRINT */
3449 #endif /* SERIAL_DEBUG */
3451 func_return console_put_stats
3453 #ifdef CONSOLE_PENGUIN
3454 func_start console_put_penguin,%a0-%a1/%d0-%d7
3456 * Get 'that_penguin' onto the screen in the upper right corner
3457 * penguin is 64 x 74 pixels, align against right edge of screen
3459 lea %pc@(L(mac_dimensions)),%a0
3462 subil #64,%d0 /* snug up against the right edge */
3463 clrl %d1 /* start at the top */
3465 lea %pc@(L(that_penguin)),%a1
3466 L(console_penguin_row):
3468 L(console_penguin_pixel_pair):
3471 console_plot_pixel %d0,%d1,%d2
3474 console_plot_pixel %d0,%d1,%d2
3476 dbra %d6,L(console_penguin_pixel_pair)
3480 dbra %d7,L(console_penguin_row)
3482 func_return console_put_penguin
3484 /* include penguin bitmap */
3486 #include "../mac/mac_penguin.S"
3490 * Calculate source and destination addresses
3495 func_start console_scroll,%a0-%a4/%d0-%d7
3496 lea %pc@(L(mac_videobase)),%a0
3499 lea %pc@(L(mac_rowbytes)),%a0
3501 movel %pc@(L(console_font)),%a0
3504 mulul %a0@(FONT_DESC_HEIGHT),%d5 /* account for # scan lines per character */
3510 lea %pc@(L(mac_dimensions)),%a0
3514 andl #0xffff,%d3 /* d3 = screen width in pixels */
3515 andl #0xffff,%d4 /* d4 = screen height in pixels */
3518 * Calculate number of bytes to move
3520 lea %pc@(L(mac_rowbytes)),%a0
3522 movel %pc@(L(console_font)),%a0
3523 subl %a0@(FONT_DESC_HEIGHT),%d4 /* we're not scrolling the top row! */
3524 mulul %d4,%d6 /* scan line bytes x num scan lines */
3525 divul #32,%d6 /* we'll move 8 longs at a time */
3528 L(console_scroll_loop):
3537 dbra %d6,L(console_scroll_loop)
3539 lea %pc@(L(mac_rowbytes)),%a0
3541 movel %pc@(L(console_font)),%a0
3542 mulul %a0@(FONT_DESC_HEIGHT),%d6 /* scan line bytes x font height */
3543 divul #32,%d6 /* we'll move 8 words at a time */
3547 L(console_scroll_clear_loop):
3556 dbra %d6,L(console_scroll_clear_loop)
3559 func_return console_scroll
3562 func_start console_putc,%a0/%a1/%d0-%d7
3564 is_not_mac(L(console_exit))
3565 tstl %pc@(L(console_font))
3568 /* Output character in d7 on console.
3574 /* A little safe recursion is good for the soul */
3577 lea %pc@(L(console_globals)),%a0
3580 jne L(console_not_lf)
3581 movel %a0@(Lconsole_struct_cur_row),%d0
3583 movel %d0,%a0@(Lconsole_struct_cur_row)
3584 movel %a0@(Lconsole_struct_num_rows),%d1
3588 movel %d0,%a0@(Lconsole_struct_cur_row)
3595 jne L(console_not_cr)
3596 clrl %a0@(Lconsole_struct_cur_column)
3601 jne L(console_not_home)
3602 clrl %a0@(Lconsole_struct_cur_row)
3603 clrl %a0@(Lconsole_struct_cur_column)
3607 * At this point we know that the %d7 character is going to be
3608 * rendered on the screen. Register usage is -
3609 * a0 = pointer to console globals
3611 * d0 = cursor column
3612 * d1 = cursor row to draw the character
3613 * d7 = character number
3615 L(console_not_home):
3616 movel %a0@(Lconsole_struct_cur_column),%d0
3617 addql #1,%a0@(Lconsole_struct_cur_column)
3618 movel %a0@(Lconsole_struct_num_columns),%d1
3621 console_putc #'\n' /* recursion is OK! */
3623 movel %a0@(Lconsole_struct_cur_row),%d1
3626 * At this point we make a shift in register usage
3627 * a0 = address of pointer to font data (fbcon_font_desc)
3629 movel %pc@(L(console_font)),%a0
3630 movel %pc@(L(console_font_data)),%a1 /* Load fbcon_font_desc.data into a1 */
3631 andl #0x000000ff,%d7
3632 /* ASSERT: a0 = contents of Lconsole_font */
3633 mulul %a0@(FONT_DESC_HEIGHT),%d7 /* d7 = index into font data */
3634 addl %d7,%a1 /* a1 = points to char image */
3637 * At this point we make a shift in register usage
3638 * d0 = pixel coordinate, x
3639 * d1 = pixel coordinate, y
3640 * d2 = (bit 0) 1/0 for white/black (!) pixel on screen
3641 * d3 = font scan line data (8 pixels)
3642 * d6 = count down for the font's pixel width (8)
3643 * d7 = count down for the font's pixel count in height
3645 /* ASSERT: a0 = contents of Lconsole_font */
3646 mulul %a0@(FONT_DESC_WIDTH),%d0
3647 mulul %a0@(FONT_DESC_HEIGHT),%d1
3648 movel %a0@(FONT_DESC_HEIGHT),%d7 /* Load fbcon_font_desc.height into d7 */
3650 L(console_read_char_scanline):
3653 /* ASSERT: a0 = contents of Lconsole_font */
3654 movel %a0@(FONT_DESC_WIDTH),%d6 /* Load fbcon_font_desc.width into d6 */
3657 L(console_do_font_scanline):
3659 scsb %d2 /* convert 1 bit into a byte */
3660 console_plot_pixel %d0,%d1,%d2
3662 dbra %d6,L(console_do_font_scanline)
3664 /* ASSERT: a0 = contents of Lconsole_font */
3665 subl %a0@(FONT_DESC_WIDTH),%d0
3667 dbra %d7,L(console_read_char_scanline)
3670 func_return console_putc
3676 * d2 = (bit 0) 1/0 for white/black (!)
3677 * All registers are preserved
3679 func_start console_plot_pixel,%a0-%a1/%d0-%d4
3681 movel %pc@(L(mac_videobase)),%a1
3682 movel %pc@(L(mac_videodepth)),%d3
3685 mulul %pc@(L(mac_rowbytes)),%d1
3690 * d0 = x coord becomes byte offset into frame buffer
3692 * d2 = black or white (0/1)
3694 * d4 = temp of x (d0) for many bit depths
3699 movel %d0,%d4 /* we need the low order 3 bits! */
3704 eorb #7,%d4 /* reverse the x-coordinate w/ screen-bit # */
3708 jbra L(console_plot_pixel_exit)
3711 jbra L(console_plot_pixel_exit)
3716 movel %d0,%d4 /* we need the low order 2 bits! */
3721 eorb #3,%d4 /* reverse the x-coordinate w/ screen-bit # */
3728 jbra L(console_plot_pixel_exit)
3733 jbra L(console_plot_pixel_exit)
3738 movel %d0,%d4 /* we need the low order bit! */
3754 jbra L(console_plot_pixel_exit)
3763 jbra L(console_plot_pixel_exit)
3773 jbra L(console_plot_pixel_exit)
3776 jbra L(console_plot_pixel_exit)
3780 jbne L(console_plot_pixel_exit)
3787 jbra L(console_plot_pixel_exit)
3790 jbra L(console_plot_pixel_exit)
3792 L(console_plot_pixel_exit):
3793 func_return console_plot_pixel
3794 #endif /* CONSOLE */
3798 * This is some old code lying around. I don't believe
3799 * it's used or important anymore. My guess is it contributed
3800 * to getting to this point, but it's done for now.
3801 * It was still in the 2.1.77 head.S, so it's still here.
3802 * (And still not used!)
3805 moveml %a0/%d7,%sp@-
3809 .long 0xf0119f15 | ptestr #5,%a1@,#7,%a0
3818 lea %pc@(L(mmu)),%a0
3819 .long 0xf0106200 | pmove %psr,%a0@
3825 moveml %sp@+,%a0/%d7
3833 hp300_phys_ram_base:
3836 #if defined(CONFIG_ATARI) || defined(CONFIG_AMIGA) || \
3837 defined(CONFIG_HP300) || defined(CONFIG_APOLLO)
3843 #if defined(CONSOLE)
3845 .long 0 /* cursor column */
3846 .long 0 /* cursor row */
3847 .long 0 /* max num columns */
3848 .long 0 /* max num rows */
3849 .long 0 /* left edge */
3850 .long 0 /* mac putc */
3852 .long 0 /* pointer to console font (struct font_desc) */
3853 L(console_font_data):
3854 .long 0 /* pointer to console font data */
3855 #endif /* CONSOLE */
3857 #if defined(MMU_PRINT)
3859 .long 0 /* valid flag */
3860 .long 0 /* start logical */
3861 .long 0 /* next logical */
3862 .long 0 /* start physical */
3863 .long 0 /* next physical */
3864 #endif /* MMU_PRINT */
3868 L(mmu_cached_pointer_tables):
3870 L(mmu_num_pointer_tables):
3872 L(phys_kernel_start):
3878 L(kernel_pgdir_ptr):
3883 #if defined (CONFIG_MVME147)
3884 M147_SCC_CTRL_A = 0xfffe3002
3885 M147_SCC_DATA_A = 0xfffe3003
3888 #if defined (CONFIG_MVME16x)
3889 M162_SCC_CTRL_A = 0xfff45005
3890 M167_CYCAR = 0xfff450ee
3891 M167_CYIER = 0xfff45011
3892 M167_CYLICR = 0xfff45026
3893 M167_CYTEOIR = 0xfff45085
3894 M167_CYTDR = 0xfff450f8
3895 M167_PCSCCTICR = 0xfff4201e
3896 M167_PCTPIACKR = 0xfff42025
3899 #if defined (CONFIG_BVME6000)
3900 BVME_SCC_CTRL_A = 0xffb0000b
3901 BVME_SCC_DATA_A = 0xffb0000f
3904 #if defined(CONFIG_MAC)
3915 #ifdef MAC_SERIAL_DEBUG
3918 #endif /* MAC_SERIAL_DEBUG */
3921 #if defined (CONFIG_APOLLO)
3933 m68k_pgtable_cachemode:
3935 m68k_supervisor_cachemode:
3937 #if defined(CONFIG_MVME16x)
3939 .long 0,0,0,0,0,0,0,0
3941 #if defined(CONFIG_Q40)