1 /*****************************************************************************/
4 * comemlite.c -- PCI access code for embedded CO-MEM Lite PCI controller.
6 * (C) Copyright 1999-2003, Greg Ungerer (gerg@snapgear.com).
7 * (C) Copyright 2000, Lineo (www.lineo.com)
10 /*****************************************************************************/
12 #include <linux/config.h>
13 #include <linux/kernel.h>
14 #include <linux/types.h>
15 #include <linux/pci.h>
16 #include <linux/ptrace.h>
17 #include <linux/spinlock.h>
18 #include <linux/interrupt.h>
19 #include <linux/sched.h>
20 #include <asm/coldfire.h>
21 #include <asm/mcfsim.h>
23 #include <asm/anchor.h>
29 /*****************************************************************************/
32 * Debug configuration defines. DEBUGRES sets debugging output for
33 * the resource allocation phase. DEBUGPCI traces on pcibios_ function
34 * calls, and DEBUGIO traces all accesses to devices on the PCI bus.
36 /*#define DEBUGRES 1*/
37 /*#define DEBUGPCI 1*/
40 /*****************************************************************************/
43 * PCI markers for bus present and active slots.
45 int pci_bus_is_present = 0;
46 unsigned long pci_slotmask = 0;
49 * We may or may not need to swap the bytes of PCI bus tranfers.
50 * The endianess is re-roder automatically by the CO-MEM, but it
51 * will get the wrong byte order for a pure data stream.
53 #define pci_byteswap 0
57 * Resource tracking. The CO-MEM part creates a virtual address
58 * space that all the PCI devices live in - it is not in any way
59 * directly mapped into the ColdFire address space. So we can
60 * really assign any resources we like to devices, as long as
61 * they do not clash with other PCI devices.
63 unsigned int pci_iobase = PCIBIOS_MIN_IO; /* Arbitrary start address */
64 unsigned int pci_membase = PCIBIOS_MIN_MEM; /* Arbitrary start address */
66 #define PCI_MINIO 0x100 /* 256 byte minimum I/O */
67 #define PCI_MINMEM 0x00010000 /* 64k minimum chunk */
70 * The CO-MEM's shared memory segment is visible inside the PCI
71 * memory address space. We need to keep track of the address that
72 * this is mapped at, to setup the bus masters pointers.
74 unsigned int pci_shmemaddr;
76 /*****************************************************************************/
78 void pci_interrupt(int irq, void *id, struct pt_regs *fp);
80 /*****************************************************************************/
83 * Some platforms have custom ways of reseting the PCI bus.
86 void pci_resetbus(void)
92 printk(KERN_DEBUG "pci_resetbus()\n");
95 *((volatile unsigned short *) (MCF_MBAR+MCFSIM_PADDR)) |= eLIA_PCIRESET;
96 for (i = 0; (i < 1000); i++) {
97 *((volatile unsigned short *) (MCF_MBAR + MCFSIM_PADAT)) =
98 (ppdata | eLIA_PCIRESET);
102 *((volatile unsigned short *) (MCF_MBAR + MCFSIM_PADAT)) = ppdata;
106 /*****************************************************************************/
108 int pcibios_assign_resource_slot(int slot)
110 volatile unsigned long *rp;
111 volatile unsigned char *ip;
112 unsigned int idsel, addr, val, align, i;
116 printk(KERN_INFO "pcibios_assign_resource_slot(slot=%x)\n", slot);
119 rp = (volatile unsigned long *) COMEM_BASE;
120 idsel = COMEM_DA_ADDR(0x1 << (slot + 16));
122 /* Try to assign resource to each BAR */
123 for (bar = 0; (bar < 6); bar++) {
124 addr = COMEM_PCIBUS + PCI_BASE_ADDRESS_0 + (bar * 4);
125 rp[LREG(COMEM_DAHBASE)] = COMEM_DA_CFGRD | idsel;
126 val = rp[LREG(addr)];
128 printk(KERN_DEBUG "-----------------------------------"
129 "-------------------------------------\n");
130 printk(KERN_DEBUG "BAR[%d]: read=%08x ", bar, val);
133 rp[LREG(COMEM_DAHBASE)] = COMEM_DA_CFGWR | idsel;
134 rp[LREG(addr)] = 0xffffffff;
136 rp[LREG(COMEM_DAHBASE)] = COMEM_DA_CFGRD | idsel;
137 val = rp[LREG(addr)];
139 printk(KERN_DEBUG "write=%08x ", val);
143 printk(KERN_DEBUG "\n");
148 /* Determine space required by BAR */
149 /* FIXME: this should go backwords from 0x80000000... */
150 for (i = 0; (i < 32); i++) {
151 if ((0x1 << i) & (val & 0xfffffffc))
156 printk(KERN_DEBUG "size=%08x(%d)\n", (0x1 << i), i);
160 /* Assign a resource */
161 if (val & PCI_BASE_ADDRESS_SPACE_IO) {
165 printk(KERN_DEBUG "BAR[%d]: IO size=%08x iobase=%08x\n",
170 val = 0 | PCI_BASE_ADDRESS_SPACE_IO;
172 printk(KERN_DEBUG "BAR[%d]: too big for IO??\n", bar);
175 /* Check for un-alignment */
176 if ((align = pci_iobase % i))
177 pci_iobase += (i - align);
178 val = pci_iobase | PCI_BASE_ADDRESS_SPACE_IO;
185 printk(KERN_DEBUG "BAR[%d]: MEMORY size=%08x membase=%08x\n",
186 bar, i, pci_membase);
188 /* Check for un-alignment */
189 if ((align = pci_membase % i))
190 pci_membase += (i - align);
191 val = pci_membase | PCI_BASE_ADDRESS_SPACE_MEMORY;
195 /* Write resource back into BAR register */
196 rp[LREG(COMEM_DAHBASE)] = COMEM_DA_CFGWR | idsel;
197 rp[LREG(addr)] = val;
199 printk(KERN_DEBUG "BAR[%d]: assigned bar=%08x\n", bar, val);
204 printk(KERN_DEBUG "-----------------------------------"
205 "-------------------------------------\n");
208 /* Assign IRQ if one is wanted... */
209 ip = (volatile unsigned char *) (COMEM_BASE + COMEM_PCIBUS);
210 rp[LREG(COMEM_DAHBASE)] = COMEM_DA_CFGRD | idsel;
212 addr = (PCI_INTERRUPT_PIN & 0xfc) + (~PCI_INTERRUPT_PIN & 0x03);
214 rp[LREG(COMEM_DAHBASE)] = COMEM_DA_CFGWR | idsel;
215 addr = (PCI_INTERRUPT_LINE & 0xfc)+(~PCI_INTERRUPT_LINE & 0x03);
218 printk(KERN_DEBUG "IRQ LINE=25\n");
225 /*****************************************************************************/
227 int pcibios_enable_slot(int slot)
229 volatile unsigned long *rp;
230 volatile unsigned short *wp;
231 unsigned int idsel, addr;
235 printk(KERN_DEBUG "pcibios_enbale_slot(slot=%x)\n", slot);
238 rp = (volatile unsigned long *) COMEM_BASE;
239 wp = (volatile unsigned short *) COMEM_BASE;
240 idsel = COMEM_DA_ADDR(0x1 << (slot + 16));
242 /* Get current command settings */
243 addr = COMEM_PCIBUS + PCI_COMMAND;
244 addr = (addr & ~0x3) + (~addr & 0x02);
245 rp[LREG(COMEM_DAHBASE)] = COMEM_DA_CFGRD | idsel;
246 cmd = wp[WREG(addr)];
247 /*val = ((val & 0xff) << 8) | ((val >> 8) & 0xff);*/
249 /* Enable I/O and memory accesses to this device */
250 rp[LREG(COMEM_DAHBASE)] = COMEM_DA_CFGWR | idsel;
251 cmd |= PCI_COMMAND_IO | PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER;
252 wp[WREG(addr)] = cmd;
257 /*****************************************************************************/
259 void pcibios_assign_resources(void)
261 volatile unsigned long *rp;
262 unsigned long sel, id;
265 rp = (volatile unsigned long *) COMEM_BASE;
268 * Do a quick scan of the PCI bus and see what is here.
270 for (slot = COMEM_MINDEV; (slot <= COMEM_MAXDEV); slot++) {
271 sel = COMEM_DA_CFGRD | COMEM_DA_ADDR(0x1 << (slot + 16));
272 rp[LREG(COMEM_DAHBASE)] = sel;
273 rp[LREG(COMEM_PCIBUS)] = 0; /* Clear bus */
274 id = rp[LREG(COMEM_PCIBUS)];
275 if ((id != 0) && ((id & 0xffff0000) != (sel & 0xffff0000))) {
276 printk(KERN_INFO "PCI: slot=%d id=%08x\n", slot, (int) id);
277 pci_slotmask |= 0x1 << slot;
278 pcibios_assign_resource_slot(slot);
279 pcibios_enable_slot(slot);
284 /*****************************************************************************/
286 int pcibios_init(void)
288 volatile unsigned long *rp;
289 unsigned long sel, id;
293 printk(KERN_DEBUG "pcibios_init()\n");
299 * Do some sort of basic check to see if the CO-MEM part
300 * is present... This works ok, but I think we really need
301 * something better...
303 rp = (volatile unsigned long *) COMEM_BASE;
304 if ((rp[LREG(COMEM_LBUSCFG)] & 0xff) != 0x50) {
305 printk(KERN_INFO "PCI: no PCI bus present\n");
309 #ifdef COMEM_BRIDGEDEV
311 * Setup the PCI bridge device first. It needs resources too,
312 * so that bus masters can get to its shared memory.
314 slot = COMEM_BRIDGEDEV;
315 sel = COMEM_DA_CFGRD | COMEM_DA_ADDR(0x1 << (slot + 16));
316 rp[LREG(COMEM_DAHBASE)] = sel;
317 rp[LREG(COMEM_PCIBUS)] = 0; /* Clear bus */
318 id = rp[LREG(COMEM_PCIBUS)];
319 if ((id == 0) || ((id & 0xffff0000) == (sel & 0xffff0000))) {
320 printk(KERN_INFO "PCI: no PCI bus bridge present\n");
324 printk(KERN_INFO "PCI: bridge device at slot=%d id=%08x\n", slot, (int) id);
325 pci_slotmask |= 0x1 << slot;
326 pci_shmemaddr = pci_membase;
327 pcibios_assign_resource_slot(slot);
328 pcibios_enable_slot(slot);
331 pci_bus_is_present = 1;
333 /* Get PCI irq for local vectoring */
334 if (request_irq(COMEM_IRQ, pci_interrupt, 0, "PCI bridge", NULL)) {
335 printk(KERN_WARNING "PCI: failed to acquire interrupt %d\n", COMEM_IRQ);
337 mcf_autovector(COMEM_IRQ);
340 pcibios_assign_resources();
345 /*****************************************************************************/
347 char *pcibios_setup(char *option)
349 /* Nothing for us to handle. */
352 /*****************************************************************************/
354 struct pci_fixup pcibios_fixups[] = { { 0 } };
356 void pcibios_fixup_bus(struct pci_bus *b)
360 /*****************************************************************************/
362 void pcibios_align_resource(void *data, struct resource *res, unsigned long size, unsigned long align)
366 /*****************************************************************************/
368 int pcibios_enable_device(struct pci_dev *dev, int mask)
372 slot = PCI_SLOT(dev->devfn);
373 if ((dev->bus == 0) && (pci_slotmask & (1 << slot)))
374 pcibios_enable_slot(slot);
378 /*****************************************************************************/
380 void pcibios_update_resource(struct pci_dev *dev, struct resource *root, struct resource *r, int resource)
382 printk(KERN_WARNING "%s(%d): no support for changing PCI resources...\n",
387 /*****************************************************************************/
390 * Local routines to interrcept the standard I/O and vector handling
391 * code. Don't include this 'till now - initialization code above needs
392 * access to the real code too.
394 #include <asm/mcfpci.h>
396 /*****************************************************************************/
398 void pci_outb(unsigned char val, unsigned int addr)
400 volatile unsigned long *rp;
401 volatile unsigned char *bp;
404 printk(KERN_DEBUG "pci_outb(val=%02x,addr=%x)\n", val, addr);
407 rp = (volatile unsigned long *) COMEM_BASE;
408 bp = (volatile unsigned char *) COMEM_BASE;
409 rp[LREG(COMEM_DAHBASE)] = COMEM_DA_IOWR | COMEM_DA_ADDR(addr);
410 addr = (addr & ~0x3) + (~addr & 0x03);
411 bp[(COMEM_PCIBUS + COMEM_DA_OFFSET(addr))] = val;
414 /*****************************************************************************/
416 void pci_outw(unsigned short val, unsigned int addr)
418 volatile unsigned long *rp;
419 volatile unsigned short *sp;
422 printk(KERN_DEBUG "pci_outw(val=%04x,addr=%x)\n", val, addr);
425 rp = (volatile unsigned long *) COMEM_BASE;
426 sp = (volatile unsigned short *) COMEM_BASE;
427 rp[LREG(COMEM_DAHBASE)] = COMEM_DA_IOWR | COMEM_DA_ADDR(addr);
428 addr = (addr & ~0x3) + (~addr & 0x02);
430 val = ((val & 0xff) << 8) | ((val >> 8) & 0xff);
431 sp[WREG(COMEM_PCIBUS + COMEM_DA_OFFSET(addr))] = val;
434 /*****************************************************************************/
436 void pci_outl(unsigned int val, unsigned int addr)
438 volatile unsigned long *rp;
439 volatile unsigned int *lp;
442 printk(KERN_DEBUG "pci_outl(val=%08x,addr=%x)\n", val, addr);
445 rp = (volatile unsigned long *) COMEM_BASE;
446 lp = (volatile unsigned int *) COMEM_BASE;
447 rp[LREG(COMEM_DAHBASE)] = COMEM_DA_IOWR | COMEM_DA_ADDR(addr);
450 val = (val << 24) | ((val & 0x0000ff00) << 8) |
451 ((val & 0x00ff0000) >> 8) | (val >> 24);
453 lp[LREG(COMEM_PCIBUS + COMEM_DA_OFFSET(addr))] = val;
456 /*****************************************************************************/
458 unsigned long pci_blmask[] = {
465 unsigned char pci_inb(unsigned int addr)
467 volatile unsigned long *rp;
468 volatile unsigned char *bp;
473 printk(KERN_DEBUG "pci_inb(addr=%x)\n", addr);
476 rp = (volatile unsigned long *) COMEM_BASE;
477 bp = (volatile unsigned char *) COMEM_BASE;
479 r = COMEM_DA_IORD | COMEM_DA_ADDR(addr) | pci_blmask[(addr & 0x3)];
480 rp[LREG(COMEM_DAHBASE)] = r;
482 addr = (addr & ~0x3) + (~addr & 0x3);
483 val = bp[(COMEM_PCIBUS + COMEM_DA_OFFSET(addr))];
487 /*****************************************************************************/
489 unsigned long pci_bwmask[] = {
496 unsigned short pci_inw(unsigned int addr)
498 volatile unsigned long *rp;
499 volatile unsigned short *sp;
504 printk(KERN_DEBUG "pci_inw(addr=%x)", addr);
507 rp = (volatile unsigned long *) COMEM_BASE;
508 r = COMEM_DA_IORD | COMEM_DA_ADDR(addr) | pci_bwmask[(addr & 0x3)];
509 rp[LREG(COMEM_DAHBASE)] = r;
511 sp = (volatile unsigned short *) COMEM_BASE;
512 addr = (addr & ~0x3) + (~addr & 0x02);
513 val = sp[WREG(COMEM_PCIBUS + COMEM_DA_OFFSET(addr))];
515 val = ((val & 0xff) << 8) | ((val >> 8) & 0xff);
517 printk(KERN_DEBUG "=%04x\n", val);
522 /*****************************************************************************/
524 unsigned int pci_inl(unsigned int addr)
526 volatile unsigned long *rp;
527 volatile unsigned int *lp;
531 printk(KERN_DEBUG "pci_inl(addr=%x)", addr);
534 rp = (volatile unsigned long *) COMEM_BASE;
535 lp = (volatile unsigned int *) COMEM_BASE;
536 rp[LREG(COMEM_DAHBASE)] = COMEM_DA_IORD | COMEM_DA_ADDR(addr);
537 val = lp[LREG(COMEM_PCIBUS + COMEM_DA_OFFSET(addr))];
540 val = (val << 24) | ((val & 0x0000ff00) << 8) |
541 ((val & 0x00ff0000) >> 8) | (val >> 24);
544 printk(KERN_DEBUG "=%08x\n", val);
549 /*****************************************************************************/
551 void pci_outsb(void *addr, void *buf, int len)
553 volatile unsigned long *rp;
554 volatile unsigned char *bp;
555 unsigned char *dp = (unsigned char *) buf;
556 unsigned int a = (unsigned int) addr;
559 printk(KERN_DEBUG "pci_outsb(addr=%x,buf=%x,len=%d)\n", (int)addr, (int)buf, len);
562 rp = (volatile unsigned long *) COMEM_BASE;
563 rp[LREG(COMEM_DAHBASE)] = COMEM_DA_IOWR | COMEM_DA_ADDR(a);
565 a = (a & ~0x3) + (~a & 0x03);
566 bp = (volatile unsigned char *)
567 (COMEM_BASE + COMEM_PCIBUS + COMEM_DA_OFFSET(a));
573 /*****************************************************************************/
575 void pci_outsw(void *addr, void *buf, int len)
577 volatile unsigned long *rp;
578 volatile unsigned short *wp;
579 unsigned short w, *dp = (unsigned short *) buf;
580 unsigned int a = (unsigned int) addr;
583 printk(KERN_DEBUG "pci_outsw(addr=%x,buf=%x,len=%d)\n", (int)addr, (int)buf, len);
586 rp = (volatile unsigned long *) COMEM_BASE;
587 rp[LREG(COMEM_DAHBASE)] = COMEM_DA_IOWR | COMEM_DA_ADDR(a);
589 a = (a & ~0x3) + (~a & 0x2);
590 wp = (volatile unsigned short *)
591 (COMEM_BASE + COMEM_PCIBUS + COMEM_DA_OFFSET(a));
596 w = ((w & 0xff) << 8) | ((w >> 8) & 0xff);
601 /*****************************************************************************/
603 void pci_outsl(void *addr, void *buf, int len)
605 volatile unsigned long *rp;
606 volatile unsigned long *lp;
607 unsigned long l, *dp = (unsigned long *) buf;
608 unsigned int a = (unsigned int) addr;
611 printk(KERN_DEBUG "pci_outsl(addr=%x,buf=%x,len=%d)\n", (int)addr, (int)buf, len);
614 rp = (volatile unsigned long *) COMEM_BASE;
615 rp[LREG(COMEM_DAHBASE)] = COMEM_DA_IOWR | COMEM_DA_ADDR(a);
617 lp = (volatile unsigned long *)
618 (COMEM_BASE + COMEM_PCIBUS + COMEM_DA_OFFSET(a));
623 l = (l << 24) | ((l & 0x0000ff00) << 8) |
624 ((l & 0x00ff0000) >> 8) | (l >> 24);
629 /*****************************************************************************/
631 void pci_insb(void *addr, void *buf, int len)
633 volatile unsigned long *rp;
634 volatile unsigned char *bp;
635 unsigned char *dp = (unsigned char *) buf;
636 unsigned int a = (unsigned int) addr;
639 printk(KERN_DEBUG "pci_insb(addr=%x,buf=%x,len=%d)\n", (int)addr, (int)buf, len);
642 rp = (volatile unsigned long *) COMEM_BASE;
643 rp[LREG(COMEM_DAHBASE)] = COMEM_DA_IORD | COMEM_DA_ADDR(a);
645 a = (a & ~0x3) + (~a & 0x03);
646 bp = (volatile unsigned char *)
647 (COMEM_BASE + COMEM_PCIBUS + COMEM_DA_OFFSET(a));
653 /*****************************************************************************/
655 void pci_insw(void *addr, void *buf, int len)
657 volatile unsigned long *rp;
658 volatile unsigned short *wp;
659 unsigned short w, *dp = (unsigned short *) buf;
660 unsigned int a = (unsigned int) addr;
663 printk(KERN_DEBUG "pci_insw(addr=%x,buf=%x,len=%d)\n", (int)addr, (int)buf, len);
666 rp = (volatile unsigned long *) COMEM_BASE;
667 rp[LREG(COMEM_DAHBASE)] = COMEM_DA_IORD | COMEM_DA_ADDR(a);
669 a = (a & ~0x3) + (~a & 0x2);
670 wp = (volatile unsigned short *)
671 (COMEM_BASE + COMEM_PCIBUS + COMEM_DA_OFFSET(a));
676 w = ((w & 0xff) << 8) | ((w >> 8) & 0xff);
681 /*****************************************************************************/
683 void pci_insl(void *addr, void *buf, int len)
685 volatile unsigned long *rp;
686 volatile unsigned long *lp;
687 unsigned long l, *dp = (unsigned long *) buf;
688 unsigned int a = (unsigned int) addr;
691 printk(KERN_DEBUG "pci_insl(addr=%x,buf=%x,len=%d)\n", (int)addr, (int)buf, len);
694 rp = (volatile unsigned long *) COMEM_BASE;
695 rp[LREG(COMEM_DAHBASE)] = COMEM_DA_IORD | COMEM_DA_ADDR(a);
697 lp = (volatile unsigned long *)
698 (COMEM_BASE + COMEM_PCIBUS + COMEM_DA_OFFSET(a));
703 l = (l << 24) | ((l & 0x0000ff00) << 8) |
704 ((l & 0x00ff0000) >> 8) | (l >> 24);
709 /*****************************************************************************/
711 struct pci_localirqlist {
712 void (*handler)(int, void *, struct pt_regs *);
717 struct pci_localirqlist pci_irqlist[COMEM_MAXPCI];
719 /*****************************************************************************/
721 int pci_request_irq(unsigned int irq,
722 void (*handler)(int, void *, struct pt_regs *),
723 unsigned long flags, const char *device, void *dev_id)
728 printk(KERN_DEBUG "pci_request_irq(irq=%d,handler=%x,flags=%x,device=%s,"
729 "dev_id=%x)\n", irq, (int) handler, (int) flags, device,
733 /* Check if this interrupt handler is already lodged */
734 for (i = 0; (i < COMEM_MAXPCI); i++) {
735 if (pci_irqlist[i].handler == handler)
739 /* Find a free spot to put this handler */
740 for (i = 0; (i < COMEM_MAXPCI); i++) {
741 if (pci_irqlist[i].handler == 0) {
742 pci_irqlist[i].handler = handler;
743 pci_irqlist[i].device = device;
744 pci_irqlist[i].dev_id = dev_id;
753 /*****************************************************************************/
755 void pci_free_irq(unsigned int irq, void *dev_id)
760 printk(KERN_DEBUG "pci_free_irq(irq=%d,dev_id=%x)\n", irq, (int) dev_id);
763 if (dev_id == (void *) NULL)
766 /* Check if this interrupt handler is lodged */
767 for (i = 0; (i < COMEM_MAXPCI); i++) {
768 if (pci_irqlist[i].dev_id == dev_id) {
769 pci_irqlist[i].handler = NULL;
770 pci_irqlist[i].device = NULL;
771 pci_irqlist[i].dev_id = NULL;
777 /*****************************************************************************/
779 void pci_interrupt(int irq, void *id, struct pt_regs *fp)
784 printk(KERN_DEBUG "pci_interrupt(irq=%d,id=%x,fp=%x)\n", irq, (int) id, (int) fp);
787 for (i = 0; (i < COMEM_MAXPCI); i++) {
788 if (pci_irqlist[i].handler)
789 (*pci_irqlist[i].handler)(irq,pci_irqlist[i].dev_id,fp);
793 /*****************************************************************************/
796 * The shared memory region is broken up into contiguous 512 byte
797 * regions for easy allocation... This is not an optimal solution
798 * but it makes allocation and freeing regions really easy.
801 #define PCI_MEMSLOTSIZE 512
802 #define PCI_MEMSLOTS (COMEM_SHMEMSIZE / PCI_MEMSLOTSIZE)
804 char pci_shmemmap[PCI_MEMSLOTS];
807 void *pci_bmalloc(int size)
812 printk(KERN_DEBUG "pci_bmalloc(size=%d)\n", size);
816 return((void *) NULL);
818 nrslots = (size - 1) / PCI_MEMSLOTSIZE;
820 for (i = 0; (i < (PCI_MEMSLOTS-nrslots)); i++) {
821 if (pci_shmemmap[i] == 0) {
822 for (j = i+1; (j < (i+nrslots)); j++) {
827 for (j = i; (j <= i+nrslots); j++)
834 return((void *) (COMEM_BASE + COMEM_SHMEM + (i * PCI_MEMSLOTSIZE)));
837 /*****************************************************************************/
839 void pci_bmfree(void *mp, int size)
844 printk(KERN_DEBUG "pci_bmfree(mp=%x,size=%d)\n", (int) mp, size);
847 nrslots = size / PCI_MEMSLOTSIZE;
848 i = (((unsigned long) mp) - (COMEM_BASE + COMEM_SHMEM)) /
851 for (j = i; (j < (i+nrslots)); j++)
855 /*****************************************************************************/
857 unsigned long pci_virt_to_bus(volatile void *address)
862 printk(KERN_DEBUG "pci_virt_to_bus(address=%x)", (int) address);
865 l = ((unsigned long) address) - COMEM_BASE;
867 printk(KERN_DEBUG "=%x\n", (int) (l+pci_shmemaddr));
869 return(l + pci_shmemaddr);
872 /*****************************************************************************/
874 void *pci_bus_to_virt(unsigned long address)
879 printk(KERN_DEBUG "pci_bus_to_virt(address=%x)", (int) address);
882 l = address - pci_shmemaddr;
884 printk(KERN_DEBUG "=%x\n", (int) (address + COMEM_BASE));
886 return((void *) (address + COMEM_BASE));
889 /*****************************************************************************/
891 void pci_bmcpyto(void *dst, void *src, int len)
893 unsigned long *dp, *sp, val;
894 unsigned char *dcp, *scp;
898 printk(KERN_DEBUG "pci_bmcpyto(dst=%x,src=%x,len=%d)\n", (int)dst, (int)src, len);
901 dp = (unsigned long *) dst;
902 sp = (unsigned long *) src;
906 printk(KERN_INFO "DATA:");
907 scp = (unsigned char *) sp;
908 for (i = 0; (i < len); i++) {
909 if ((i % 16) == 0) printk(KERN_INFO "\n%04x: ", i);
910 printk(KERN_INFO "%02x ", *scp++);
912 printk(KERN_INFO "\n");
915 for (j = 0; (i >= 0); i--, j++) {
917 val = (val << 24) | ((val & 0x0000ff00) << 8) |
918 ((val & 0x00ff0000) >> 8) | (val >> 24);
923 dcp = (unsigned char *) dp;
924 scp = ((unsigned char *) sp) + 3;
925 for (i = 0; (i < (len & 0x3)); i++)
930 /*****************************************************************************/
932 void pci_bmcpyfrom(void *dst, void *src, int len)
934 unsigned long *dp, *sp, val;
935 unsigned char *dcp, *scp;
939 printk(KERN_DEBUG "pci_bmcpyfrom(dst=%x,src=%x,len=%d)\n",(int)dst,(int)src,len);
942 dp = (unsigned long *) dst;
943 sp = (unsigned long *) src;
946 for (; (i >= 0); i--) {
948 val = (val << 24) | ((val & 0x0000ff00) << 8) |
949 ((val & 0x00ff0000) >> 8) | (val >> 24);
954 dcp = ((unsigned char *) dp) + 3;
955 scp = (unsigned char *) sp;
956 for (i = 0; (i < (len & 0x3)); i++)
961 printk(KERN_INFO "DATA:");
962 dcp = (unsigned char *) dst;
963 for (i = 0; (i < len); i++) {
964 if ((i % 16) == 0) printk(KERN_INFO "\n%04x: ", i);
965 printk(KERN_INFO "%02x ", *dcp++);
967 printk(KERN_INFO "\n");
971 /*****************************************************************************/
973 void *pci_alloc_consistent(struct pci_dev *dev, size_t size, dma_addr_t *dma_addr)
976 if ((mp = pci_bmalloc(size)) != NULL) {
977 dma_addr = mp - (COMEM_BASE + COMEM_SHMEM);
980 *dma_addr = (dma_addr_t) NULL;
984 /*****************************************************************************/
986 void pci_free_consistent(struct pci_dev *dev, size_t size, void *cpu_addr, dma_addr_t dma_addr)
988 pci_bmfree(cpu_addr, size);
991 /*****************************************************************************/