2 * arch/mips/ddb5074/setup.c -- NEC DDB Vrc-5074 setup routines
4 * Copyright (C) 2000 Geert Uytterhoeven <geert@sonycom.com>
5 * Sony Software Development Center Europe (SDCE), Brussels
7 #include <linux/config.h>
8 #include <linux/init.h>
9 #include <linux/kbd_ll.h>
10 #include <linux/kernel.h>
11 #include <linux/kdev_t.h>
12 #include <linux/types.h>
13 #include <linux/sched.h>
14 #include <linux/pci.h>
15 #include <linux/ide.h>
16 #include <linux/ioport.h>
17 #include <linux/irq.h>
19 #include <asm/addrspace.h>
20 #include <asm/bcache.h>
22 #include <asm/reboot.h>
23 #include <asm/gdb-stub.h>
25 #include <asm/nile4.h>
26 #include <asm/ddb5xxx/ddb5074.h>
27 #include <asm/ddb5xxx/ddb5xxx.h>
30 extern void rs_kgdb_hook(int);
31 extern void breakpoint(void);
34 static void (*back_to_prom) (void) = (void (*)(void)) 0xbfc00000;
36 static void ddb_machine_restart(char *command)
41 t = nile4_in32(NILE4_PCICTRL + 4);
43 nile4_out32(NILE4_PCICTRL + 4, t);
45 t = nile4_in32(NILE4_CPUSTAT);
47 nile4_out32(NILE4_CPUSTAT, t);
52 static void ddb_machine_halt(void)
54 printk("DDB Vrc-5074 halted.\n");
59 static void ddb_machine_power_off(void)
61 printk("DDB Vrc-5074 halted. Please turn off the power.\n");
66 extern void ddb_irq_setup(void);
67 extern void rtc_ds1386_init(unsigned long base);
69 extern void (*board_timer_setup) (struct irqaction * irq);
71 static void __init ddb_timer_init(struct irqaction *irq)
73 /* set the clock to 1 Hz */
74 nile4_out32(NILE4_T2CTRL, 1000000);
75 /* enable the General-Purpose Timer */
76 nile4_out32(NILE4_T2CTRL + 4, 0x00000001);
78 nile4_out32(NILE4_T2CNTR, 0);
79 /* enable interrupt */
80 setup_irq(nile4_to_irq(NILE4_INT_GPT), irq);
81 nile4_enable_irq(nile4_to_irq(NILE4_INT_GPT));
82 change_c0_status(ST0_IM,
83 IE_IRQ0 | IE_IRQ1 | IE_IRQ2 | IE_IRQ3 | IE_IRQ4);
87 static void __init ddb_time_init(void)
89 /* we have ds1396 RTC chip */
90 rtc_ds1386_init(KSEG1ADDR(DDB_PCI_MEM_BASE));
95 static void __init ddb5074_setup(void)
97 extern int panic_timeout;
99 irq_setup = ddb_irq_setup;
100 set_io_port_base(NILE4_PCI_IO_BASE);
101 isa_slot_offset = NILE4_PCI_MEM_BASE;
102 board_timer_setup = ddb_timer_init;
103 board_time_init = ddb_time_init;
106 _machine_restart = ddb_machine_restart;
107 _machine_halt = ddb_machine_halt;
108 _machine_power_off = ddb_machine_power_off;
110 ddb_out32(DDB_BAR0, 0);
112 ddb_set_pmr(DDB_PCIINIT0, DDB_PCICMD_IO, 0, 0x10);
113 ddb_set_pmr(DDB_PCIINIT1, DDB_PCICMD_MEM, DDB_PCI_MEM_BASE , 0x10);
115 /* Reboot on panic */
119 early_initcall(ddb5074_setup);
121 #define USE_NILE4_SERIAL 0
124 #define ns16550_in(reg) nile4_in8((reg)*8)
125 #define ns16550_out(reg, val) nile4_out8((reg)*8, (val))
127 #define NS16550_BASE (NILE4_PCI_IO_BASE+0x03f8)
128 static inline u8 ns16550_in(u32 reg)
130 return *(volatile u8 *) (NS16550_BASE + reg);
133 static inline void ns16550_out(u32 reg, u8 val)
135 *(volatile u8 *) (NS16550_BASE + reg) = val;
139 #define NS16550_RBR 0
140 #define NS16550_THR 0
141 #define NS16550_DLL 0
142 #define NS16550_IER 1
143 #define NS16550_DLM 1
144 #define NS16550_FCR 2
145 #define NS16550_IIR 2
146 #define NS16550_LCR 3
147 #define NS16550_MCR 4
148 #define NS16550_LSR 5
149 #define NS16550_MSR 6
150 #define NS16550_SCR 7
152 #define NS16550_LSR_DR 0x01 /* Data ready */
153 #define NS16550_LSR_OE 0x02 /* Overrun */
154 #define NS16550_LSR_PE 0x04 /* Parity error */
155 #define NS16550_LSR_FE 0x08 /* Framing error */
156 #define NS16550_LSR_BI 0x10 /* Break */
157 #define NS16550_LSR_THRE 0x20 /* Xmit holding register empty */
158 #define NS16550_LSR_TEMT 0x40 /* Xmitter empty */
159 #define NS16550_LSR_ERR 0x80 /* Error */
165 ns16550_out(NS16550_LCR, 0x80);
166 ns16550_out(NS16550_DLM, 0x00);
167 ns16550_out(NS16550_DLL, 0x36); /* 9600 baud */
168 ns16550_out(NS16550_LCR, 0x00);
169 ns16550_out(NS16550_LCR, 0x03);
170 ns16550_out(NS16550_FCR, 0x47);
178 while (!(ns16550_in(NS16550_LSR) & NS16550_LSR_THRE));
179 ns16550_out(NS16550_THR, c);
181 while (!(ns16550_in(NS16550_LSR) & NS16550_LSR_THRE));
182 ns16550_out(NS16550_THR, '\r');
186 void _puts(const char *s)
195 while (!(ns16550_in(NS16550_LSR) & NS16550_LSR_DR));
196 return ns16550_in(NS16550_RBR);
201 return (ns16550_in(NS16550_LSR) & NS16550_LSR_DR) != 0;
206 * Hexadecimal 7-segment LED
208 void ddb5074_led_hex(int hex)
215 * LEDs D2 and D3, connected to the GPIO pins of the PMU in the ALi M1543
217 struct pci_dev *pci_pmu = NULL;
219 void ddb5074_led_d2(int on)
224 pci_read_config_byte(pci_pmu, 0x7e, &t);
229 pci_write_config_byte(pci_pmu, 0x7e, t);
233 void ddb5074_led_d3(int on)
238 pci_read_config_byte(pci_pmu, 0x7e, &t);
243 pci_write_config_byte(pci_pmu, 0x7e, t);