3 * BRIEF MODULE DESCRIPTION
4 * Board specific pci fixups for the Toshiba rbtx4927
6 * Copyright 2001 MontaVista Software Inc.
7 * Author: MontaVista Software, Inc.
8 * ppopov@mvista.com or source@mvista.com
10 * Copyright (C) 2000-2001 Toshiba Corporation
12 * This program is free software; you can redistribute it and/or modify it
13 * under the terms of the GNU General Public License as published by the
14 * Free Software Foundation; either version 2 of the License, or (at your
15 * option) any later version.
17 * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
18 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
19 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
20 * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
23 * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
24 * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
26 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
28 * You should have received a copy of the GNU General Public License along
29 * with this program; if not, write to the Free Software Foundation, Inc.,
30 * 675 Mass Ave, Cambridge, MA 02139, USA.
32 #include <linux/types.h>
33 #include <linux/pci.h>
34 #include <linux/kernel.h>
35 #include <linux/init.h>
37 #include <asm/tx4927/tx4927.h>
38 #include <asm/tx4927/tx4927_pci.h>
42 #define DBG(x...) printk(x)
47 /* look up table for backplane pci irq for slots 17-20 by pin # */
48 static unsigned char backplane_pci_irq[4][4] = {
49 /* PJ6 SLOT: 17, PIN: 1 */ {TX4927_IRQ_IOC_PCIA,
50 /* PJ6 SLOT: 17, PIN: 2 */
52 /* PJ6 SLOT: 17, PIN: 3 */
54 /* PJ6 SLOT: 17, PIN: 4 */
56 /* SB SLOT: 18, PIN: 1 */ {TX4927_IRQ_IOC_PCIB,
57 /* SB SLOT: 18, PIN: 2 */
59 /* SB SLOT: 18, PIN: 3 */
61 /* SB SLOT: 18, PIN: 4 */
63 /* PJ5 SLOT: 19, PIN: 1 */ {TX4927_IRQ_IOC_PCIC,
64 /* PJ5 SLOT: 19, PIN: 2 */
66 /* PJ5 SLOT: 19, PIN: 3 */
68 /* PJ5 SLOT: 19, PIN: 4 */
70 /* PJ4 SLOT: 20, PIN: 1 */ {TX4927_IRQ_IOC_PCID,
71 /* PJ4 SLOT: 20, PIN: 2 */
73 /* PJ4 SLOT: 20, PIN: 3 */
75 /* PJ4 SLOT: 20, PIN: 4 */
79 int pci_get_irq(struct pci_dev *dev, int pin)
81 unsigned char irq = pin;
83 DBG("pci_get_irq: pin is %d\n", pin);
86 if (dev->bus->parent == NULL &&
87 PCI_SLOT(dev->devfn) == TX4927_PCIC_IDSEL_AD_TO_SLOT(23)) {
88 printk("Onboard PCI_SLOT(dev->devfn) is %d\n",
89 PCI_SLOT(dev->devfn));
90 /* IDSEL=A23 is tx4927 onboard pci slot */
91 irq = (irq + PCI_SLOT(dev->devfn)) % 4;
93 DBG("irq is now %d\n", irq);
97 irq = TX4927_IRQ_IOC_PCIA;
100 irq = TX4927_IRQ_IOC_PCIB;
103 irq = TX4927_IRQ_IOC_PCIC;
106 irq = TX4927_IRQ_IOC_PCID;
111 DBG("PCI Backplane PCI_SLOT(dev->devfn) is %d\n",
112 PCI_SLOT(dev->devfn));
113 irq = backplane_pci_irq[PCI_SLOT(dev->devfn) - 17][irq];
115 DBG("assigned irq %d\n", irq);
120 #ifdef TX4927_SUPPORT_PCI_66
121 extern int tx4927_pci66;
122 extern void tx4927_pci66_setup(void);
124 extern void tx4927_pci_setup(void);
126 #ifdef TX4927_SUPPORT_PCI_66
127 int tx4927_pci66_check(void)
133 if (tx4927_pci66 < 0)
136 /* check 66MHz capability */
137 pci_for_each_dev(dev) {
139 pci_read_config_word(dev, PCI_STATUS, &stat);
140 if (!(stat & PCI_STATUS_66MHZ)) {
142 "PCI: %02x:%02x not 66MHz capable.\n",
143 dev->bus->number, dev->devfn);
152 void __init pcibios_fixup_irqs(void)
159 #ifdef TX4927_SUPPORT_PCI_66
160 if (tx4927_pci66_check()) {
161 tx4927_pci66_setup();
162 tx4927_pci_setup(); /* Reinitialize PCIC */
166 pci_for_each_dev(dev) {
168 DBG(" devfn=0x%02x (0x%02x:0x%02x)\n",
169 dev->devfn, PCI_SLOT(dev->devfn),
170 PCI_FUNC(dev->devfn));
172 pci_read_config_dword(dev, PCI_VENDOR_ID, &id);
173 DBG(" id=0x%08x\n", id);
175 pci_read_config_byte(dev, PCI_INTERRUPT_LINE, &irq);
176 DBG(" line=0x%02x/%d\n", irq, irq);
178 pci_read_config_byte(dev, PCI_INTERRUPT_PIN, &pin);
179 DBG(" pin=%d\n", pin);
184 pci_read_config_dword(dev, 0x10, &tmp);
185 DBG(" bar0:0x10=0x%08x\n", tmp);
186 pci_read_config_dword(dev, 0x14, &tmp);
187 DBG(" bar1:0x14=0x%08x\n", tmp);
188 pci_read_config_dword(dev, 0x1c, &tmp);
189 DBG(" bar2:0x1c=0x%08x\n", tmp);
190 pci_read_config_dword(dev, 0x20, &tmp);
191 DBG(" bar3:0x20=0x%08x\n", tmp);
192 pci_read_config_dword(dev, 0x24, &tmp);
193 DBG(" bar4:0x24=0x%08x\n", tmp);
199 if (id == 0x91301055) { /* ide */
204 DBG(" auto irq (now=%d) -- skipping pin=0\n", irq);
206 DBG(" auto irq (now=%d) -- skipping hardcoded irq\n", irq);
208 DBG(" auto irq (was=%d)\n", irq);
209 irq = pci_get_irq(dev, pin);
210 pci_write_config_byte(dev, PCI_INTERRUPT_LINE,
213 DBG(" auto irq (now=%d)\n", irq);
216 pci_read_config_byte(dev, PCI_INTERRUPT_LINE, &irq);
218 "PCI: 0x%02x:0x%02x(0x%02x,0x%02x) IRQ=%d\n",
219 dev->bus->number, dev->devfn, PCI_SLOT(dev->devfn),
220 PCI_FUNC(dev->devfn), irq);