2 * Copyright 2003 PMC-Sierra
3 * Author: Manish Lachwani (lachwani@pmc-sierra.com)
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms of the GNU General Public License as published by the
7 * Free Software Foundation; either version 2 of the License, or (at your
8 * option) any later version.
10 * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
11 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
12 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
13 * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
14 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
15 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
16 * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
17 * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
18 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
19 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
21 * You should have received a copy of the GNU General Public License along
22 * with this program; if not, write to the Free Software Foundation, Inc.,
23 * 675 Mass Ave, Cambridge, MA 02139, USA.
25 #include <linux/init.h>
26 #include <linux/types.h>
27 #include <linux/pci.h>
28 #include <linux/kernel.h>
29 #include <linux/slab.h>
30 #include <linux/version.h>
34 #include <asm/titan_dep.h>
37 * Titan PCI Config Read Byte
39 static int titan_read_config(struct pci_bus *bus, unsigned int devfn, int reg,
43 uint32_t address_reg, data_reg;
46 bus = device->bus->number;
47 dev = PCI_SLOT(device->devfn);
48 func = PCI_FUNC(device->devfn);
50 address_reg = TITAN_PCI_0_CONFIG_ADDRESS;
51 data_reg = TITAN_PCI_0_CONFIG_DATA;
53 address = (bus << 16) | (dev << 11) | (func << 8) |
54 (offset & 0xfc) | 0x80000000;
56 /* start the configuration cycle */
57 TITAN_WRITE(address_reg, address);
61 TITAN_READ_8(data_reg + (offset & 0x3), val);
65 TITAN_READ_16(data_reg + (offset & 0x2), val);
69 TITAN_READ(data_reg, val);
73 return PCIBIOS_SUCCESSFUL;
77 * Titan PCI Config Byte Write
79 static int titan_write_config(struct pci_bus *bus, unsigned int devfn, int reg,
82 uint32_t address_reg, data_reg, address;
85 bus = device->bus->number;
86 dev = PCI_SLOT(device->devfn);
87 func = PCI_FUNC(device->devfn);
89 address_reg = TITAN_PCI_0_CONFIG_ADDRESS;
90 data_reg = TITAN_PCI_0_CONFIG_DATA;
92 address = (bus << 16) | (dev << 11) | (func << 8) |
93 (offset & 0xfc) | 0x80000000;
95 /* start the configuration cycle */
96 TITAN_WRITE(address_reg, address);
101 TITAN_WRITE_8(data_reg + (offset & 0x3), val);
105 TITAN_WRITE_16(data_reg + (offset & 0x2), val);
109 TITAN_WRITE(data_reg, val);
113 return PCIBIOS_SUCCESSFUL;
117 * Titan PCI structure
119 struct pci_ops titan_pci_ops = {
124 void __init pcibios_init(void)
127 * XXX These values below need to change
129 ioport_resource.start = 0xe0000000;
130 ioport_resource.end = 0xe0000000 + 0x20000000 - 1;
131 iomem_resource.start = 0xc0000000;
132 iomem_resource.end = 0xc0000000 + 0x20000000 - 1;
134 pci_scan_bus(0, &titan_pci_ops, NULL);