1 #include <linux/kernel.h>
2 #include <linux/init.h>
3 #include <linux/types.h>
6 #include <asm/pci_channel.h>
9 #include <asm/ddb5xxx/ddb5xxx.h>
11 static struct resource extpci_io_resource = {
13 0x1000, /* leave some room for ISA bus */
18 static struct resource extpci_mem_resource = {
20 DDB_PCI_MEM_BASE + 0x00100000, /* leave 1 MB for RTC */
21 DDB_PCI_MEM_BASE + DDB_PCI_MEM_SIZE - 1,
25 extern struct pci_ops ddb5476_ext_pci_ops;
27 struct pci_controller ddb5476_controller = {
28 .pci_ops = &ddb5476_ext_pci_ops,
29 .io_resource = &extpci_io_resource,
30 .mem_resource = &extpci_mem_resource,
33 #define PCI_EXT_INTA 8
34 #define PCI_EXT_INTB 9
35 #define PCI_EXT_INTC 10
36 #define PCI_EXT_INTD 11
37 #define PCI_EXT_INTE 12
39 #define MAX_SLOT_NUM 14
41 static unsigned char irq_map[MAX_SLOT_NUM] = {
42 [ 0] = nile4_to_irq(PCI_EXT_INTE),
43 [ 1] = nile4_to_irq(PCI_EXT_INTA),
44 [ 2] = nile4_to_irq(PCI_EXT_INTA),
45 [ 3] = nile4_to_irq(PCI_EXT_INTB),
46 [ 4] = nile4_to_irq(PCI_EXT_INTC),
47 [ 5] = nile4_to_irq(NILE4_INT_UART),
48 [10] = nile4_to_irq(PCI_EXT_INTE),
49 [13] = nile4_to_irq(PCI_EXT_INTE),
52 int __init pcibios_map_irq(struct pci_dev *dev, u8 slot, u8 pin)
57 void __init ddb_pci_reset_bus(void)
62 * I am not sure about the "official" procedure, the following
63 * steps work as far as I know:
64 * We first set PCI cold reset bit (bit 31) in PCICTRL-H.
65 * Then we clear the PCI warm reset bit (bit 30) to 0 in PCICTRL-H.
66 * The same is true for both PCI channels.
68 temp = ddb_in32(DDB_PCICTRL + 4);
70 ddb_out32(DDB_PCICTRL + 4, temp);
72 ddb_out32(DDB_PCICTRL + 4, temp);