2 * Copyright 2003 PMC-Sierra Inc.
3 * Author: Manish Lachwani (lachwani@pmc-sierra.com
5 * First-level interrupt router for the PMC-Sierra Titan board
7 * This program is free software; you can redistribute it and/or modify it
8 * under the terms of the GNU General Public License as published by the
9 * Free Software Foundation; either version 2 of the License, or (at your
10 * option) any later version.
12 * Titan supports Hypertransport or PCI but not both. Hence, one interrupt
13 * line is shared between the PCI slot A and Hypertransport. This is the
17 #include <linux/config.h>
19 #include <asm/mipsregs.h>
20 #include <asm/addrspace.h>
21 #include <asm/regdef.h>
22 #include <asm/stackframe.h>
25 NESTED(titan_handle_int, PT_SIZE, sp)
35 andi t1, t0, STATUSF_IP2 /* INTB0 hardware line */
36 bnez t1, ll_pcia_irq /* 64-bit PCI */
37 andi t1, t0, STATUSF_IP3 /* INTB1 hardware line */
38 bnez t1, ll_pcib_irq /* second 64-bit PCI slot */
39 andi t1, t0, STATUSF_IP4 /* INTB2 hardware line */
40 bnez t1, ll_duart_irq /* UART */
41 andi t1, t0, STATUSF_IP5 /* SMP inter-core interrupts */
43 andi t1, t0, STATUSF_IP6
44 bnez t1, ll_ht_irq /* Hypertransport */
45 andi t1, t0, STATUSF_IP7 /* INTB5 hardware line */
46 bnez t1, ll_timer_irq /* Timer */
51 /* Extended interrupts */
53 cfc0 t1, CP0_S1_INTCONTROL
71 #ifdef CONFIG_HYPERTRANSPORT
72 jal ll_ht_smp_irq_handler
94 jal jaguar_mailbox_irq
103 jal ll_ht_smp_irq_handler