2 * Copyright (C) 2003 PMC-Sierra Inc.
3 * Author: Manish Lachwani (lachwani@pmc-sierra.com)
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms of the GNU General Public License as published by the
7 * Free Software Foundation; either version 2 of the License, or (at your
8 * option) any later version.
10 * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
11 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
12 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
13 * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
14 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
15 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
16 * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
17 * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
18 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
19 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
21 * You should have received a copy of the GNU General Public License along
22 * with this program; if not, write to the Free Software Foundation, Inc.,
23 * 675 Mass Ave, Cambridge, MA 02139, USA.
25 * Second level Interrupt handlers for the PMC-Sierra Titan/Yosemite board
28 #include <linux/errno.h>
29 #include <linux/init.h>
30 #include <linux/kernel_stat.h>
31 #include <linux/module.h>
32 #include <linux/signal.h>
33 #include <linux/sched.h>
34 #include <linux/types.h>
35 #include <linux/interrupt.h>
36 #include <linux/ioport.h>
37 #include <linux/timex.h>
38 #include <linux/slab.h>
39 #include <linux/random.h>
40 #include <asm/bitops.h>
41 #include <asm/bootinfo.h>
44 #include <asm/irq_cpu.h>
45 #include <asm/mipsregs.h>
46 #include <asm/system.h>
47 #include <asm/titan_dep.h>
49 /* Hypertransport specific */
50 #define IRQ_ACK_BITS 0x00000000 /* Ack bits */
52 #define HYPERTRANSPORT_INTA 0x78 /* INTA# */
53 #define HYPERTRANSPORT_INTB 0x79 /* INTB# */
54 #define HYPERTRANSPORT_INTC 0x7a /* INTC# */
55 #define HYPERTRANSPORT_INTD 0x7b /* INTD# */
57 extern asmlinkage void titan_handle_int(void);
58 extern void jaguar_mailbox_irq(struct pt_regs *);
61 * Handle hypertransport & SMP interrupts. The interrupt lines are scarce.
62 * For interprocessor interrupts, the best thing to do is to use the INTMSG
63 * register. We use the same external interrupt line, i.e. INTB3 and monitor
66 asmlinkage void ll_ht_smp_irq_handler(int irq, struct pt_regs *regs)
68 u32 status = OCD_READ(RM9000x2_OCD_INTP0STATUS4);
70 /* Ack all the bits that correspond to the interrupt sources */
72 OCD_WRITE(RM9000x2_OCD_INTP0STATUS4, IRQ_ACK_BITS);
74 status = OCD_READ(RM9000x2_OCD_INTP1STATUS4);
76 OCD_WRITE(RM9000x2_OCD_INTP1STATUS4, IRQ_ACK_BITS);
78 #ifdef CONFIG_HT_LEVEL_TRIGGER
80 * Level Trigger Mode only. Send the HT EOI message back to the source.
84 OCD_WRITE(RM9000x2_OCD_HTEOI, HYPERTRANSPORT_INTA);
87 OCD_WRITE(RM9000x2_OCD_HTEOI, HYPERTRANSPORT_INTB);
90 OCD_WRITE(RM9000x2_OCD_HTEOI, HYPERTRANSPORT_INTC);
93 OCD_WRITE(RM9000x2_OCD_HTEOI, HYPERTRANSPORT_INTD);
97 OCD_WRITE(RM9000x2_OCD_HTEOI, 0x20);
98 OCD_WRITE(IRQ_CLEAR_REG, IRQ_ACK_BITS);
101 OCD_WRITE(RM9000x2_OCD_HTEOI, HYPERTRANSPORT_INTA);
102 OCD_WRITE(RM9000x2_OCD_HTEOI, HYPERTRANSPORT_INTB);
103 OCD_WRITE(RM9000x2_OCD_HTEOI, HYPERTRANSPORT_INTC);
104 OCD_WRITE(RM9000x2_OCD_HTEOI, HYPERTRANSPORT_INTD);
107 #endif /* CONFIG_HT_LEVEL_TRIGGER */
113 extern void init_second_port(void);
114 extern void breakpoint(void);
115 extern void set_debug_traps(void);
119 * Initialize the next level interrupt handler
121 void __init init_IRQ(void)
123 clear_c0_status(ST0_IM);
125 set_except_vector(0, titan_handle_int);
127 mips_cpu_irq_init(0);
128 rm7k_cpu_irq_init(8);
131 /* At this point, initialize the second serial port */
133 printk("Start kgdb ... \n");
138 #ifdef CONFIG_GDB_CONSOLE
139 register_gdb_console();
145 * The 16550 DUART has two ports, but is allocated one IRQ
146 * for the serial console. Hence, a generic framework for
147 * serial IRQ routing in place. Currently, just calls the
148 * do_IRQ fuction. But, going in the future, need to check
149 * DUART registers for channel A and B, then decide the
152 asmlinkage void yosemite_kgdb_irq(int irq, struct pt_regs *regs)