2 * RTC routines for RICOH Rx5C348 SPI chip.
3 * Copyright (C) 2000-2001 Toshiba Corporation
5 * 2003-2005 (c) MontaVista Software, Inc. This file is licensed under the
6 * terms of the GNU General Public License version 2. This program is
7 * licensed "as is" without any warranty of any kind, whether express
10 * Support for TX4938 in 2.6 - Manish Lachwani (mlachwani@mvista.com)
12 #include <linux/init.h>
13 #include <linux/kernel.h>
14 #include <linux/string.h>
15 #include <linux/rtc.h>
16 #include <linux/time.h>
18 #include <asm/tx4938/spi.h>
23 #define Rx5C348_REG_SECOND 0
24 #define Rx5C348_REG_MINUTE 1
25 #define Rx5C348_REG_HOUR 2
26 #define Rx5C348_REG_WEEK 3
27 #define Rx5C348_REG_DAY 4
28 #define Rx5C348_REG_MONTH 5
29 #define Rx5C348_REG_YEAR 6
30 #define Rx5C348_REG_ADJUST 7
31 #define Rx5C348_REG_ALARM_W_MIN 8
32 #define Rx5C348_REG_ALARM_W_HOUR 9
33 #define Rx5C348_REG_ALARM_W_WEEK 10
34 #define Rx5C348_REG_ALARM_D_MIN 11
35 #define Rx5C348_REG_ALARM_D_HOUR 12
36 #define Rx5C348_REG_CTL1 14
37 #define Rx5C348_REG_CTL2 15
40 #define Rx5C348_BIT_PM 0x20 /* REG_HOUR */
41 #define Rx5C348_BIT_Y2K 0x80 /* REG_MONTH */
42 #define Rx5C348_BIT_24H 0x20 /* REG_CTL1 */
43 #define Rx5C348_BIT_XSTP 0x10 /* REG_CTL2 */
46 #define Rx5C348_CMD_W(addr) (((addr) << 4) | 0x08) /* single write */
47 #define Rx5C348_CMD_R(addr) (((addr) << 4) | 0x0c) /* single read */
48 #define Rx5C348_CMD_MW(addr) (((addr) << 4) | 0x00) /* burst write */
49 #define Rx5C348_CMD_MR(addr) (((addr) << 4) | 0x04) /* burst read */
51 static struct spi_dev_desc srtc_dev_desc = {
52 .baud = 1000000, /* 1.0Mbps @ Vdd 2.0V */
56 /* 31us for Tcss (62us for Tcsr) is required for carry operation) */
57 .byteorder = 1, /* MSB-First */
58 .polarity = 0, /* High-Active */
59 .phase = 1, /* Shift-Then-Sample */
62 static int srtc_chipid;
66 spi_rtc_io(unsigned char *inbuf, unsigned char *outbuf, unsigned int count)
68 unsigned char *inbufs[1], *outbufs[1];
69 unsigned int incounts[2], outcounts[2];
76 return txx9_spi_io(srtc_chipid, &srtc_dev_desc,
77 inbufs, incounts, outbufs, outcounts, 0);
81 * Conversion between binary and BCD.
84 #define BCD_TO_BIN(val) ((val)=((val)&15) + ((val)>>4)*10)
88 #define BIN_TO_BCD(val) ((val)=(((val)/10)<<4) + (val)%10)
91 /* RTC-dependent code for time.c */
94 rtc_rx5c348_set_time(unsigned long t)
96 unsigned char inbuf[8];
98 u8 year, month, day, hour, minute, second, century;
103 year = tm.tm_year % 100;
104 month = tm.tm_mon+1; /* tm_mon starts from 0 to 11 */
109 century = tm.tm_year / 100;
111 inbuf[0] = Rx5C348_CMD_MW(Rx5C348_REG_SECOND);
121 /* hour 0 is AM12, noon is PM12 */
124 inbuf[3] = Rx5C348_BIT_PM;
125 hour = (hour + 11) % 12 + 1;
129 inbuf[4] = 0; /* ignore week */
135 inbuf[6] |= Rx5C348_BIT_Y2K;
138 /* write in one transfer to avoid data inconsistency */
139 return spi_rtc_io(inbuf, NULL, 8);
143 rtc_rx5c348_get_time(void)
145 unsigned char inbuf[8], outbuf[8];
146 unsigned int year, month, day, hour, minute, second;
148 inbuf[0] = Rx5C348_CMD_MR(Rx5C348_REG_SECOND);
149 memset(inbuf + 1, 0, 7);
150 /* read in one transfer to avoid data inconsistency */
151 if (spi_rtc_io(inbuf, outbuf, 8))
161 hour = outbuf[3] & ~Rx5C348_BIT_PM;
164 if (outbuf[3] & Rx5C348_BIT_PM)
169 month = outbuf[6] & ~Rx5C348_BIT_Y2K;
175 return mktime(year, month, day, hour, minute, second);
179 rtc_rx5c348_init(int chipid)
181 unsigned char inbuf[2], outbuf[2];
182 srtc_chipid = chipid;
183 /* turn on RTC if it is not on */
184 inbuf[0] = Rx5C348_CMD_R(Rx5C348_REG_CTL2);
186 spi_rtc_io(inbuf, outbuf, 2);
187 if (outbuf[1] & Rx5C348_BIT_XSTP) {
188 inbuf[0] = Rx5C348_CMD_W(Rx5C348_REG_CTL2);
190 spi_rtc_io(inbuf, NULL, 2);
193 inbuf[0] = Rx5C348_CMD_R(Rx5C348_REG_CTL1);
195 spi_rtc_io(inbuf, outbuf, 2);
196 if (outbuf[1] & Rx5C348_BIT_24H)
199 /* set the function pointers */
200 rtc_get_time = rtc_rx5c348_get_time;
201 rtc_set_time = rtc_rx5c348_set_time;