2 * bcu.c, Bus Control Unit routines for the NEC VR4100 series.
4 * Copyright (C) 2002 MontaVista Software Inc.
5 * Author: Yoichi Yuasa <yyuasa@mvista.com, or source@mvista.com>
6 * Copyright (C) 2003-2004 Yoichi Yuasa <yuasa@hh.iij4u.or.jp>
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; either version 2 of the License, or
11 * (at your option) any later version.
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
24 * MontaVista Software Inc. <yyuasa@mvista.com> or <source@mvista.com>
25 * - New creation, NEC VR4122 and VR4131 are supported.
26 * - Added support for NEC VR4111 and VR4121.
28 * Yoichi Yuasa <yuasa@hh.iij4u.or.jp>
29 * - Added support for NEC VR4133.
31 #include <linux/init.h>
32 #include <linux/ioport.h>
33 #include <linux/smp.h>
34 #include <linux/types.h>
39 #define IO_MEM_RESOURCE_START 0UL
40 #define IO_MEM_RESOURCE_END 0x1fffffffUL
42 #define CLKSPEEDREG_TYPE1 KSEG1ADDR(0x0b000014)
43 #define CLKSPEEDREG_TYPE2 KSEG1ADDR(0x0f000014)
44 #define CLKSP(x) ((x) & 0x001f)
45 #define CLKSP_VR4133(x) ((x) & 0x0007)
51 #define DIVT(x) (((x) & 0xf000) >> 12)
52 #define DIVVT(x) (((x) & 0x0f00) >> 8)
54 #define TDIVMODE(x) (2 << (((x) & 0x1000) >> 12))
55 #define VTDIVMODE(x) (((x) & 0x0700) >> 8)
57 static unsigned long vr41xx_vtclock;
58 static unsigned long vr41xx_tclock;
60 unsigned long vr41xx_get_vtclock_frequency(void)
62 return vr41xx_vtclock;
65 unsigned long vr41xx_get_tclock_frequency(void)
70 static inline uint16_t read_clkspeed(void)
72 switch (current_cpu_data.cputype) {
74 case CPU_VR4121: return readw(CLKSPEEDREG_TYPE1);
77 case CPU_VR4133: return readw(CLKSPEEDREG_TYPE2);
79 printk(KERN_INFO "Unexpected CPU of NEC VR4100 series\n");
86 static inline unsigned long calculate_pclock(uint16_t clkspeed)
88 unsigned long pclock = 0;
90 switch (current_cpu_data.cputype) {
93 pclock = 18432000 * 64;
94 pclock /= CLKSP(clkspeed);
97 pclock = 18432000 * 98;
98 pclock /= CLKSP(clkspeed);
101 pclock = 18432000 * 108;
102 pclock /= CLKSP(clkspeed);
105 switch (CLKSP_VR4133(clkspeed)) {
122 printk(KERN_INFO "Unknown PClock speed for NEC VR4133\n");
127 printk(KERN_INFO "Unexpected CPU of NEC VR4100 series\n");
131 printk(KERN_INFO "PClock: %ldHz\n", pclock);
136 static inline unsigned long calculate_vtclock(uint16_t clkspeed, unsigned long pclock)
138 unsigned long vtclock = 0;
140 switch (current_cpu_data.cputype) {
142 /* The NEC VR4111 doesn't have the VTClock. */
146 /* DIVVT == 9 Divide by 1.5 . VTClock = (PClock * 6) / 9 */
147 if (DIVVT(clkspeed) == 9)
148 vtclock = pclock * 6;
149 /* DIVVT == 10 Divide by 2.5 . VTClock = (PClock * 4) / 10 */
150 else if (DIVVT(clkspeed) == 10)
151 vtclock = pclock * 4;
152 vtclock /= DIVVT(clkspeed);
153 printk(KERN_INFO "VTClock: %ldHz\n", vtclock);
156 if(VTDIVMODE(clkspeed) == 7)
157 vtclock = pclock / 1;
158 else if(VTDIVMODE(clkspeed) == 1)
159 vtclock = pclock / 2;
161 vtclock = pclock / VTDIVMODE(clkspeed);
162 printk(KERN_INFO "VTClock: %ldHz\n", vtclock);
166 vtclock = pclock / VTDIVMODE(clkspeed);
167 printk(KERN_INFO "VTClock: %ldHz\n", vtclock);
170 printk(KERN_INFO "Unexpected CPU of NEC VR4100 series\n");
177 static inline unsigned long calculate_tclock(uint16_t clkspeed, unsigned long pclock,
178 unsigned long vtclock)
180 unsigned long tclock = 0;
182 switch (current_cpu_data.cputype) {
184 if (!(clkspeed & DIV2B))
186 else if (!(clkspeed & DIV3B))
188 else if (!(clkspeed & DIV4B))
192 tclock = pclock / DIVT(clkspeed);
197 tclock = vtclock / TDIVMODE(clkspeed);
200 printk(KERN_INFO "Unexpected CPU of NEC VR4100 series\n");
204 printk(KERN_INFO "TClock: %ldHz\n", tclock);
209 static int __init vr41xx_bcu_init(void)
211 unsigned long pclock;
214 clkspeed = read_clkspeed();
216 pclock = calculate_pclock(clkspeed);
217 vr41xx_vtclock = calculate_vtclock(clkspeed, pclock);
218 vr41xx_tclock = calculate_tclock(clkspeed, pclock, vr41xx_vtclock);
220 iomem_resource.start = IO_MEM_RESOURCE_START;
221 iomem_resource.end = IO_MEM_RESOURCE_END;
226 early_initcall(vr41xx_bcu_init);