3 * This file is subject to the terms and conditions of the GNU General Public
4 * License. See the file "COPYING" in the main directory of this archive
7 * Copyright (C) 1999 by Helge Deller
8 * Copyright 1999 SuSE GmbH (Philipp Rumpf)
9 * Copyright 1999 Philipp Rumpf (prumpf@tux.org)
11 * Initial Version 04-23-1999 by Helge Deller <deller@gmx.de>
14 #include <linux/autoconf.h> /* for CONFIG_SMP */
16 #include <asm/offsets.h>
19 #include <asm/assembly.h>
20 #include <asm/pgtable.h>
36 .import init_thread_union,data
37 .import $global$ /* forward declaration */
38 .import fault_vector_11,code /* IVA parisc 1.1 32 bit */
39 .import fault_vector_20,code /* IVA parisc 2.0 32 bit */
42 .export _stext,data /* Kernel want it this way! */
48 /* Make sure sr4-sr7 are set to zero for the kernel address space */
54 /* Clear BSS (shouldn't the boot loader do this?) */
56 .import __bss_start,data
57 .import __bss_stop,data
59 ldil L%PA(__bss_start),%r3
60 ldo R%PA(__bss_start)(%r3),%r3
61 ldil L%PA(__bss_stop),%r4
62 ldo R%PA(__bss_stop)(%r4),%r4
64 cmpb,<<,n %r3,%r4,$bss_loop
67 /* Save away the arguments the boot loader passed in (32 bit args) */
69 ldil L%PA(boot_args),%r1
70 ldo R%PA(boot_args)(%r1),%r1
76 /* Initialize startup VM. Just map first 8 MB of memory */
78 ldo R%PA(pg0)(%r1),%r1
79 shr %r1,PxD_VALUE_SHIFT,%r3
80 ldo (PxD_FLAG_PRESENT+PxD_FLAG_VALID)(%r3),%r3
82 ldil L%PA(swapper_pg_dir),%r4
83 ldo R%PA(swapper_pg_dir)(%r4),%r4
84 mtctl %r4,%cr24 /* Initialize kernel root pointer */
85 mtctl %r4,%cr25 /* Initialize user root pointer */
86 ldi ASM_PT_INITIAL,%r1
87 ldo ASM_PGD_ENTRY*ASM_PGD_ENTRY_SIZE(%r4),%r4
90 ldo (ASM_PAGE_SIZE >> PxD_VALUE_SHIFT)(%r3),%r3
92 ldo ASM_PGD_ENTRY_SIZE(%r4),%r4
94 ldo _PAGE_KERNEL(%r0),%r3 /* Hardwired 0 phys addr start */
96 ldo R%PA(pg0)(%r1),%r1
98 stwm %r3,ASM_PTE_ENTRY_SIZE(%r1)
99 ldo ASM_PAGE_SIZE(%r3),%r3
100 bb,>= %r3,31-KERNEL_INITIAL_ORDER,$pgt_fill_loop
104 /* Load the return address...er...crash 'n burn */
107 /* And the RFI Target address too */
108 ldil L%start_kernel,%r11
109 ldo R%start_kernel(%r11),%r11
111 /* And the initial task pointer */
113 ldil L%init_thread_union,%r6
114 ldo R%init_thread_union(%r6),%r6
117 /* And the stack pointer too */
119 ldo THREAD_SZ_ALGN(%r6),%sp
121 /* And the interrupt stack */
123 ldil L%interrupt_stack,%r6
124 ldo R%interrupt_stack(%r6),%r6
128 /* Set the smp rendevous address into page zero.
129 ** It would be safer to do this in init_smp_config() but
130 ** it's just way easier to deal with here because
131 ** of 64-bit function ptrs and the address is local to this file.
133 ldil L%PA(smp_slave_stext),%r10
134 ldo R%PA(smp_slave_stext)(%r10),%r10
135 stw %r10,0x10(%r0) /* MEM_RENDEZ */
136 stw %r0,0x28(%r0) /* MEM_RENDEZ_HI - assume addr < 4GB */
142 ** Code Common to both Monarch and Slave processors.
144 ** %r11 must contain RFI target address.
145 ** %r25/%r26 args to pass to target function
146 ** %r2 in case rfi target decides it didn't like something
148 ** Caller must init: SR4-7, %sp, %r10, %cr24/25,
154 /* Clear PDC entry point - we won't use it */
155 stw %r0,0x10(%r0) /* MEM_RENDEZ */
156 stw %r0,0x28(%r0) /* MEM_RENDEZ_HI */
159 /* PARANOID: clear user scratch/user space SR's */
165 /* Initialize Protection Registers */
171 /* Initialize the global data pointer */
173 ldo R%$global$(%dp),%dp
176 * Set up our interrupt table. HPMCs might not work after this!
178 * We need to install the correct iva for PA1.1 or PA2.0. The
179 * following short sequence of instructions can determine this
180 * (without being illegal on a PA1.1 machine).
187 comib,<>,n 0,%r10,$is_pa20
188 ldil L%PA(fault_vector_11),%r10
190 ldo R%PA(fault_vector_11)(%r10),%r10
193 ldil L%PA(fault_vector_20),%r10
194 ldo R%PA(fault_vector_20)(%r10),%r10
199 /* Disable Q bit so we can load the iia queue */
203 * - no interruptions except HPMC and TOC (which are handled by PDC)
204 * - Q bit set (IODC / PDC interruptions)
208 ldil L%KERNEL_PSW,%r10
209 ldo R%KERNEL_PSW(%r10),%r10
212 /* Set the space pointers for the post-RFI world
213 ** Clear the two-level IIA Space Queue, effectively setting
216 mtctl %r0,%cr17 /* Clear IIASQ tail */
217 mtctl %r0,%cr17 /* Clear IIASQ head */
219 /* Load RFI target into PC queue */
220 mtctl %r11,%cr18 /* IIAOQ head */
222 mtctl %r11,%cr18 /* IIAOQ tail */
224 /* Jump to hyperspace */
232 .import smp_init_current_idle_task,data
233 .import smp_callin,code
238 break 1,1 /* Break if returned from start_secondary */
243 /***************************************************************************
245 * smp_slave_stext is executed by all non-monarch Processors when the Monarch
246 * pokes the slave CPUs in smp.c:smp_boot_cpus().
248 * Once here, registers values are initialized in order to branch to virtual
249 * mode. Once all available/eligible CPUs are in virtual mode, all are
250 * released and start out by executing their own idle task.
251 *****************************************************************************/
259 ** Initialize Space registers
266 /* Initialize the SP - monarch sets up smp_init_current_idle_task */
267 ldil L%PA(smp_init_current_idle_task),%sp
268 ldo R%PA(smp_init_current_idle_task)(%sp),%sp
269 ldw 0(%sp),%sp /* load task address */
271 ldw TASK_THREAD_INFO(%sp), %sp
272 mtctl %sp,%cr30 /* store in cr30 */
273 addil L%THREAD_SZ_ALGN,%sp /* stack is above task */
274 ldo R%THREAD_SZ_ALGN(%r1),%sp
276 /* point CPU to kernel page tables */
277 ldil L%PA(swapper_pg_dir),%r4
278 ldo R%PA(swapper_pg_dir)(%r4),%r4
279 mtctl %r4,%cr24 /* Initialize kernel root pointer */
280 mtctl %r4,%cr25 /* Initialize user root pointer */
282 /* Load RFI *return* address in case smp_callin bails */
283 ldil L%smp_callin_rtn,%r2
284 ldo R%smp_callin_rtn(%r2),%r2
286 /* Load RFI target address. */
287 ldil L%smp_callin,%r11
288 ldo R%smp_callin(%r11),%r11
290 /* ok...common code can handle the rest */
295 #endif /* CONFIG_SMP */
300 .export $global$,data
302 .type $global$,@object