2 * arch/ppc/4xx_io/serial_sicc.c
4 * Driver for IBM STB3xxx SICC serial port
6 * Based on drivers/char/serial_amba.c, by ARM Ltd.
8 * Copyright 2001 IBM Crop.
9 * Author: IBM China Research Lab
10 * Yudong Yang <yangyud@cn.ibm.com>
11 * Yi Ge <geyi@cn.ibm.com>
13 * This program is free software; you can redistribute it and/or modify
14 * it under the terms of the GNU General Public License as published by
15 * the Free Software Foundation; either version 2 of the License, or
16 * (at your option) any later version.
18 * This program is distributed in the hope that it will be useful,
19 * but WITHOUT ANY WARRANTY; without even the implied warranty of
20 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
21 * GNU General Public License for more details.
23 * You should have received a copy of the GNU General Public License
24 * along with this program; if not, write to the Free Software
25 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
28 * This is a driver for SICC serial port on IBM Redwood 4 evaluation board.
29 * The driver support both as a console device and normal serial device and
30 * is compatible with normal ttyS* devices.
33 #include <linux/config.h>
34 #include <linux/module.h>
35 #include <linux/kernel.h>
36 #include <linux/errno.h>
37 #include <linux/signal.h>
38 #include <linux/sched.h>
39 #include <linux/interrupt.h>
40 #include <linux/tty.h>
41 #include <linux/tty_flip.h>
42 #include <linux/major.h>
43 #include <linux/string.h>
44 #include <linux/fcntl.h>
45 #include <linux/ptrace.h>
46 #include <linux/ioport.h>
48 #include <linux/slab.h>
49 #include <linux/init.h>
50 #include <linux/circ_buf.h>
51 #include <linux/serial.h>
52 #include <linux/console.h>
53 #include <linux/sysrq.h>
54 #include <linux/bitops.h>
56 #include <asm/system.h>
59 #include <asm/uaccess.h>
60 #include <asm/serial.h>
63 #include <linux/serialP.h>
66 /* -----------------------------------------------------------------------------
67 * From STB03xxx SICC UART Specification
68 * -----------------------------------------------------------------------------
69 * UART Register Offsets.
72 #define BL_SICC_LSR 0x0000000 /* line status register read/clear */
73 #define BL_SICC_LSRS 0x0000001 /* set line status register read/set */
74 #define BL_SICC_HSR 0x0000002 /* handshake status register r/clear */
75 #define BL_SICC_HSRS 0x0000003 /* set handshake status register r/set */
76 #define BL_SICC_BRDH 0x0000004 /* baudrate divisor high reg r/w */
77 #define BL_SICC_BRDL 0x0000005 /* baudrate divisor low reg r/w */
78 #define BL_SICC_LCR 0x0000006 /* control register r/w */
79 #define BL_SICC_RCR 0x0000007 /* receiver command register r/w */
80 #define BL_SICC_TxCR 0x0000008 /* transmitter command register r/w */
81 #define BL_SICC_RBR 0x0000009 /* receive buffer r */
82 #define BL_SICC_TBR 0x0000009 /* transmit buffer w */
83 #define BL_SICC_CTL2 0x000000A /* added for Vesta */
84 #define BL_SICC_IrCR 0x000000B /* added for Vesta IR */
86 /* masks and definitions for serial port control register */
88 #define _LCR_LM_MASK 0xc0 /* loop back modes */
89 #define _LCR_DTR_MASK 0x20 /* data terminal ready 0-inactive */
90 #define _LCR_RTS_MASK 0x10 /* request to send 0-inactive */
91 #define _LCR_DB_MASK 0x08 /* data bits mask */
92 #define _LCR_PE_MASK 0x04 /* parity enable */
93 #define _LCR_PTY_MASK 0x02 /* parity */
94 #define _LCR_SB_MASK 0x01 /* stop bit mask */
96 #define _LCR_LM_NORM 0x00 /* normal operation */
97 #define _LCR_LM_LOOP 0x40 /* internal loopback mode */
98 #define _LCR_LM_ECHO 0x80 /* automatic echo mode */
99 #define _LCR_LM_RES 0xc0 /* reserved */
101 #define _LCR_DTR_ACTIVE _LCR_DTR_MASK /* DTR is active */
102 #define _LCR_RTS_ACTIVE _LCR_RTS_MASK /* RTS is active */
103 #define _LCR_DB_8_BITS _LCR_DB_MASK /* 8 data bits */
104 #define _LCR_DB_7_BITS 0x00 /* 7 data bits */
105 #define _LCR_PE_ENABLE _LCR_PE_MASK /* parity enabled */
106 #define _LCR_PE_DISABLE 0x00 /* parity disabled */
107 #define _LCR_PTY_EVEN 0x00 /* even parity */
108 #define _LCR_PTY_ODD _LCR_PTY_MASK /* odd parity */
109 #define _LCR_SB_1_BIT 0x00 /* one stop bit */
110 #define _LCR_SB_2_BIT _LCR_SB_MASK /* two stop bit */
112 /* serial port handshake register */
114 #define _HSR_DIS_MASK 0x80 /* DSR input inactive error mask */
115 #define _HSR_CS_MASK 0x40 /* CTS input inactive error mask */
116 #define _HSR_DIS_ACT 0x00 /* dsr input is active */
117 #define _HSR_DIS_INACT _HSR_DIS_MASK /* dsr input is inactive */
118 #define _HSR_CS_ACT 0x00 /* cts input is active */
119 #define _HSR_CS_INACT _HSR_CS_MASK /* cts input is active */
121 /* serial port line status register */
123 #define _LSR_RBR_MASK 0x80 /* receive buffer ready mask */
124 #define _LSR_FE_MASK 0x40 /* framing error */
125 #define _LSR_OE_MASK 0x20 /* overrun error */
126 #define _LSR_PE_MASK 0x10 /* parity error */
127 #define _LSR_LB_MASK 0x08 /* line break */
128 #define _LSR_TBR_MASK 0x04 /* transmit buffer ready */
129 #define _LSR_TSR_MASK 0x02 /* transmit shift register ready */
131 #define _LSR_RBR_FULL _LSR_RBR_MASK /* receive buffer is full */
132 #define _LSR_FE_ERROR _LSR_FE_MASK /* framing error detected */
133 #define _LSR_OE_ERROR _LSR_OE_MASK /* overrun error detected */
134 #define _LSR_PE_ERROR _LSR_PE_MASK /* parity error detected */
135 #define _LSR_LB_BREAK _LSR_LB_MASK /* line break detected */
136 #define _LSR_TBR_EMPTY _LSR_TBR_MASK /* transmit buffer is ready */
137 #define _LSR_TSR_EMPTY _LSR_TSR_MASK /* transmit shift register is empty */
138 #define _LSR_TX_ALL 0x06 /* all physical transmit is done */
140 #define _LSR_RX_ERR (_LSR_LB_BREAK | _LSR_FE_MASK | _LSR_OE_MASK | \
143 /* serial port receiver command register */
145 #define _RCR_ER_MASK 0x80 /* enable receiver mask */
146 #define _RCR_DME_MASK 0x60 /* dma mode */
147 #define _RCR_EIE_MASK 0x10 /* error interrupt enable mask */
148 #define _RCR_PME_MASK 0x08 /* pause mode mask */
150 #define _RCR_ER_ENABLE _RCR_ER_MASK /* receiver enabled */
151 #define _RCR_DME_DISABLE 0x00 /* dma disabled */
152 #define _RCR_DME_RXRDY 0x20 /* dma disabled, RxRDY interrupt enabled*/
153 #define _RCR_DME_ENABLE2 0x40 /* dma enabled,receiver src channel 2 */
154 #define _RCR_DME_ENABLE3 0x60 /* dma enabled,receiver src channel 3 */
155 #define _RCR_PME_HARD _RCR_PME_MASK /* RTS controlled by hardware */
156 #define _RCR_PME_SOFT 0x00 /* RTS controlled by software */
158 /* serial port transmit command register */
160 #define _TxCR_ET_MASK 0x80 /* transmiter enable mask */
161 #define _TxCR_DME_MASK 0x60 /* dma mode mask */
162 #define _TxCR_TIE_MASK 0x10 /* empty interrupt enable mask */
163 #define _TxCR_EIE_MASK 0x08 /* error interrupt enable mask */
164 #define _TxCR_SPE_MASK 0x04 /* stop/pause mask */
165 #define _TxCR_TB_MASK 0x02 /* transmit break mask */
167 #define _TxCR_ET_ENABLE _TxCR_ET_MASK /* transmiter enabled */
168 #define _TxCR_DME_DISABLE 0x00 /* transmiter disabled, TBR intr disabled */
169 #define _TxCR_DME_TBR 0x20 /* transmiter disabled, TBR intr enabled */
170 #define _TxCR_DME_CHAN_2 0x40 /* dma enabled, destination chann 2 */
171 #define _TxCR_DME_CHAN_3 0x60 /* dma enabled, destination chann 3 */
173 /* serial ctl reg 2 - added for Vesta */
175 #define _CTL2_EXTERN 0x80 /* */
176 #define _CTL2_USEFIFO 0x40 /* */
177 #define _CTL2_RESETRF 0x08 /* */
178 #define _CTL2_RESETTF 0x04 /* */
182 #define SERIAL_SICC_NAME "ttySICC"
183 #define SERIAL_SICC_MAJOR 150
184 #define SERIAL_SICC_MINOR 1
185 #define SERIAL_SICC_NR 1
195 * Things needed by tty driver
197 static struct tty_driver *siccnormal_driver;
199 #if defined(CONFIG_SERIAL_SICC_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ)
200 #define SUPPORT_SYSRQ
204 * Things needed internally to this driver
208 * tmp_buf is used as a temporary buffer by serial_write. We need to
209 * lock it in case the copy_from_user blocks while swapping in a page,
210 * and some other program tries to do a serial write at the same time.
211 * Since the lock will only come under contention when the system is
212 * swapping and available memory is low, it makes sense to share one
213 * buffer across all the serial ports, since it significantly saves
214 * memory if large numbers of serial ports are open.
216 static u_char *tmp_buf;
217 static DECLARE_MUTEX(tmp_buf_sem);
219 #define HIGH_BITS_OFFSET ((sizeof(long)-sizeof(int))*8)
221 /* number of characters left in xmit buffer before we ask for more */
222 #define WAKEUP_CHARS 256
223 #define SICC_ISR_PASS_LIMIT 256
225 #define EVT_WRITE_WAKEUP 0
242 * Static information about the port
245 unsigned int uart_base;
246 unsigned int uart_base_phys;
249 unsigned int uartclk;
250 unsigned int fifosize;
251 unsigned int tiocm_support;
252 void (*set_mctrl)(struct SICC_port *, u_int mctrl);
256 * This is the state information which is persistent across opens
259 struct SICC_icount icount;
261 unsigned int close_delay;
262 unsigned int closing_wait;
263 unsigned int custom_divisor;
266 struct SICC_info *info;
269 #define SICC_XMIT_SIZE 1024
271 * This is the state information which is only valid when the port is open.
274 struct SICC_port *port;
275 struct SICC_state *state;
276 struct tty_struct *tty;
277 unsigned char x_char;
278 unsigned char old_status;
279 unsigned char read_status_mask;
280 unsigned char ignore_status_mask;
281 struct circ_buf xmit;
288 unsigned int timeout;
293 struct tasklet_struct tlet;
295 wait_queue_head_t open_wait;
296 wait_queue_head_t close_wait;
297 wait_queue_head_t delta_msr_wait;
300 #ifdef CONFIG_SERIAL_SICC_CONSOLE
301 static struct console siccuart_cons;
303 static void siccuart_change_speed(struct SICC_info *info, struct termios *old_termios);
304 static void siccuart_wait_until_sent(struct tty_struct *tty, int timeout);
308 static void powerpcMtcic_cr(unsigned long value)
310 mtdcr(DCRN_CICCR, value);
313 static unsigned long powerpcMfcic_cr(void)
315 return mfdcr(DCRN_CICCR);
318 static unsigned long powerpcMfclkgpcr(void)
320 return mfdcr(DCRN_SCCR);
323 static void sicc_set_mctrl_null(struct SICC_port *port, u_int mctrl)
327 static struct SICC_port sicc_ports[SERIAL_SICC_NR] = {
330 .uart_base_phys = SICC0_IO_BASE,
331 .irqrx = SICC0_INTRX,
332 .irqtx = SICC0_INTTX,
335 .set_mctrl = sicc_set_mctrl_null,
339 static struct SICC_state sicc_state[SERIAL_SICC_NR];
341 static void siccuart_enable_rx_interrupt(struct SICC_info *info)
345 cr = readb(info->port->uart_base+BL_SICC_RCR);
346 cr &= ~_RCR_DME_MASK;
347 cr |= _RCR_DME_RXRDY;
348 writeb(cr, info->port->uart_base+BL_SICC_RCR);
351 static void siccuart_disable_rx_interrupt(struct SICC_info *info)
355 cr = readb(info->port->uart_base+BL_SICC_RCR);
356 cr &= ~_RCR_DME_MASK;
357 cr |= _RCR_DME_DISABLE;
358 writeb(cr, info->port->uart_base+BL_SICC_RCR);
362 static void siccuart_enable_tx_interrupt(struct SICC_info *info)
366 cr = readb(info->port->uart_base+BL_SICC_TxCR);
367 cr &= ~_TxCR_DME_MASK;
369 writeb(cr, info->port->uart_base+BL_SICC_TxCR);
372 static void siccuart_disable_tx_interrupt(struct SICC_info *info)
376 cr = readb(info->port->uart_base+BL_SICC_TxCR);
377 cr &= ~_TxCR_DME_MASK;
378 cr |= _TxCR_DME_DISABLE;
379 writeb(cr, info->port->uart_base+BL_SICC_TxCR);
383 static void siccuart_stop(struct tty_struct *tty)
385 struct SICC_info *info = tty->driver_data;
388 save_flags(flags); cli();
389 siccuart_disable_tx_interrupt(info);
390 restore_flags(flags);
393 static void siccuart_start(struct tty_struct *tty)
395 struct SICC_info *info = tty->driver_data;
398 save_flags(flags); cli();
399 if (info->xmit.head != info->xmit.tail
401 siccuart_enable_tx_interrupt(info);
402 restore_flags(flags);
407 * This routine is used by the interrupt handler to schedule
408 * processing in the software interrupt portion of the driver.
410 static void siccuart_event(struct SICC_info *info, int event)
412 info->event |= 1 << event;
413 tasklet_schedule(&info->tlet);
417 siccuart_rx_chars(struct SICC_info *info, struct pt_regs *regs)
419 struct tty_struct *tty = info->tty;
420 unsigned int status, ch, rsr, flg, ignored = 0;
421 struct SICC_icount *icount = &info->state->icount;
422 struct SICC_port *port = info->port;
424 status = readb(port->uart_base+BL_SICC_LSR );
425 while (status & _LSR_RBR_FULL) {
426 ch = readb(port->uart_base+BL_SICC_RBR);
428 if (tty->flip.count >= TTY_FLIPBUF_SIZE)
435 * Note that the error handling code is
436 * out of the main execution path
438 rsr = readb(port->uart_base+BL_SICC_LSR);
439 if (rsr & _LSR_RX_ERR)
443 if (ch && time_before(jiffies, info->sysrq)) {
444 handle_sysrq(ch, regs, NULL);
452 *tty->flip.flag_buf_ptr++ = flg;
453 *tty->flip.char_buf_ptr++ = ch;
456 status = readb(port->uart_base+BL_SICC_LSR );
459 tty_flip_buffer_push(tty);
463 if (rsr & _LSR_LB_BREAK) {
464 rsr &= ~(_LSR_FE_MASK | _LSR_PE_MASK);
468 if (info->state->line == siccuart_cons.index) {
470 info->sysrq = jiffies + HZ*5;
475 } else if (rsr & _LSR_PE_MASK)
477 else if (rsr & _LSR_FE_MASK)
479 if (rsr & _LSR_OE_MASK)
482 if (rsr & info->ignore_status_mask) {
487 rsr &= info->read_status_mask;
489 if (rsr & _LSR_LB_BREAK)
491 else if (rsr & _LSR_PE_MASK)
493 else if (rsr & _LSR_FE_MASK)
496 if (rsr & _LSR_OE_MASK) {
498 * CHECK: does overrun affect the current character?
499 * ASSUMPTION: it does not.
501 *tty->flip.flag_buf_ptr++ = flg;
502 *tty->flip.char_buf_ptr++ = ch;
504 if (tty->flip.count >= TTY_FLIPBUF_SIZE)
515 static void siccuart_tx_chars(struct SICC_info *info)
517 struct SICC_port *port = info->port;
519 unsigned char status;
523 writeb(info->x_char, port->uart_base+ BL_SICC_TBR);
524 info->state->icount.tx++;
528 if (info->xmit.head == info->xmit.tail
529 || info->tty->stopped
530 || info->tty->hw_stopped) {
531 siccuart_disable_tx_interrupt(info);
532 writeb(status&(~_LSR_RBR_MASK),port->uart_base+BL_SICC_LSR);
536 count = port->fifosize;
538 writeb(info->xmit.buf[info->xmit.tail], port->uart_base+ BL_SICC_TBR);
539 info->xmit.tail = (info->xmit.tail + 1) & (SICC_XMIT_SIZE - 1);
540 info->state->icount.tx++;
541 if (info->xmit.head == info->xmit.tail)
543 } while (--count > 0);
545 if (CIRC_CNT(info->xmit.head,
547 SICC_XMIT_SIZE) < WAKEUP_CHARS)
548 siccuart_event(info, EVT_WRITE_WAKEUP);
550 if (info->xmit.head == info->xmit.tail) {
551 siccuart_disable_tx_interrupt(info);
556 static irqreturn_t siccuart_int_rx(int irq, void *dev_id, struct pt_regs *regs)
558 struct SICC_info *info = dev_id;
559 siccuart_rx_chars(info, regs);
564 static irqreturn_t siccuart_int_tx(int irq, void *dev_id, struct pt_regs *regs)
566 struct SICC_info *info = dev_id;
567 siccuart_tx_chars(info);
571 static void siccuart_tasklet_action(unsigned long data)
573 struct SICC_info *info = (struct SICC_info *)data;
574 struct tty_struct *tty;
577 if (!tty || !test_and_clear_bit(EVT_WRITE_WAKEUP, &info->event))
580 if ((tty->flags & (1 << TTY_DO_WRITE_WAKEUP)) &&
581 tty->ldisc.write_wakeup)
582 (tty->ldisc.write_wakeup)(tty);
583 wake_up_interruptible(&tty->write_wait);
586 static int siccuart_startup(struct SICC_info *info)
592 if (info->flags & ASYNC_INITIALIZED) {
596 page = get_zeroed_page(GFP_KERNEL);
600 if (info->port->uart_base == 0)
601 info->port->uart_base = (int)ioremap(info->port->uart_base_phys, PAGE_SIZE);
602 if (info->port->uart_base == 0) {
607 save_flags(flags); cli();
612 info->xmit.buf = (unsigned char *) page;
616 if (info->tty->termios->c_cflag & CBAUD)
617 info->mctrl = TIOCM_RTS | TIOCM_DTR;
618 info->port->set_mctrl(info->port, info->mctrl);
621 * initialise the old status of the modem signals
623 info->old_status = 0; // UART_GET_FR(info->port) & AMBA_UARTFR_MODEM_ANY;
627 clear_bit(TTY_IO_ERROR, &info->tty->flags);
628 info->xmit.head = info->xmit.tail = 0;
631 * Set up the tty->alt_speed kludge
634 if ((info->flags & ASYNC_SPD_MASK) == ASYNC_SPD_HI)
635 info->tty->alt_speed = 57600;
636 if ((info->flags & ASYNC_SPD_MASK) == ASYNC_SPD_VHI)
637 info->tty->alt_speed = 115200;
638 if ((info->flags & ASYNC_SPD_MASK) == ASYNC_SPD_SHI)
639 info->tty->alt_speed = 230400;
640 if ((info->flags & ASYNC_SPD_MASK) == ASYNC_SPD_WARP)
641 info->tty->alt_speed = 460800;
645 writeb( 0x00, info->port->uart_base + BL_SICC_IrCR ); // disable IrDA
649 * and set the speed of the serial port
651 siccuart_change_speed(info, 0);
653 // enable rx/tx ports
654 writeb(_RCR_ER_ENABLE /*| _RCR_PME_HARD*/, info->port->uart_base + BL_SICC_RCR);
655 writeb(_TxCR_ET_ENABLE , info->port->uart_base + BL_SICC_TxCR);
657 readb(info->port->uart_base + BL_SICC_RBR); // clear rx port
659 writeb(0xf8, info->port->uart_base + BL_SICC_LSR); /* reset bits 0-4 of LSR */
662 * Finally, enable interrupts
668 retval = request_irq(info->port->irqrx, siccuart_int_rx, 0, "SICC rx", info);
670 if (capable(CAP_SYS_ADMIN)) {
672 set_bit(TTY_IO_ERROR, &info->tty->flags);
677 retval = request_irq(info->port->irqtx, siccuart_int_tx, 0, "SICC tx", info);
679 if (capable(CAP_SYS_ADMIN)) {
681 set_bit(TTY_IO_ERROR, &info->tty->flags);
684 free_irq(info->port->irqrx, info);
688 siccuart_enable_rx_interrupt(info);
690 info->flags |= ASYNC_INITIALIZED;
691 restore_flags(flags);
696 restore_flags(flags);
701 * This routine will shutdown a serial port; interrupts are disabled, and
702 * DTR is dropped if the hangup on close termio flag is on.
704 static void siccuart_shutdown(struct SICC_info *info)
708 if (!(info->flags & ASYNC_INITIALIZED))
711 save_flags(flags); cli(); /* Disable interrupts */
714 * clear delta_msr_wait queue to avoid mem leaks: we may free the irq
715 * here so the queue might never be woken up
717 wake_up_interruptible(&info->delta_msr_wait);
720 * disable all interrupts, disable the port
722 siccuart_disable_rx_interrupt(info);
723 siccuart_disable_tx_interrupt(info);
728 free_irq(info->port->irqtx, info);
729 free_irq(info->port->irqrx, info);
731 if (info->xmit.buf) {
732 unsigned long pg = (unsigned long) info->xmit.buf;
733 info->xmit.buf = NULL;
738 if (!info->tty || (info->tty->termios->c_cflag & HUPCL))
739 info->mctrl &= ~(TIOCM_DTR|TIOCM_RTS);
740 info->port->set_mctrl(info->port, info->mctrl);
742 /* kill off our tasklet */
743 tasklet_kill(&info->tlet);
745 set_bit(TTY_IO_ERROR, &info->tty->flags);
747 info->flags &= ~ASYNC_INITIALIZED;
749 restore_flags(flags);
753 static void siccuart_change_speed(struct SICC_info *info, struct termios *old_termios)
755 unsigned int lcr_h, baud, quot, cflag, old_rcr, old_tcr, bits;
758 if (!info->tty || !info->tty->termios)
761 cflag = info->tty->termios->c_cflag;
763 pr_debug("siccuart_set_cflag(0x%x) called\n", cflag);
764 /* byte size and parity */
765 switch (cflag & CSIZE) {
766 case CS7: lcr_h = _LCR_PE_DISABLE | _LCR_DB_7_BITS | _LCR_SB_1_BIT; bits = 9; break;
767 default: lcr_h = _LCR_PE_DISABLE | _LCR_DB_8_BITS | _LCR_SB_1_BIT; bits = 10; break; // CS8
769 if (cflag & CSTOPB) {
770 lcr_h |= _LCR_SB_2_BIT;
773 if (cflag & PARENB) {
774 lcr_h |= _LCR_PE_ENABLE;
776 if (!(cflag & PARODD))
777 lcr_h |= _LCR_PTY_ODD;
779 lcr_h |= _LCR_PTY_EVEN;
783 /* Determine divisor based on baud rate */
784 baud = tty_get_baud_rate(info->tty);
790 // here is ppc403SetBaud(com_port, baud);
791 unsigned long divisor, clockSource, temp;
793 /* Ensure CICCR[7] is 0 to select Internal Baud Clock */
794 powerpcMtcic_cr((unsigned long)(powerpcMfcic_cr() & 0xFEFFFFFF));
796 /* Determine Internal Baud Clock Frequency */
797 /* powerpcMfclkgpcr() reads DCR 0x120 - the*/
798 /* SCCR (Serial Clock Control Register) on Vesta */
799 temp = powerpcMfclkgpcr();
801 if(temp & 0x00000080) {
802 clockSource = 324000000;
805 clockSource = 216000000;
807 clockSource = clockSource/(unsigned long)((temp&0x00FC0000)>>18);
808 divisor = clockSource/(16*baud) - 1;
809 /* divisor has only 12 bits of resolution */
810 if(divisor>0x00000FFF){
818 ((info->flags & ASYNC_SPD_MASK) == ASYNC_SPD_CUST))
819 quot = info->state->custom_divisor;
821 if (!quot && old_termios) {
822 info->tty->termios->c_cflag &= ~CBAUD;
823 info->tty->termios->c_cflag |= (old_termios->c_cflag & CBAUD);
826 } while (quot == 0 && old_termios);
828 /* As a last resort, if the quotient is zero, default to 9600 bps */
830 quot = (info->port->uartclk / (16 * 9600)) - 1;
832 info->timeout = info->port->fifosize * HZ * bits / baud;
833 info->timeout += HZ/50; /* Add .02 seconds of slop */
836 info->flags |= ASYNC_CTS_FLOW;
838 info->flags &= ~ASYNC_CTS_FLOW;
840 info->flags &= ~ASYNC_CHECK_CD;
842 info->flags |= ASYNC_CHECK_CD;
845 * Set up parity check flag
847 #define RELEVENT_IFLAG(iflag) ((iflag) & (IGNBRK|BRKINT|IGNPAR|PARMRK|INPCK))
849 info->read_status_mask = _LSR_OE_MASK;
850 if (I_INPCK(info->tty))
851 info->read_status_mask |= _LSR_FE_MASK | _LSR_PE_MASK;
852 if (I_BRKINT(info->tty) || I_PARMRK(info->tty))
853 info->read_status_mask |= _LSR_LB_MASK;
856 * Characters to ignore
858 info->ignore_status_mask = 0;
859 if (I_IGNPAR(info->tty))
860 info->ignore_status_mask |= _LSR_FE_MASK | _LSR_PE_MASK;
861 if (I_IGNBRK(info->tty)) {
862 info->ignore_status_mask |= _LSR_LB_MASK;
864 * If we're ignoring parity and break indicators,
865 * ignore overruns to (for real raw support).
867 if (I_IGNPAR(info->tty))
868 info->ignore_status_mask |= _LSR_OE_MASK;
871 /* first, disable everything */
872 save_flags(flags); cli();
874 old_rcr = readb(info->port->uart_base + BL_SICC_RCR);
875 old_tcr = readb(info->port->uart_base + BL_SICC_TxCR);
878 writeb(0, info->port->uart_base + BL_SICC_RCR);
879 writeb(0, info->port->uart_base + BL_SICC_TxCR);
881 /*RLBtrace (&ppc403Chan0, 0x2000000c, 0, 0);*/
884 restore_flags(flags);
888 writeb((quot & 0x00000F00)>>8, info->port->uart_base + BL_SICC_BRDH );
889 writeb( quot & 0x00000FF, info->port->uart_base + BL_SICC_BRDL );
891 /* Set CTL2 reg to use external clock (ExtClk) and enable FIFOs. */
892 /* For now, do NOT use FIFOs since 403 UART did not have this */
893 /* capability and this driver was inherited from 403UART. */
894 writeb(_CTL2_EXTERN, info->port->uart_base + BL_SICC_CTL2);
896 writeb(lcr_h, info->port->uart_base + BL_SICC_LCR);
898 writeb(old_rcr, info->port->uart_base + BL_SICC_RCR); // restore rcr
899 writeb(old_tcr, info->port->uart_base + BL_SICC_TxCR); // restore txcr
904 static void siccuart_put_char(struct tty_struct *tty, u_char ch)
906 struct SICC_info *info = tty->driver_data;
909 if (!tty || !info->xmit.buf)
912 save_flags(flags); cli();
913 if (CIRC_SPACE(info->xmit.head, info->xmit.tail, SICC_XMIT_SIZE) != 0) {
914 info->xmit.buf[info->xmit.head] = ch;
915 info->xmit.head = (info->xmit.head + 1) & (SICC_XMIT_SIZE - 1);
917 restore_flags(flags);
920 static void siccuart_flush_chars(struct tty_struct *tty)
922 struct SICC_info *info = tty->driver_data;
925 if (info->xmit.head == info->xmit.tail
931 save_flags(flags); cli();
932 siccuart_enable_tx_interrupt(info);
933 restore_flags(flags);
936 static int siccuart_write(struct tty_struct *tty,
937 const u_char * buf, int count)
939 struct SICC_info *info = tty->driver_data;
943 if (!tty || !info->xmit.buf || !tmp_buf)
949 c = CIRC_SPACE_TO_END(info->xmit.head,
956 memcpy(info->xmit.buf + info->xmit.head, buf, c);
957 info->xmit.head = (info->xmit.head + c) &
958 (SICC_XMIT_SIZE - 1);
963 restore_flags(flags);
964 if (info->xmit.head != info->xmit.tail
967 siccuart_enable_tx_interrupt(info);
971 static int siccuart_write_room(struct tty_struct *tty)
973 struct SICC_info *info = tty->driver_data;
975 return CIRC_SPACE(info->xmit.head, info->xmit.tail, SICC_XMIT_SIZE);
978 static int siccuart_chars_in_buffer(struct tty_struct *tty)
980 struct SICC_info *info = tty->driver_data;
982 return CIRC_CNT(info->xmit.head, info->xmit.tail, SICC_XMIT_SIZE);
985 static void siccuart_flush_buffer(struct tty_struct *tty)
987 struct SICC_info *info = tty->driver_data;
990 pr_debug("siccuart_flush_buffer(%d) called\n", tty->index);
991 save_flags(flags); cli();
992 info->xmit.head = info->xmit.tail = 0;
993 restore_flags(flags);
994 wake_up_interruptible(&tty->write_wait);
995 if ((tty->flags & (1 << TTY_DO_WRITE_WAKEUP)) &&
996 tty->ldisc.write_wakeup)
997 (tty->ldisc.write_wakeup)(tty);
1001 * This function is used to send a high-priority XON/XOFF character to
1004 static void siccuart_send_xchar(struct tty_struct *tty, char ch)
1006 struct SICC_info *info = tty->driver_data;
1010 siccuart_enable_tx_interrupt(info);
1013 static void siccuart_throttle(struct tty_struct *tty)
1015 struct SICC_info *info = tty->driver_data;
1016 unsigned long flags;
1019 siccuart_send_xchar(tty, STOP_CHAR(tty));
1021 if (tty->termios->c_cflag & CRTSCTS) {
1022 save_flags(flags); cli();
1023 info->mctrl &= ~TIOCM_RTS;
1024 info->port->set_mctrl(info->port, info->mctrl);
1025 restore_flags(flags);
1029 static void siccuart_unthrottle(struct tty_struct *tty)
1031 struct SICC_info *info = (struct SICC_info *) tty->driver_data;
1032 unsigned long flags;
1038 siccuart_send_xchar(tty, START_CHAR(tty));
1041 if (tty->termios->c_cflag & CRTSCTS) {
1042 save_flags(flags); cli();
1043 info->mctrl |= TIOCM_RTS;
1044 info->port->set_mctrl(info->port, info->mctrl);
1045 restore_flags(flags);
1049 static int get_serial_info(struct SICC_info *info, struct serial_struct *retinfo)
1051 struct SICC_state *state = info->state;
1052 struct SICC_port *port = info->port;
1053 struct serial_struct tmp;
1055 memset(&tmp, 0, sizeof(tmp));
1057 tmp.line = state->line;
1058 tmp.port = port->uart_base;
1059 if (HIGH_BITS_OFFSET)
1060 tmp.port_high = port->uart_base >> HIGH_BITS_OFFSET;
1061 tmp.irq = port->irqrx;
1063 tmp.xmit_fifo_size = port->fifosize;
1064 tmp.baud_base = port->uartclk / 16;
1065 tmp.close_delay = state->close_delay;
1066 tmp.closing_wait = state->closing_wait;
1067 tmp.custom_divisor = state->custom_divisor;
1069 if (copy_to_user(retinfo, &tmp, sizeof(*retinfo)))
1074 static int set_serial_info(struct SICC_info *info,
1075 struct serial_struct *newinfo)
1077 struct serial_struct new_serial;
1078 struct SICC_state *state, old_state;
1079 struct SICC_port *port;
1080 unsigned long new_port;
1081 unsigned int i, change_irq, change_port;
1084 if (copy_from_user(&new_serial, newinfo, sizeof(new_serial)))
1087 state = info->state;
1091 new_port = new_serial.port;
1092 if (HIGH_BITS_OFFSET)
1093 new_port += (unsigned long) new_serial.port_high << HIGH_BITS_OFFSET;
1095 change_irq = new_serial.irq != port->irqrx;
1096 change_port = new_port != port->uart_base;
1098 if (!capable(CAP_SYS_ADMIN)) {
1099 if (change_irq || change_port ||
1100 (new_serial.baud_base != port->uartclk / 16) ||
1101 (new_serial.close_delay != state->close_delay) ||
1102 (new_serial.xmit_fifo_size != port->fifosize) ||
1103 ((new_serial.flags & ~ASYNC_USR_MASK) !=
1104 (state->flags & ~ASYNC_USR_MASK)))
1106 state->flags = ((state->flags & ~ASYNC_USR_MASK) |
1107 (new_serial.flags & ASYNC_USR_MASK));
1108 info->flags = ((info->flags & ~ASYNC_USR_MASK) |
1109 (new_serial.flags & ASYNC_USR_MASK));
1110 state->custom_divisor = new_serial.custom_divisor;
1111 goto check_and_exit;
1114 if ((new_serial.irq >= NR_IRQS) || (new_serial.irq < 0) ||
1115 (new_serial.baud_base < 9600))
1118 if (new_serial.type && change_port) {
1119 for (i = 0; i < SERIAL_SICC_NR; i++)
1120 if ((port != sicc_ports + i) &&
1121 sicc_ports[i].uart_base != new_port)
1125 if ((change_port || change_irq) && (state->count > 1))
1129 * OK, past this point, all the error checking has been done.
1130 * At this point, we start making changes.....
1132 port->uartclk = new_serial.baud_base * 16;
1133 state->flags = ((state->flags & ~ASYNC_FLAGS) |
1134 (new_serial.flags & ASYNC_FLAGS));
1135 info->flags = ((state->flags & ~ASYNC_INTERNAL_FLAGS) |
1136 (info->flags & ASYNC_INTERNAL_FLAGS));
1137 state->custom_divisor = new_serial.custom_divisor;
1138 state->close_delay = new_serial.close_delay * HZ / 100;
1139 state->closing_wait = new_serial.closing_wait * HZ / 100;
1140 info->tty->low_latency = (info->flags & ASYNC_LOW_LATENCY) ? 1 : 0;
1141 port->fifosize = new_serial.xmit_fifo_size;
1143 if (change_port || change_irq) {
1145 * We need to shutdown the serial port at the old
1146 * port/irq combination.
1148 siccuart_shutdown(info);
1149 port->irqrx = new_serial.irq;
1150 port->uart_base = new_port;
1154 if (!port->uart_base)
1156 if (info->flags & ASYNC_INITIALIZED) {
1157 if ((old_state.flags & ASYNC_SPD_MASK) !=
1158 (state->flags & ASYNC_SPD_MASK) ||
1159 (old_state.custom_divisor != state->custom_divisor)) {
1160 if ((state->flags & ASYNC_SPD_MASK) == ASYNC_SPD_HI)
1161 info->tty->alt_speed = 57600;
1162 if ((state->flags & ASYNC_SPD_MASK) == ASYNC_SPD_VHI)
1163 info->tty->alt_speed = 115200;
1164 if ((state->flags & ASYNC_SPD_MASK) == ASYNC_SPD_SHI)
1165 info->tty->alt_speed = 230400;
1166 if ((state->flags & ASYNC_SPD_MASK) == ASYNC_SPD_WARP)
1167 info->tty->alt_speed = 460800;
1168 siccuart_change_speed(info, NULL);
1171 retval = siccuart_startup(info);
1177 * get_lsr_info - get line status register info
1179 static int get_lsr_info(struct SICC_info *info, unsigned int *value)
1181 unsigned int result, status;
1182 unsigned long flags;
1184 save_flags(flags); cli();
1185 status = readb(info->port->uart_base + BL_SICC_LSR);
1186 restore_flags(flags);
1187 result = status & _LSR_TSR_EMPTY ? TIOCSER_TEMT : 0;
1190 * If we're about to load something into the transmit
1191 * register, we'll pretend the transmitter isn't empty to
1192 * avoid a race condition (depending on when the transmit
1193 * interrupt happens).
1196 ((CIRC_CNT(info->xmit.head, info->xmit.tail,
1197 SICC_XMIT_SIZE) > 0) &&
1198 !info->tty->stopped && !info->tty->hw_stopped))
1199 result &= TIOCSER_TEMT;
1201 return put_user(result, value);
1204 static int get_modem_info(struct SICC_info *info, unsigned int *value)
1206 unsigned int result = info->mctrl;
1208 return put_user(result, value);
1211 static int set_modem_info(struct SICC_info *info, unsigned int cmd,
1212 unsigned int *value)
1214 unsigned int arg, old;
1215 unsigned long flags;
1217 if (get_user(arg, value))
1227 info->mctrl &= ~arg;
1237 save_flags(flags); cli();
1238 if (old != info->mctrl)
1239 info->port->set_mctrl(info->port, info->mctrl);
1240 restore_flags(flags);
1244 static void siccuart_break_ctl(struct tty_struct *tty, int break_state)
1246 struct SICC_info *info = tty->driver_data;
1247 unsigned long flags;
1251 save_flags(flags); cli();
1252 lcr_h = readb(info->port + BL_SICC_LSR);
1253 if (break_state == -1)
1254 lcr_h |= _LSR_LB_MASK;
1256 lcr_h &= ~_LSR_LB_MASK;
1257 writeb(lcr_h, info->port + BL_SICC_LSRS);
1258 restore_flags(flags);
1261 static int siccuart_ioctl(struct tty_struct *tty, struct file *file,
1262 unsigned int cmd, unsigned long arg)
1264 struct SICC_info *info = tty->driver_data;
1265 struct SICC_icount cnow;
1266 struct serial_icounter_struct icount;
1267 unsigned long flags;
1269 if ((cmd != TIOCGSERIAL) && (cmd != TIOCSSERIAL) &&
1270 (cmd != TIOCSERCONFIG) && (cmd != TIOCSERGSTRUCT) &&
1271 (cmd != TIOCMIWAIT) && (cmd != TIOCGICOUNT)) {
1272 if (tty->flags & (1 << TTY_IO_ERROR))
1278 return get_modem_info(info, (unsigned int *)arg);
1282 return set_modem_info(info, cmd, (unsigned int *)arg);
1284 return get_serial_info(info,
1285 (struct serial_struct *)arg);
1287 return set_serial_info(info,
1288 (struct serial_struct *)arg);
1289 case TIOCSERGETLSR: /* Get line status register */
1290 return get_lsr_info(info, (unsigned int *)arg);
1292 * Wait for any of the 4 modem inputs (DCD,RI,DSR,CTS) to change
1293 * - mask passed in arg for lines of interest
1294 * (use |'ed TIOCM_RNG/DSR/CD/CTS for masking)
1295 * Caller should use TIOCGICOUNT to see which one it was
1300 * Get counter of input serial line interrupts (DCD,RI,DSR,CTS)
1301 * Return: write counters to the user passed counter struct
1302 * NB: both 1->0 and 0->1 transitions are counted except for
1303 * RI where only 0->1 is counted.
1306 save_flags(flags); cli();
1307 cnow = info->state->icount;
1308 restore_flags(flags);
1309 icount.cts = cnow.cts;
1310 icount.dsr = cnow.dsr;
1311 icount.rng = cnow.rng;
1312 icount.dcd = cnow.dcd;
1313 icount.rx = cnow.rx;
1314 icount.tx = cnow.tx;
1315 icount.frame = cnow.frame;
1316 icount.overrun = cnow.overrun;
1317 icount.parity = cnow.parity;
1318 icount.brk = cnow.brk;
1319 icount.buf_overrun = cnow.buf_overrun;
1321 return copy_to_user((void *)arg, &icount, sizeof(icount))
1325 return -ENOIOCTLCMD;
1330 static void siccuart_set_termios(struct tty_struct *tty, struct termios *old_termios)
1332 struct SICC_info *info = tty->driver_data;
1333 unsigned long flags;
1334 unsigned int cflag = tty->termios->c_cflag;
1336 if ((cflag ^ old_termios->c_cflag) == 0 &&
1337 RELEVENT_IFLAG(tty->termios->c_iflag ^ old_termios->c_iflag) == 0)
1340 siccuart_change_speed(info, old_termios);
1342 /* Handle transition to B0 status */
1343 if ((old_termios->c_cflag & CBAUD) &&
1345 save_flags(flags); cli();
1346 info->mctrl &= ~(TIOCM_RTS | TIOCM_DTR);
1347 info->port->set_mctrl(info->port, info->mctrl);
1348 restore_flags(flags);
1351 /* Handle transition away from B0 status */
1352 if (!(old_termios->c_cflag & CBAUD) &&
1354 save_flags(flags); cli();
1355 info->mctrl |= TIOCM_DTR;
1356 if (!(cflag & CRTSCTS) ||
1357 !test_bit(TTY_THROTTLED, &tty->flags))
1358 info->mctrl |= TIOCM_RTS;
1359 info->port->set_mctrl(info->port, info->mctrl);
1360 restore_flags(flags);
1363 /* Handle turning off CRTSCTS */
1364 if ((old_termios->c_cflag & CRTSCTS) &&
1365 !(cflag & CRTSCTS)) {
1366 tty->hw_stopped = 0;
1367 siccuart_start(tty);
1372 * No need to wake up processes in open wait, since they
1373 * sample the CLOCAL flag once, and don't recheck it.
1374 * XXX It's not clear whether the current behavior is correct
1375 * or not. Hence, this may change.....
1377 if (!(old_termios->c_cflag & CLOCAL) &&
1378 (tty->termios->c_cflag & CLOCAL))
1379 wake_up_interruptible(&info->open_wait);
1383 static void siccuart_close(struct tty_struct *tty, struct file *filp)
1385 struct SICC_info *info = tty->driver_data;
1386 struct SICC_state *state;
1387 unsigned long flags;
1392 state = info->state;
1394 //pr_debug("siccuart_close() called\n");
1396 save_flags(flags); cli();
1398 if (tty_hung_up_p(filp)) {
1399 restore_flags(flags);
1403 if ((tty->count == 1) && (state->count != 1)) {
1405 * Uh, oh. tty->count is 1, which means that the tty
1406 * structure will be freed. state->count should always
1407 * be one in these conditions. If it's greater than
1408 * one, we've got real problems, since it means the
1409 * serial port won't be shutdown.
1411 printk("siccuart_close: bad serial port count; tty->count is 1, state->count is %d\n", state->count);
1414 if (--state->count < 0) {
1415 printk("rs_close: bad serial port count for %s: %d\n", tty->name, state->count);
1419 restore_flags(flags);
1422 info->flags |= ASYNC_CLOSING;
1423 restore_flags(flags);
1425 * Now we wait for the transmit buffer to clear; and we notify
1426 * the line discipline to only process XON/XOFF characters.
1429 if (info->state->closing_wait != ASYNC_CLOSING_WAIT_NONE)
1430 tty_wait_until_sent(tty, info->state->closing_wait);
1432 * At this point, we stop accepting input. To do this, we
1433 * disable the receive line status interrupts.
1435 if (info->flags & ASYNC_INITIALIZED) {
1436 siccuart_disable_rx_interrupt(info);
1438 * Before we drop DTR, make sure the UART transmitter
1439 * has completely drained; this is especially
1440 * important if there is a transmit FIFO!
1442 siccuart_wait_until_sent(tty, info->timeout);
1444 siccuart_shutdown(info);
1445 if (tty->driver->flush_buffer)
1446 tty->driver->flush_buffer(tty);
1447 if (tty->ldisc.flush_buffer)
1448 tty->ldisc.flush_buffer(tty);
1452 if (info->blocked_open) {
1453 if (info->state->close_delay) {
1454 set_current_state(TASK_INTERRUPTIBLE);
1455 schedule_timeout(info->state->close_delay);
1457 wake_up_interruptible(&info->open_wait);
1459 info->flags &= ~(ASYNC_NORMAL_ACTIVE|ASYNC_CLOSING);
1460 wake_up_interruptible(&info->close_wait);
1463 static void siccuart_wait_until_sent(struct tty_struct *tty, int timeout)
1465 struct SICC_info *info = (struct SICC_info *) tty->driver_data;
1466 unsigned long char_time, expire;
1468 if (info->port->fifosize == 0)
1472 * Set the check interval to be 1/5 of the estimated time to
1473 * send a single character, and make it at least 1. The check
1474 * interval should also be less than the timeout.
1476 * Note: we have to use pretty tight timings here to satisfy
1479 char_time = (info->timeout - HZ/50) / info->port->fifosize;
1480 char_time = char_time / 5;
1484 // Crazy!! sometimes the input arg 'timeout' can be negtive numbers :-(
1485 if (timeout >= 0 && timeout < char_time)
1486 char_time = timeout;
1488 * If the transmitter hasn't cleared in twice the approximate
1489 * amount of time to send the entire FIFO, it probably won't
1490 * ever clear. This assumes the UART isn't doing flow
1491 * control, which is currently the case. Hence, if it ever
1492 * takes longer than info->timeout, this is probably due to a
1493 * UART bug of some kind. So, we clamp the timeout parameter at
1496 if (!timeout || timeout > 2 * info->timeout)
1497 timeout = 2 * info->timeout;
1499 expire = jiffies + timeout;
1500 pr_debug("siccuart_wait_until_sent(%d), jiff=%lu, expire=%lu char_time=%lu...\n",
1501 tty->index, jiffies,
1503 while ((readb(info->port->uart_base + BL_SICC_LSR) & _LSR_TX_ALL) != _LSR_TX_ALL) {
1504 set_current_state(TASK_INTERRUPTIBLE);
1505 schedule_timeout(char_time);
1506 if (signal_pending(current))
1508 if (timeout && time_after(jiffies, expire))
1511 set_current_state(TASK_RUNNING);
1514 static void siccuart_hangup(struct tty_struct *tty)
1516 struct SICC_info *info = tty->driver_data;
1517 struct SICC_state *state = info->state;
1519 siccuart_flush_buffer(tty);
1520 if (info->flags & ASYNC_CLOSING)
1522 siccuart_shutdown(info);
1525 info->flags &= ~ASYNC_NORMAL_ACTIVE;
1527 wake_up_interruptible(&info->open_wait);
1530 static int block_til_ready(struct tty_struct *tty, struct file *filp,
1531 struct SICC_info *info)
1533 DECLARE_WAITQUEUE(wait, current);
1534 struct SICC_state *state = info->state;
1535 unsigned long flags;
1536 int do_clocal = 0, extra_count = 0, retval;
1539 * If the device is in the middle of being closed, then block
1540 * until it's done, and then try again.
1542 if (tty_hung_up_p(filp) ||
1543 (info->flags & ASYNC_CLOSING)) {
1544 if (info->flags & ASYNC_CLOSING)
1545 interruptible_sleep_on(&info->close_wait);
1546 return (info->flags & ASYNC_HUP_NOTIFY) ?
1547 -EAGAIN : -ERESTARTSYS;
1551 * If non-blocking mode is set, or the port is not enabled,
1552 * then make the check up front and then exit.
1554 if ((filp->f_flags & O_NONBLOCK) ||
1555 (tty->flags & (1 << TTY_IO_ERROR))) {
1556 info->flags |= ASYNC_NORMAL_ACTIVE;
1560 if (tty->termios->c_cflag & CLOCAL)
1564 * Block waiting for the carrier detect and the line to become
1565 * free (i.e., not in use by the callout). While we are in
1566 * this loop, state->count is dropped by one, so that
1567 * rs_close() knows when to free things. We restore it upon
1568 * exit, either normal or abnormal.
1571 add_wait_queue(&info->open_wait, &wait);
1572 save_flags(flags); cli();
1573 if (!tty_hung_up_p(filp)) {
1577 restore_flags(flags);
1578 info->blocked_open++;
1580 save_flags(flags); cli();
1581 if (tty->termios->c_cflag & CBAUD) {
1582 info->mctrl = TIOCM_DTR | TIOCM_RTS;
1583 info->port->set_mctrl(info->port, info->mctrl);
1585 restore_flags(flags);
1586 set_current_state(TASK_INTERRUPTIBLE);
1587 if (tty_hung_up_p(filp) ||
1588 !(info->flags & ASYNC_INITIALIZED)) {
1589 if (info->flags & ASYNC_HUP_NOTIFY)
1592 retval = -ERESTARTSYS;
1595 if (!(info->flags & ASYNC_CLOSING) &&
1596 (do_clocal /*|| (UART_GET_FR(info->port) & SICC_UARTFR_DCD)*/))
1598 if (signal_pending(current)) {
1599 retval = -ERESTARTSYS;
1604 set_current_state(TASK_RUNNING);
1605 remove_wait_queue(&info->open_wait, &wait);
1608 info->blocked_open--;
1611 info->flags |= ASYNC_NORMAL_ACTIVE;
1615 static struct SICC_info *siccuart_get(int line)
1617 struct SICC_info *info;
1618 struct SICC_state *state = sicc_state + line;
1623 info = kmalloc(sizeof(struct SICC_info), GFP_KERNEL);
1625 memset(info, 0, sizeof(struct SICC_info));
1626 init_waitqueue_head(&info->open_wait);
1627 init_waitqueue_head(&info->close_wait);
1628 init_waitqueue_head(&info->delta_msr_wait);
1629 info->flags = state->flags;
1630 info->state = state;
1631 info->port = sicc_ports + line;
1632 tasklet_init(&info->tlet, siccuart_tasklet_action,
1633 (unsigned long)info);
1643 static int siccuart_open(struct tty_struct *tty, struct file *filp)
1645 struct SICC_info *info;
1646 int retval, line = tty->index;
1649 // is this a line that we've got?
1650 if (line >= SERIAL_SICC_NR) {
1654 info = siccuart_get(line);
1658 tty->driver_data = info;
1660 info->tty->low_latency = (info->flags & ASYNC_LOW_LATENCY) ? 1 : 0;
1663 * Make sure we have the temporary buffer allocated
1666 unsigned long page = get_zeroed_page(GFP_KERNEL);
1672 tmp_buf = (u_char *)page;
1676 * If the port is in the middle of closing, bail out now.
1678 if (tty_hung_up_p(filp) ||
1679 (info->flags & ASYNC_CLOSING)) {
1680 if (info->flags & ASYNC_CLOSING)
1681 interruptible_sleep_on(&info->close_wait);
1686 * Start up the serial port
1688 retval = siccuart_startup(info);
1693 retval = block_til_ready(tty, filp, info);
1698 #ifdef CONFIG_SERIAL_SICC_CONSOLE
1699 if (siccuart_cons.cflag && siccuart_cons.index == line) {
1700 tty->termios->c_cflag = siccuart_cons.cflag;
1701 siccuart_cons.cflag = 0;
1702 siccuart_change_speed(info, NULL);
1708 static struct tty_operations sicc_ops = {
1709 .open = siccuart_open,
1710 .close = siccuart_close,
1711 .write = siccuart_write,
1712 .put_char = siccuart_put_char,
1713 .flush_chars = siccuart_flush_chars,
1714 .write_room = siccuart_write_room,
1715 .chars_in_buffer = siccuart_chars_in_buffer,
1716 .flush_buffer = siccuart_flush_buffer,
1717 .ioctl = siccuart_ioctl,
1718 .throttle = siccuart_throttle,
1719 .unthrottle = siccuart_unthrottle,
1720 .send_xchar = siccuart_send_xchar,
1721 .set_termios = siccuart_set_termios,
1722 .stop = siccuart_stop,
1723 .start = siccuart_start,
1724 .hangup = siccuart_hangup,
1725 .break_ctl = siccuart_break_ctl,
1726 .wait_until_sent = siccuart_wait_until_sent,
1729 int __init siccuart_init(void)
1732 siccnormal_driver = alloc_tty_driver(SERIAL_SICC_NR);
1733 if (!siccnormal_driver)
1735 printk("IBM Vesta SICC serial port driver V 0.1 by Yudong Yang and Yi Ge / IBM CRL .\n");
1736 siccnormal_driver->driver_name = "serial_sicc";
1737 siccnormal_driver->owner = THIS_MODULE;
1738 siccnormal_driver->name = SERIAL_SICC_NAME;
1739 siccnormal_driver->major = SERIAL_SICC_MAJOR;
1740 siccnormal_driver->minor_start = SERIAL_SICC_MINOR;
1741 siccnormal_driver->type = TTY_DRIVER_TYPE_SERIAL;
1742 siccnormal_driver->subtype = SERIAL_TYPE_NORMAL;
1743 siccnormal_driver->init_termios = tty_std_termios;
1744 siccnormal_driver->init_termios.c_cflag = B9600 | CS8 | CREAD | HUPCL | CLOCAL;
1745 siccnormal_driver->flags = TTY_DRIVER_REAL_RAW | TTY_DRIVER_NO_DEVFS;
1746 tty_set_operations(siccnormal_driver, &sicc_ops);
1748 if (tty_register_driver(siccnormal_driver))
1749 panic("Couldn't register SICC serial driver\n");
1751 for (i = 0; i < SERIAL_SICC_NR; i++) {
1752 struct SICC_state *state = sicc_state + i;
1754 state->close_delay = 5 * HZ / 10;
1755 state->closing_wait = 30 * HZ;
1762 __initcall(siccuart_init);
1764 #ifdef CONFIG_SERIAL_SICC_CONSOLE
1765 /************** console driver *****************/
1768 * This code is currently never used; console->read is never called.
1769 * Therefore, although we have an implementation, we don't use it.
1770 * FIXME: the "const char *s" should be fixed to "char *s" some day.
1771 * (when the definition in include/linux/console.h is also fixed)
1773 #ifdef used_and_not_const_char_pointer
1774 static int siccuart_console_read(struct console *co, const char *s, u_int count)
1776 struct SICC_port *port = &sicc_ports[co->index];
1777 unsigned int status;
1781 pr_debug("siccuart_console_read() called\n");
1786 if(readb(port->uart_base + BL_SICC_LSR) & _LSR_RBR_FULL) {
1787 *w++ = readb(port->uart_base + BL_SICC_RBR);
1790 // nothing more to get, return
1800 * Print a string to the serial port trying not to disturb
1801 * any possible real use of the port...
1803 * The console_lock must be held when we get here.
1805 static void siccuart_console_write(struct console *co, const char *s, u_int count)
1807 struct SICC_port *port = &sicc_ports[co->index];
1808 unsigned int old_cr;
1812 * First save the CR then disable the interrupts
1814 old_cr = readb(port->uart_base + BL_SICC_TxCR);
1815 writeb(old_cr & ~_TxCR_DME_MASK, port->uart_base + BL_SICC_TxCR);
1818 * Now, do each character
1820 for (i = 0; i < count; i++) {
1821 while ((readb(port->uart_base + BL_SICC_LSR)&_LSR_TX_ALL) != _LSR_TX_ALL);
1822 writeb(s[i], port->uart_base + BL_SICC_TBR);
1824 while ((readb(port->uart_base + BL_SICC_LSR)&_LSR_TX_ALL) != _LSR_TX_ALL);
1825 writeb('\r', port->uart_base + BL_SICC_TBR);
1830 * Finally, wait for transmitter to become empty
1831 * and restore the TCR
1833 while ((readb(port->uart_base + BL_SICC_LSR)&_LSR_TX_ALL) != _LSR_TX_ALL);
1834 writeb(old_cr, port->uart_base + BL_SICC_TxCR);
1838 * Receive character from the serial port
1840 static int siccuart_console_wait_key(struct console *co)
1842 struct SICC_port *port = &sicc_ports[co->index];
1845 while(!(readb(port->uart_base + BL_SICC_LSR) & _LSR_RBR_FULL));
1846 c = readb(port->uart_base + BL_SICC_RBR);
1850 static struct tty_driver *siccuart_console_device(struct console *c, int *index)
1853 return siccnormal_driver;
1856 static int __init siccuart_console_setup(struct console *co, char *options)
1858 struct SICC_port *port;
1862 u_int cflag = CREAD | HUPCL | CLOCAL;
1866 if (co->index >= SERIAL_SICC_NR)
1869 port = &sicc_ports[co->index];
1871 if (port->uart_base == 0)
1872 port->uart_base = (int)ioremap(port->uart_base_phys, PAGE_SIZE);
1876 baud = simple_strtoul(s, NULL, 10);
1877 while (*s >= '0' && *s <= '9')
1879 if (*s) parity = *s++;
1880 if (*s) bits = *s - '0';
1884 * Now construct a cflag setting.
1887 case 1200: cflag |= B1200; break;
1888 case 2400: cflag |= B2400; break;
1889 case 4800: cflag |= B4800; break;
1890 default: cflag |= B9600; baud = 9600; break;
1891 case 19200: cflag |= B19200; break;
1892 case 38400: cflag |= B38400; break;
1893 case 57600: cflag |= B57600; break;
1894 case 115200: cflag |= B115200; break;
1897 case 7: cflag |= CS7; lcr_h = _LCR_PE_DISABLE | _LCR_DB_7_BITS | _LCR_SB_1_BIT; break;
1898 default: cflag |= CS8; lcr_h = _LCR_PE_DISABLE | _LCR_DB_8_BITS | _LCR_SB_1_BIT; break;
1902 case 'O': cflag |= PARODD; lcr_h |= _LCR_PTY_ODD; break;
1904 case 'E': cflag |= PARENB; lcr_h |= _LCR_PE_ENABLE | _LCR_PTY_ODD; break;
1911 // a copy of is inserted here ppc403SetBaud(com_port, (int)9600);
1912 unsigned long divisor, clockSource, temp;
1913 unsigned int rate = baud;
1915 /* Ensure CICCR[7] is 0 to select Internal Baud Clock */
1916 powerpcMtcic_cr((unsigned long)(powerpcMfcic_cr() & 0xFEFFFFFF));
1918 /* Determine Internal Baud Clock Frequency */
1919 /* powerpcMfclkgpcr() reads DCR 0x120 - the*/
1920 /* SCCR (Serial Clock Control Register) on Vesta */
1921 temp = powerpcMfclkgpcr();
1923 if(temp & 0x00000080) {
1924 clockSource = 324000000;
1927 clockSource = 216000000;
1929 clockSource = clockSource/(unsigned long)((temp&0x00FC0000)>>18);
1930 divisor = clockSource/(16*rate) - 1;
1931 /* divisor has only 12 bits of resolution */
1932 if(divisor>0x00000FFF){
1939 writeb((quot & 0x00000F00)>>8, port->uart_base + BL_SICC_BRDH );
1940 writeb( quot & 0x00000FF, port->uart_base + BL_SICC_BRDL );
1942 /* Set CTL2 reg to use external clock (ExtClk) and enable FIFOs. */
1943 /* For now, do NOT use FIFOs since 403 UART did not have this */
1944 /* capability and this driver was inherited from 403UART. */
1945 writeb(_CTL2_EXTERN, port->uart_base + BL_SICC_CTL2);
1947 writeb(lcr_h, port->uart_base + BL_SICC_LCR);
1948 writeb(_RCR_ER_ENABLE | _RCR_PME_HARD, port->uart_base + BL_SICC_RCR);
1949 writeb( _TxCR_ET_ENABLE , port->uart_base + BL_SICC_TxCR);
1951 // writeb(, info->port->uart_base + BL_SICC_RCR );
1953 * Transmitter Command Register: Transmitter enabled & DMA + TBR interrupt
1954 * + Transmitter Empty interrupt + Transmitter error interrupt disabled &
1955 * Stop mode when CTS active enabled & Transmit Break + Pattern Generation
1959 writeb( 0x00, port->uart_base + BL_SICC_IrCR ); // disable IrDA
1961 readb(port->uart_base + BL_SICC_RBR);
1963 writeb(0xf8, port->uart_base + BL_SICC_LSR); /* reset bits 0-4 of LSR */
1965 /* we will enable the port as we need it */
1970 static struct console siccuart_cons =
1972 .name = SERIAL_SICC_NAME,
1973 .write = siccuart_console_write,
1974 #ifdef used_and_not_const_char_pointer
1975 .read = siccuart_console_read,
1977 .device = siccuart_console_device,
1978 .wait_key = siccuart_console_wait_key,
1979 .setup = siccuart_console_setup,
1980 .flags = CON_PRINTBUFFER,
1984 void __init sicc_console_init(void)
1986 register_console(&siccuart_cons);
1989 #endif /* CONFIG_SERIAL_SICC_CONSOLE */