2 * arch/ppc/kernel/traps.c
4 * Copyright (C) 1995-1996 Gary Thomas (gdt@linuxppc.org)
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * as published by the Free Software Foundation; either version
9 * 2 of the License, or (at your option) any later version.
11 * Modified by Cort Dougan (cort@cs.nmt.edu)
12 * and Paul Mackerras (paulus@cs.anu.edu.au)
16 * This file handles the architecture-dependent parts of hardware exceptions
19 #include <linux/errno.h>
20 #include <linux/sched.h>
21 #include <linux/kernel.h>
23 #include <linux/stddef.h>
24 #include <linux/unistd.h>
25 #include <linux/ptrace.h>
26 #include <linux/slab.h>
27 #include <linux/user.h>
28 #include <linux/a.out.h>
29 #include <linux/interrupt.h>
30 #include <linux/config.h>
31 #include <linux/init.h>
32 #include <linux/module.h>
33 #include <linux/prctl.h>
35 #include <asm/pgtable.h>
36 #include <asm/uaccess.h>
37 #include <asm/system.h>
41 #ifdef CONFIG_PMAC_BACKLIGHT
42 #include <asm/backlight.h>
46 void (*debugger)(struct pt_regs *regs) = xmon;
47 int (*debugger_bpt)(struct pt_regs *regs) = xmon_bpt;
48 int (*debugger_sstep)(struct pt_regs *regs) = xmon_sstep;
49 int (*debugger_iabr_match)(struct pt_regs *regs) = xmon_iabr_match;
50 int (*debugger_dabr_match)(struct pt_regs *regs) = xmon_dabr_match;
51 void (*debugger_fault_handler)(struct pt_regs *regs);
54 void (*debugger)(struct pt_regs *regs);
55 int (*debugger_bpt)(struct pt_regs *regs);
56 int (*debugger_sstep)(struct pt_regs *regs);
57 int (*debugger_iabr_match)(struct pt_regs *regs);
58 int (*debugger_dabr_match)(struct pt_regs *regs);
59 void (*debugger_fault_handler)(struct pt_regs *regs);
61 #define debugger(regs) do { } while (0)
62 #define debugger_bpt(regs) 0
63 #define debugger_sstep(regs) 0
64 #define debugger_iabr_match(regs) 0
65 #define debugger_dabr_match(regs) 0
66 #define debugger_fault_handler ((void (*)(struct pt_regs *))0)
71 * Trap & Exception support
75 spinlock_t die_lock = SPIN_LOCK_UNLOCKED;
77 void die(const char * str, struct pt_regs * fp, long err)
79 static int die_counter;
82 spin_lock_irq(&die_lock);
83 #ifdef CONFIG_PMAC_BACKLIGHT
84 set_backlight_enable(1);
85 set_backlight_level(BACKLIGHT_MAX);
87 printk("Oops: %s, sig: %ld [#%d]\n", str, err, ++die_counter);
93 printk("SMP NR_CPUS=%d ", NR_CPUS);
99 spin_unlock_irq(&die_lock);
100 /* do_exit() should take care of panic'ing from an interrupt
101 * context so we don't handle it here
106 void _exception(int signr, struct pt_regs *regs, int code, unsigned long addr)
110 if (!user_mode(regs)) {
112 die("Exception in kernel mode", regs, signr);
114 info.si_signo = signr;
117 info.si_addr = (void *) addr;
118 force_sig_info(signr, &info, current);
122 * I/O accesses can cause machine checks on powermacs.
123 * Check if the NIP corresponds to the address of a sync
124 * instruction for which there is an entry in the exception
126 * Note that the 601 only takes a machine check on TEA
127 * (transfer error ack) signal assertion, and does not
128 * set any of the top 16 bits of SRR1.
131 static inline int check_io_access(struct pt_regs *regs)
133 #ifdef CONFIG_PPC_PMAC
134 unsigned long msr = regs->msr;
135 const struct exception_table_entry *entry;
136 unsigned int *nip = (unsigned int *)regs->nip;
138 if (((msr & 0xffff0000) == 0 || (msr & (0x80000 | 0x40000)))
139 && (entry = search_exception_tables(regs->nip)) != NULL) {
141 * Check that it's a sync instruction, or somewhere
142 * in the twi; isync; nop sequence that inb/inw/inl uses.
143 * As the address is in the exception table
144 * we should be able to read the instr there.
145 * For the debug message, we look at the preceding
148 if (*nip == 0x60000000) /* nop */
150 else if (*nip == 0x4c00012c) /* isync */
152 if (*nip == 0x7c0004ac || (*nip >> 26) == 3) {
157 rb = (*nip >> 11) & 0x1f;
158 printk(KERN_DEBUG "%s bad port %lx at %p\n",
159 (*nip & 0x100)? "OUT to": "IN from",
160 regs->gpr[rb] - _IO_BASE, nip);
162 regs->nip = entry->fixup;
166 #endif /* CONFIG_PPC_PMAC */
170 #if defined(CONFIG_4xx) || defined(CONFIG_BOOKE)
171 /* On 4xx, the reason for the machine check or program exception
173 #define get_reason(regs) ((regs)->dsisr)
175 #define get_mc_reason(regs) ((regs)->dsisr)
177 #define get_mc_reason(regs) (mfspr(SPRN_MCSR))
180 #define REASON_ILLEGAL ESR_PIL
181 #define REASON_PRIVILEGED ESR_PPR
182 #define REASON_TRAP ESR_PTR
184 /* single-step stuff */
185 #define single_stepping(regs) (current->thread.dbcr0 & DBCR0_IC)
186 #define clear_single_step(regs) (current->thread.dbcr0 &= ~DBCR0_IC)
189 /* On non-4xx, the reason for the machine check or program
190 exception is in the MSR. */
191 #define get_reason(regs) ((regs)->msr)
192 #define get_mc_reason(regs) ((regs)->msr)
193 #define REASON_FP 0x100000
194 #define REASON_ILLEGAL 0x80000
195 #define REASON_PRIVILEGED 0x40000
196 #define REASON_TRAP 0x20000
198 #define single_stepping(regs) ((regs)->msr & MSR_SE)
199 #define clear_single_step(regs) ((regs)->msr &= ~MSR_SE)
202 void MachineCheckException(struct pt_regs *regs)
204 unsigned long reason = get_mc_reason(regs);
206 if (user_mode(regs)) {
208 _exception(SIGBUS, regs, BUS_ADRERR, regs->nip);
212 #if defined(CONFIG_8xx) && defined(CONFIG_PCI)
213 /* the qspan pci read routines can cause machine checks -- Cort */
214 bad_page_fault(regs, regs->dar, SIGBUS);
218 if (debugger_fault_handler) {
219 debugger_fault_handler(regs);
224 if (check_io_access(regs))
227 #if defined(CONFIG_4xx) && !defined(CONFIG_440A)
228 if (reason & ESR_IMCP) {
229 printk("Instruction");
230 mtspr(SPRN_ESR, reason & ~ESR_IMCP);
233 printk(" machine check in kernel mode.\n");
234 #elif defined(CONFIG_440A)
235 printk("Machine check in kernel mode.\n");
236 if (reason & ESR_IMCP){
237 printk("Instruction Synchronous Machine Check exception\n");
238 mtspr(SPRN_ESR, reason & ~ESR_IMCP);
241 u32 mcsr = mfspr(SPRN_MCSR);
243 printk("Instruction Read PLB Error\n");
245 printk("Data Read PLB Error\n");
247 printk("Data Write PLB Error\n");
248 if (mcsr & MCSR_TLBP)
249 printk("TLB Parity Error\n");
250 if (mcsr & MCSR_ICP){
251 flush_instruction_cache();
252 printk("I-Cache Parity Error\n");
254 if (mcsr & MCSR_DCSP)
255 printk("D-Cache Search Parity Error\n");
256 if (mcsr & MCSR_DCFP)
257 printk("D-Cache Flush Parity Error\n");
258 if (mcsr & MCSR_IMPE)
259 printk("Machine Check exception is imprecise\n");
262 mtspr(SPRN_MCSR, mcsr);
264 #elif defined (CONFIG_E500)
265 printk("Machine check in kernel mode.\n");
266 printk("Caused by (from MCSR=%lx): ", reason);
268 if (reason & MCSR_MCP)
269 printk("Machine Check Signal\n");
270 if (reason & MCSR_ICPERR)
271 printk("Instruction Cache Parity Error\n");
272 if (reason & MCSR_DCP_PERR)
273 printk("Data Cache Push Parity Error\n");
274 if (reason & MCSR_DCPERR)
275 printk("Data Cache Parity Error\n");
276 if (reason & MCSR_GL_CI)
277 printk("Guarded Load or Cache-Inhibited stwcx.\n");
278 if (reason & MCSR_BUS_IAERR)
279 printk("Bus - Instruction Address Error\n");
280 if (reason & MCSR_BUS_RAERR)
281 printk("Bus - Read Address Error\n");
282 if (reason & MCSR_BUS_WAERR)
283 printk("Bus - Write Address Error\n");
284 if (reason & MCSR_BUS_IBERR)
285 printk("Bus - Instruction Data Error\n");
286 if (reason & MCSR_BUS_RBERR)
287 printk("Bus - Read Data Bus Error\n");
288 if (reason & MCSR_BUS_WBERR)
289 printk("Bus - Read Data Bus Error\n");
290 if (reason & MCSR_BUS_IPERR)
291 printk("Bus - Instruction Parity Error\n");
292 if (reason & MCSR_BUS_RPERR)
293 printk("Bus - Read Parity Error\n");
294 #else /* !CONFIG_4xx && !CONFIG_E500 */
295 printk("Machine check in kernel mode.\n");
296 printk("Caused by (from SRR1=%lx): ", reason);
297 switch (reason & 0x601F0000) {
299 printk("Machine check signal\n");
301 case 0: /* for 601 */
303 case 0x140000: /* 7450 MSS error and TEA */
304 printk("Transfer error ack signal\n");
307 printk("Data parity error signal\n");
310 printk("Address parity error signal\n");
313 printk("L1 Data Cache error\n");
316 printk("L1 Instruction Cache error\n");
319 printk("L2 data cache parity error\n");
322 printk("Unknown values in msr\n");
324 #endif /* CONFIG_4xx */
327 die("machine check", regs, SIGBUS);
330 void SMIException(struct pt_regs *regs)
333 #if !(defined(CONFIG_XMON) || defined(CONFIG_KGDB))
335 panic("System Management Interrupt");
339 void UnknownException(struct pt_regs *regs)
341 printk("Bad trap at PC: %lx, MSR: %lx, vector=%lx %s\n",
342 regs->nip, regs->msr, regs->trap, print_tainted());
343 _exception(SIGTRAP, regs, 0, 0);
346 void InstructionBreakpoint(struct pt_regs *regs)
348 if (debugger_iabr_match(regs))
350 _exception(SIGTRAP, regs, TRAP_BRKPT, 0);
353 void RunModeException(struct pt_regs *regs)
355 _exception(SIGTRAP, regs, 0, 0);
358 /* Illegal instruction emulation support. Originally written to
359 * provide the PVR to user applications using the mfspr rd, PVR.
360 * Return non-zero if we can't emulate, or EFAULT if the associated
361 * memory access caused an access fault. Return zero on success.
363 * There are a couple of ways to do this, either "decode" the instruction
364 * or directly match lots of bits. In this case, matching lots of
365 * bits is faster and easier.
368 #define INST_MFSPR_PVR 0x7c1f42a6
369 #define INST_MFSPR_PVR_MASK 0xfc1fffff
371 static int emulate_instruction(struct pt_regs *regs)
379 if (!user_mode(regs))
381 CHECK_FULL_REGS(regs);
383 if (get_user(instword, (u32 __user *)(regs->nip)))
386 /* Emulate the mfspr rD, PVR.
388 if ((instword & INST_MFSPR_PVR_MASK) == INST_MFSPR_PVR) {
389 rd = (instword >> 21) & 0x1f;
390 regs->gpr[rd] = mfspr(PVR);
398 * After we have successfully emulated an instruction, we have to
399 * check if the instruction was being single-stepped, and if so,
400 * pretend we got a single-step exception. This was pointed out
401 * by Kumar Gala. -- paulus
403 static void emulate_single_step(struct pt_regs *regs)
405 if (single_stepping(regs)) {
406 clear_single_step(regs);
407 _exception(SIGTRAP, regs, TRAP_TRACE, 0);
412 * Look through the list of trap instructions that are used for BUG(),
413 * BUG_ON() and WARN_ON() and see if we hit one. At this point we know
414 * that the exception was caused by a trap instruction of some kind.
415 * Returns 1 if we should continue (i.e. it was a WARN_ON) or 0
418 extern struct bug_entry __start___bug_table[], __stop___bug_table[];
420 #ifndef CONFIG_MODULES
421 #define module_find_bug(x) NULL
424 static struct bug_entry *find_bug(unsigned long bugaddr)
426 struct bug_entry *bug;
428 for (bug = __start___bug_table; bug < __stop___bug_table; ++bug)
429 if (bugaddr == bug->bug_addr)
431 return module_find_bug(bugaddr);
434 int check_bug_trap(struct pt_regs *regs)
436 struct bug_entry *bug;
439 if (regs->msr & MSR_PR)
440 return 0; /* not in kernel */
441 addr = regs->nip; /* address of trap instruction */
442 if (addr < PAGE_OFFSET)
444 bug = find_bug(regs->nip);
447 if (bug->line & BUG_WARNING_TRAP) {
448 /* this is a WARN_ON rather than BUG/BUG_ON */
450 xmon_printf(KERN_ERR "Badness in %s at %s:%d\n",
451 bug->function, bug->file,
452 bug->line & ~BUG_WARNING_TRAP);
453 #endif /* CONFIG_XMON */
454 printk(KERN_ERR "Badness in %s at %s:%d\n",
455 bug->function, bug->file,
456 bug->line & ~BUG_WARNING_TRAP);
461 xmon_printf(KERN_CRIT "kernel BUG in %s at %s:%d!\n",
462 bug->function, bug->file, bug->line);
464 #endif /* CONFIG_XMON */
465 printk(KERN_CRIT "kernel BUG in %s at %s:%d!\n",
466 bug->function, bug->file, bug->line);
471 void ProgramCheckException(struct pt_regs *regs)
473 unsigned int reason = get_reason(regs);
474 extern int do_mathemu(struct pt_regs *regs);
476 #ifdef CONFIG_MATH_EMULATION
477 /* (reason & REASON_ILLEGAL) would be the obvious thing here,
478 * but there seems to be a hardware bug on the 405GP (RevD)
479 * that means ESR is sometimes set incorrectly - either to
480 * ESR_DST (!?) or 0. In the process of chasing this with the
481 * hardware people - not sure if it can happen on any illegal
482 * instruction or only on FP instructions, whether there is a
483 * pattern to occurences etc. -dgibson 31/Mar/2003 */
484 if (!(reason & REASON_TRAP) && do_mathemu(regs) == 0) {
485 emulate_single_step(regs);
488 #endif /* CONFIG_MATH_EMULATION */
490 if (reason & REASON_FP) {
491 /* IEEE FP exception */
495 /* We must make sure the FP state is consistent with
499 if (regs->msr & MSR_FP)
503 fpscr = current->thread.fpscr;
504 fpscr &= fpscr << 22; /* mask summary bits with enables */
505 if (fpscr & FPSCR_VX)
507 else if (fpscr & FPSCR_OX)
509 else if (fpscr & FPSCR_UX)
511 else if (fpscr & FPSCR_ZX)
513 else if (fpscr & FPSCR_XX)
515 _exception(SIGFPE, regs, code, regs->nip);
519 if (reason & REASON_TRAP) {
521 if (debugger_bpt(regs))
523 if (check_bug_trap(regs)) {
527 _exception(SIGTRAP, regs, TRAP_BRKPT, 0);
531 if (reason & REASON_PRIVILEGED) {
532 /* Try to emulate it if we should. */
533 if (emulate_instruction(regs) == 0) {
534 emulate_single_step(regs);
537 _exception(SIGILL, regs, ILL_PRVOPC, regs->nip);
541 _exception(SIGILL, regs, ILL_ILLOPC, regs->nip);
544 void SingleStepException(struct pt_regs *regs)
546 regs->msr &= ~MSR_SE; /* Turn off 'trace' bit */
547 if (debugger_sstep(regs))
549 _exception(SIGTRAP, regs, TRAP_TRACE, 0);
552 void AlignmentException(struct pt_regs *regs)
556 fixed = fix_alignment(regs);
558 regs->nip += 4; /* skip over emulated instruction */
561 if (fixed == -EFAULT) {
562 /* fixed == -EFAULT means the operand address was bad */
564 _exception(SIGSEGV, regs, SEGV_ACCERR, regs->dar);
566 bad_page_fault(regs, regs->dar, SIGSEGV);
569 _exception(SIGBUS, regs, BUS_ADRALN, regs->dar);
572 void StackOverflow(struct pt_regs *regs)
574 printk(KERN_CRIT "Kernel stack overflow in process %p, r1=%lx\n",
575 current, regs->gpr[1]);
578 panic("kernel stack overflow");
581 void nonrecoverable_exception(struct pt_regs *regs)
583 printk(KERN_ERR "Non-recoverable exception at PC=%lx MSR=%lx\n",
584 regs->nip, regs->msr);
586 die("nonrecoverable exception", regs, SIGKILL);
589 void trace_syscall(struct pt_regs *regs)
591 printk("Task: %p(%d), PC: %08lX/%08lX, Syscall: %3ld, Result: %s%ld %s\n",
592 current, current->pid, regs->nip, regs->link, regs->gpr[0],
593 regs->ccr&0x10000000?"Error=":"", regs->gpr[3], print_tainted());
597 void SoftwareEmulation(struct pt_regs *regs)
599 extern int do_mathemu(struct pt_regs *);
600 extern int Soft_emulate_8xx(struct pt_regs *);
603 CHECK_FULL_REGS(regs);
605 if (!user_mode(regs)) {
607 die("Kernel Mode Software FPU Emulation", regs, SIGFPE);
610 #ifdef CONFIG_MATH_EMULATION
611 errcode = do_mathemu(regs);
613 errcode = Soft_emulate_8xx(regs);
617 _exception(SIGFPE, regs, 0, 0);
618 else if (errcode == -EFAULT)
619 _exception(SIGSEGV, regs, 0, 0);
621 _exception(SIGILL, regs, ILL_ILLOPC, regs->nip);
623 emulate_single_step(regs);
625 #endif /* CONFIG_8xx */
627 #if defined(CONFIG_4xx) || defined(CONFIG_BOOKE)
629 void DebugException(struct pt_regs *regs, unsigned long debug_status)
632 if (debug_status & DBSR_TIE) { /* trap instruction*/
633 if (!user_mode(regs) && debugger_bpt(regs))
635 _exception(SIGTRAP, regs, 0, 0);
639 if (debug_status & DBSR_IC) { /* instruction completion */
640 if (!user_mode(regs) && debugger_sstep(regs))
642 current->thread.dbcr0 &= ~DBCR0_IC;
643 _exception(SIGTRAP, regs, TRAP_TRACE, 0);
646 #endif /* CONFIG_4xx || CONFIG_BOOKE */
648 #if !defined(CONFIG_TAU_INT)
649 void TAUException(struct pt_regs *regs)
651 printk("TAU trap at PC: %lx, MSR: %lx, vector=%lx %s\n",
652 regs->nip, regs->msr, regs->trap, print_tainted());
654 #endif /* CONFIG_INT_TAU */
656 void AltivecUnavailException(struct pt_regs *regs)
658 static int kernel_altivec_count;
660 #ifndef CONFIG_ALTIVEC
661 if (user_mode(regs)) {
662 /* A user program has executed an altivec instruction,
663 but this kernel doesn't support altivec. */
664 _exception(SIGILL, regs, ILL_ILLOPC, regs->nip);
668 /* The kernel has executed an altivec instruction without
669 first enabling altivec. Whinge but let it do it. */
670 if (++kernel_altivec_count < 10)
671 printk(KERN_ERR "AltiVec used in kernel (task=%p, pc=%lx)\n",
673 regs->msr |= MSR_VEC;
676 #ifdef CONFIG_ALTIVEC
677 void AltivecAssistException(struct pt_regs *regs)
682 if (regs->msr & MSR_VEC)
683 giveup_altivec(current);
686 err = emulate_altivec(regs);
688 regs->nip += 4; /* skip emulated instruction */
689 emulate_single_step(regs);
693 if (err == -EFAULT) {
694 /* got an error reading the instruction */
695 _exception(SIGSEGV, regs, SEGV_ACCERR, regs->nip);
697 /* didn't recognize the instruction */
698 /* XXX quick hack for now: set the non-Java bit in the VSCR */
699 printk(KERN_ERR "unrecognized altivec instruction "
700 "in %s at %lx\n", current->comm, regs->nip);
701 current->thread.vscr.u[3] |= 0x10000;
704 #endif /* CONFIG_ALTIVEC */
706 #ifdef CONFIG_FSL_BOOKE
707 void CacheLockingException(struct pt_regs *regs, unsigned long address,
708 unsigned long error_code)
710 /* We treat cache locking instructions from the user
711 * as priv ops, in the future we could try to do
714 if (error_code & (ESR_DLK|ESR_ILK))
715 _exception(SIGILL, regs, ILL_PRVOPC, regs->nip);
718 #endif /* CONFIG_FSL_BOOKE */
721 void SPEFloatingPointException(struct pt_regs *regs)
723 unsigned long spefscr;
727 spefscr = current->thread.spefscr;
728 fpexc_mode = current->thread.fpexc_mode;
730 /* Hardware does not neccessarily set sticky
731 * underflow/overflow/invalid flags */
732 if ((spefscr & SPEFSCR_FOVF) && (fpexc_mode & PR_FP_EXC_OVF)) {
734 spefscr |= SPEFSCR_FOVFS;
736 else if ((spefscr & SPEFSCR_FUNF) && (fpexc_mode & PR_FP_EXC_UND)) {
738 spefscr |= SPEFSCR_FUNFS;
740 else if ((spefscr & SPEFSCR_FDBZ) && (fpexc_mode & PR_FP_EXC_DIV))
742 else if ((spefscr & SPEFSCR_FINV) && (fpexc_mode & PR_FP_EXC_INV)) {
744 spefscr |= SPEFSCR_FINVS;
746 else if ((spefscr & (SPEFSCR_FG | SPEFSCR_FX)) && (fpexc_mode & PR_FP_EXC_RES))
749 current->thread.spefscr = spefscr;
751 _exception(SIGFPE, regs, code, regs->nip);
756 void __init trap_init(void)