2 * arch/ppc/kernel/traps.c
4 * Copyright (C) 1995-1996 Gary Thomas (gdt@linuxppc.org)
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * as published by the Free Software Foundation; either version
9 * 2 of the License, or (at your option) any later version.
11 * Modified by Cort Dougan (cort@cs.nmt.edu)
12 * and Paul Mackerras (paulus@cs.anu.edu.au)
16 * This file handles the architecture-dependent parts of hardware exceptions
19 #include <linux/errno.h>
20 #include <linux/sched.h>
21 #include <linux/kernel.h>
23 #include <linux/stddef.h>
24 #include <linux/unistd.h>
25 #include <linux/ptrace.h>
26 #include <linux/slab.h>
27 #include <linux/user.h>
28 #include <linux/a.out.h>
29 #include <linux/interrupt.h>
30 #include <linux/config.h>
31 #include <linux/init.h>
32 #include <linux/module.h>
33 #include <linux/prctl.h>
35 #include <asm/pgtable.h>
36 #include <asm/uaccess.h>
37 #include <asm/system.h>
41 #ifdef CONFIG_PMAC_BACKLIGHT
42 #include <asm/backlight.h>
46 void (*debugger)(struct pt_regs *regs) = xmon;
47 int (*debugger_bpt)(struct pt_regs *regs) = xmon_bpt;
48 int (*debugger_sstep)(struct pt_regs *regs) = xmon_sstep;
49 int (*debugger_iabr_match)(struct pt_regs *regs) = xmon_iabr_match;
50 int (*debugger_dabr_match)(struct pt_regs *regs) = xmon_dabr_match;
51 void (*debugger_fault_handler)(struct pt_regs *regs);
54 void (*debugger)(struct pt_regs *regs);
55 int (*debugger_bpt)(struct pt_regs *regs);
56 int (*debugger_sstep)(struct pt_regs *regs);
57 int (*debugger_iabr_match)(struct pt_regs *regs);
58 int (*debugger_dabr_match)(struct pt_regs *regs);
59 void (*debugger_fault_handler)(struct pt_regs *regs);
61 #define debugger(regs) do { } while (0)
62 #define debugger_bpt(regs) 0
63 #define debugger_sstep(regs) 0
64 #define debugger_iabr_match(regs) 0
65 #define debugger_dabr_match(regs) 0
66 #define debugger_fault_handler ((void (*)(struct pt_regs *))0)
71 * Trap & Exception support
75 spinlock_t die_lock = SPIN_LOCK_UNLOCKED;
77 void die(const char * str, struct pt_regs * fp, long err)
79 static int die_counter;
82 spin_lock_irq(&die_lock);
83 #ifdef CONFIG_PMAC_BACKLIGHT
84 set_backlight_enable(1);
85 set_backlight_level(BACKLIGHT_MAX);
87 printk("Oops: %s, sig: %ld [#%d]\n", str, err, ++die_counter);
93 printk("SMP NR_CPUS=%d ", NR_CPUS);
99 spin_unlock_irq(&die_lock);
100 /* do_exit() should take care of panic'ing from an interrupt
101 * context so we don't handle it here
107 _exception(int signr, struct pt_regs *regs, int code, unsigned long addr)
111 if (!user_mode(regs)) {
113 die("Exception in kernel mode", regs, signr);
115 info.si_signo = signr;
118 info.si_addr = (void *) addr;
119 force_sig_info(signr, &info, current);
123 * I/O accesses can cause machine checks on powermacs.
124 * Check if the NIP corresponds to the address of a sync
125 * instruction for which there is an entry in the exception
127 * Note that the 601 only takes a machine check on TEA
128 * (transfer error ack) signal assertion, and does not
129 * set any of the top 16 bits of SRR1.
132 static inline int check_io_access(struct pt_regs *regs)
134 #ifdef CONFIG_PPC_PMAC
135 unsigned long msr = regs->msr;
136 const struct exception_table_entry *entry;
137 unsigned int *nip = (unsigned int *)regs->nip;
139 if (((msr & 0xffff0000) == 0 || (msr & (0x80000 | 0x40000)))
140 && (entry = search_exception_tables(regs->nip)) != NULL) {
142 * Check that it's a sync instruction, or somewhere
143 * in the twi; isync; nop sequence that inb/inw/inl uses.
144 * As the address is in the exception table
145 * we should be able to read the instr there.
146 * For the debug message, we look at the preceding
149 if (*nip == 0x60000000) /* nop */
151 else if (*nip == 0x4c00012c) /* isync */
153 if (*nip == 0x7c0004ac || (*nip >> 26) == 3) {
158 rb = (*nip >> 11) & 0x1f;
159 printk(KERN_DEBUG "%s bad port %lx at %p\n",
160 (*nip & 0x100)? "OUT to": "IN from",
161 regs->gpr[rb] - _IO_BASE, nip);
163 regs->nip = entry->fixup;
167 #endif /* CONFIG_PPC_PMAC */
171 #if defined(CONFIG_4xx) || defined(CONFIG_BOOKE)
172 /* On 4xx, the reason for the machine check or program exception
174 #define get_reason(regs) ((regs)->dsisr)
176 #define get_mc_reason(regs) ((regs)->dsisr)
178 #define get_mc_reason(regs) (mfspr(SPRN_MCSR))
181 #define REASON_ILLEGAL ESR_PIL
182 #define REASON_PRIVILEGED ESR_PPR
183 #define REASON_TRAP ESR_PTR
185 /* single-step stuff */
186 #define single_stepping(regs) (current->thread.dbcr0 & DBCR0_IC)
187 #define clear_single_step(regs) (current->thread.dbcr0 &= ~DBCR0_IC)
190 /* On non-4xx, the reason for the machine check or program
191 exception is in the MSR. */
192 #define get_reason(regs) ((regs)->msr)
193 #define get_mc_reason(regs) ((regs)->msr)
194 #define REASON_FP 0x100000
195 #define REASON_ILLEGAL 0x80000
196 #define REASON_PRIVILEGED 0x40000
197 #define REASON_TRAP 0x20000
199 #define single_stepping(regs) ((regs)->msr & MSR_SE)
200 #define clear_single_step(regs) ((regs)->msr &= ~MSR_SE)
204 MachineCheckException(struct pt_regs *regs)
206 unsigned long reason = get_mc_reason(regs);
208 if (user_mode(regs)) {
210 _exception(SIGBUS, regs, BUS_ADRERR, regs->nip);
214 #if defined(CONFIG_8xx) && defined(CONFIG_PCI)
215 /* the qspan pci read routines can cause machine checks -- Cort */
216 bad_page_fault(regs, regs->dar, SIGBUS);
220 if (debugger_fault_handler) {
221 debugger_fault_handler(regs);
226 if (check_io_access(regs))
229 #if defined(CONFIG_4xx) && !defined(CONFIG_440A)
230 if (reason & ESR_IMCP) {
231 printk("Instruction");
232 mtspr(SPRN_ESR, reason & ~ESR_IMCP);
235 printk(" machine check in kernel mode.\n");
236 #elif defined(CONFIG_440A)
237 printk("Machine check in kernel mode.\n");
238 if (reason & ESR_IMCP){
239 printk("Instruction Synchronous Machine Check exception\n");
240 mtspr(SPRN_ESR, reason & ~ESR_IMCP);
243 u32 mcsr = mfspr(SPRN_MCSR);
245 printk("Instruction Read PLB Error\n");
247 printk("Data Read PLB Error\n");
249 printk("Data Write PLB Error\n");
250 if (mcsr & MCSR_TLBP)
251 printk("TLB Parity Error\n");
252 if (mcsr & MCSR_ICP){
253 flush_instruction_cache();
254 printk("I-Cache Parity Error\n");
256 if (mcsr & MCSR_DCSP)
257 printk("D-Cache Search Parity Error\n");
258 if (mcsr & MCSR_DCFP)
259 printk("D-Cache Flush Parity Error\n");
260 if (mcsr & MCSR_IMPE)
261 printk("Machine Check exception is imprecise\n");
264 mtspr(SPRN_MCSR, mcsr);
266 #elif defined (CONFIG_E500)
267 printk("Machine check in kernel mode.\n");
268 printk("Caused by (from MCSR=%lx): ", reason);
270 if (reason & MCSR_MCP)
271 printk("Machine Check Signal\n");
272 if (reason & MCSR_ICPERR)
273 printk("Instruction Cache Parity Error\n");
274 if (reason & MCSR_DCP_PERR)
275 printk("Data Cache Push Parity Error\n");
276 if (reason & MCSR_DCPERR)
277 printk("Data Cache Parity Error\n");
278 if (reason & MCSR_GL_CI)
279 printk("Guarded Load or Cache-Inhibited stwcx.\n");
280 if (reason & MCSR_BUS_IAERR)
281 printk("Bus - Instruction Address Error\n");
282 if (reason & MCSR_BUS_RAERR)
283 printk("Bus - Read Address Error\n");
284 if (reason & MCSR_BUS_WAERR)
285 printk("Bus - Write Address Error\n");
286 if (reason & MCSR_BUS_IBERR)
287 printk("Bus - Instruction Data Error\n");
288 if (reason & MCSR_BUS_RBERR)
289 printk("Bus - Read Data Bus Error\n");
290 if (reason & MCSR_BUS_WBERR)
291 printk("Bus - Read Data Bus Error\n");
292 if (reason & MCSR_BUS_IPERR)
293 printk("Bus - Instruction Parity Error\n");
294 if (reason & MCSR_BUS_RPERR)
295 printk("Bus - Read Parity Error\n");
296 #else /* !CONFIG_4xx && !CONFIG_E500 */
297 printk("Machine check in kernel mode.\n");
298 printk("Caused by (from SRR1=%lx): ", reason);
299 switch (reason & 0x601F0000) {
301 printk("Machine check signal\n");
303 case 0: /* for 601 */
305 case 0x140000: /* 7450 MSS error and TEA */
306 printk("Transfer error ack signal\n");
309 printk("Data parity error signal\n");
312 printk("Address parity error signal\n");
315 printk("L1 Data Cache error\n");
318 printk("L1 Instruction Cache error\n");
321 printk("L2 data cache parity error\n");
324 printk("Unknown values in msr\n");
326 #endif /* CONFIG_4xx */
329 die("machine check", regs, SIGBUS);
333 SMIException(struct pt_regs *regs)
336 #if !(defined(CONFIG_XMON) || defined(CONFIG_KGDB))
338 panic("System Management Interrupt");
343 UnknownException(struct pt_regs *regs)
345 printk("Bad trap at PC: %lx, MSR: %lx, vector=%lx %s\n",
346 regs->nip, regs->msr, regs->trap, print_tainted());
347 _exception(SIGTRAP, regs, 0, 0);
351 InstructionBreakpoint(struct pt_regs *regs)
353 if (debugger_iabr_match(regs))
355 _exception(SIGTRAP, regs, TRAP_BRKPT, 0);
359 RunModeException(struct pt_regs *regs)
361 _exception(SIGTRAP, regs, 0, 0);
364 /* Illegal instruction emulation support. Originally written to
365 * provide the PVR to user applications using the mfspr rd, PVR.
366 * Return non-zero if we can't emulate, or EFAULT if the associated
367 * memory access caused an access fault. Return zero on success.
369 * There are a couple of ways to do this, either "decode" the instruction
370 * or directly match lots of bits. In this case, matching lots of
371 * bits is faster and easier.
374 #define INST_MFSPR_PVR 0x7c1f42a6
375 #define INST_MFSPR_PVR_MASK 0xfc1fffff
378 emulate_instruction(struct pt_regs *regs)
386 if (!user_mode(regs))
388 CHECK_FULL_REGS(regs);
390 if (get_user(instword, (u32 __user *)(regs->nip)))
393 /* Emulate the mfspr rD, PVR.
395 if ((instword & INST_MFSPR_PVR_MASK) == INST_MFSPR_PVR) {
396 rd = (instword >> 21) & 0x1f;
397 regs->gpr[rd] = mfspr(PVR);
405 * After we have successfully emulated an instruction, we have to
406 * check if the instruction was being single-stepped, and if so,
407 * pretend we got a single-step exception. This was pointed out
408 * by Kumar Gala. -- paulus
410 static void emulate_single_step(struct pt_regs *regs)
412 if (single_stepping(regs)) {
413 clear_single_step(regs);
414 _exception(SIGTRAP, regs, TRAP_TRACE, 0);
419 * Look through the list of trap instructions that are used for BUG(),
420 * BUG_ON() and WARN_ON() and see if we hit one. At this point we know
421 * that the exception was caused by a trap instruction of some kind.
422 * Returns 1 if we should continue (i.e. it was a WARN_ON) or 0
425 extern struct bug_entry __start___bug_table[], __stop___bug_table[];
427 #ifndef CONFIG_MODULES
428 #define module_find_bug(x) NULL
431 static struct bug_entry *find_bug(unsigned long bugaddr)
433 struct bug_entry *bug;
435 for (bug = __start___bug_table; bug < __stop___bug_table; ++bug)
436 if (bugaddr == bug->bug_addr)
438 return module_find_bug(bugaddr);
442 check_bug_trap(struct pt_regs *regs)
444 struct bug_entry *bug;
447 if (regs->msr & MSR_PR)
448 return 0; /* not in kernel */
449 addr = regs->nip; /* address of trap instruction */
450 if (addr < PAGE_OFFSET)
452 bug = find_bug(regs->nip);
455 if (bug->line & BUG_WARNING_TRAP) {
456 /* this is a WARN_ON rather than BUG/BUG_ON */
458 xmon_printf(KERN_ERR "Badness in %s at %s:%d\n",
459 bug->function, bug->file,
460 bug->line & ~BUG_WARNING_TRAP);
461 #endif /* CONFIG_XMON */
462 printk(KERN_ERR "Badness in %s at %s:%d\n",
463 bug->function, bug->file,
464 bug->line & ~BUG_WARNING_TRAP);
469 xmon_printf(KERN_CRIT "kernel BUG in %s at %s:%d!\n",
470 bug->function, bug->file, bug->line);
472 #endif /* CONFIG_XMON */
473 printk(KERN_CRIT "kernel BUG in %s at %s:%d!\n",
474 bug->function, bug->file, bug->line);
480 ProgramCheckException(struct pt_regs *regs)
482 unsigned int reason = get_reason(regs);
483 extern int do_mathemu(struct pt_regs *regs);
485 #ifdef CONFIG_MATH_EMULATION
486 /* (reason & REASON_ILLEGAL) would be the obvious thing here,
487 * but there seems to be a hardware bug on the 405GP (RevD)
488 * that means ESR is sometimes set incorrectly - either to
489 * ESR_DST (!?) or 0. In the process of chasing this with the
490 * hardware people - not sure if it can happen on any illegal
491 * instruction or only on FP instructions, whether there is a
492 * pattern to occurences etc. -dgibson 31/Mar/2003 */
493 if (!(reason & REASON_TRAP) && do_mathemu(regs) == 0) {
494 emulate_single_step(regs);
497 #endif /* CONFIG_MATH_EMULATION */
499 if (reason & REASON_FP) {
500 /* IEEE FP exception */
504 /* We must make sure the FP state is consistent with
508 if (regs->msr & MSR_FP)
512 fpscr = current->thread.fpscr;
513 fpscr &= fpscr << 22; /* mask summary bits with enables */
514 if (fpscr & FPSCR_VX)
516 else if (fpscr & FPSCR_OX)
518 else if (fpscr & FPSCR_UX)
520 else if (fpscr & FPSCR_ZX)
522 else if (fpscr & FPSCR_XX)
524 _exception(SIGFPE, regs, code, regs->nip);
528 if (reason & REASON_TRAP) {
530 if (debugger_bpt(regs))
532 if (check_bug_trap(regs)) {
536 _exception(SIGTRAP, regs, TRAP_BRKPT, 0);
540 if (reason & REASON_PRIVILEGED) {
541 /* Try to emulate it if we should. */
542 if (emulate_instruction(regs) == 0) {
543 emulate_single_step(regs);
546 _exception(SIGILL, regs, ILL_PRVOPC, regs->nip);
550 _exception(SIGILL, regs, ILL_ILLOPC, regs->nip);
554 SingleStepException(struct pt_regs *regs)
556 regs->msr &= ~MSR_SE; /* Turn off 'trace' bit */
557 if (debugger_sstep(regs))
559 _exception(SIGTRAP, regs, TRAP_TRACE, 0);
563 AlignmentException(struct pt_regs *regs)
567 fixed = fix_alignment(regs);
569 regs->nip += 4; /* skip over emulated instruction */
572 if (fixed == -EFAULT) {
573 /* fixed == -EFAULT means the operand address was bad */
575 _exception(SIGSEGV, regs, SEGV_ACCERR, regs->dar);
577 bad_page_fault(regs, regs->dar, SIGSEGV);
580 _exception(SIGBUS, regs, BUS_ADRALN, regs->dar);
584 StackOverflow(struct pt_regs *regs)
586 printk(KERN_CRIT "Kernel stack overflow in process %p, r1=%lx\n",
587 current, regs->gpr[1]);
590 panic("kernel stack overflow");
593 void nonrecoverable_exception(struct pt_regs *regs)
595 printk(KERN_ERR "Non-recoverable exception at PC=%lx MSR=%lx\n",
596 regs->nip, regs->msr);
598 die("nonrecoverable exception", regs, SIGKILL);
602 trace_syscall(struct pt_regs *regs)
604 printk("Task: %p(%d), PC: %08lX/%08lX, Syscall: %3ld, Result: %s%ld %s\n",
605 current, current->pid, regs->nip, regs->link, regs->gpr[0],
606 regs->ccr&0x10000000?"Error=":"", regs->gpr[3], print_tainted());
611 SoftwareEmulation(struct pt_regs *regs)
613 extern int do_mathemu(struct pt_regs *);
614 extern int Soft_emulate_8xx(struct pt_regs *);
617 CHECK_FULL_REGS(regs);
619 if (!user_mode(regs)) {
621 die("Kernel Mode Software FPU Emulation", regs, SIGFPE);
624 #ifdef CONFIG_MATH_EMULATION
625 errcode = do_mathemu(regs);
627 errcode = Soft_emulate_8xx(regs);
631 _exception(SIGFPE, regs, 0, 0);
632 else if (errcode == -EFAULT)
633 _exception(SIGSEGV, regs, 0, 0);
635 _exception(SIGILL, regs, ILL_ILLOPC, regs->nip);
637 emulate_single_step(regs);
639 #endif /* CONFIG_8xx */
641 #if defined(CONFIG_4xx) || defined(CONFIG_BOOKE)
643 void DebugException(struct pt_regs *regs, unsigned long debug_status)
646 if (debug_status & DBSR_TIE) { /* trap instruction*/
647 if (!user_mode(regs) && debugger_bpt(regs))
649 _exception(SIGTRAP, regs, 0, 0);
653 if (debug_status & DBSR_IC) { /* instruction completion */
654 if (!user_mode(regs) && debugger_sstep(regs))
656 current->thread.dbcr0 &= ~DBCR0_IC;
657 _exception(SIGTRAP, regs, TRAP_TRACE, 0);
660 #endif /* CONFIG_4xx || CONFIG_BOOKE */
662 #if !defined(CONFIG_TAU_INT)
664 TAUException(struct pt_regs *regs)
666 printk("TAU trap at PC: %lx, MSR: %lx, vector=%lx %s\n",
667 regs->nip, regs->msr, regs->trap, print_tainted());
669 #endif /* CONFIG_INT_TAU */
671 void AltivecUnavailException(struct pt_regs *regs)
673 static int kernel_altivec_count;
675 #ifndef CONFIG_ALTIVEC
676 if (user_mode(regs)) {
677 /* A user program has executed an altivec instruction,
678 but this kernel doesn't support altivec. */
679 _exception(SIGILL, regs, ILL_ILLOPC, regs->nip);
683 /* The kernel has executed an altivec instruction without
684 first enabling altivec. Whinge but let it do it. */
685 if (++kernel_altivec_count < 10)
686 printk(KERN_ERR "AltiVec used in kernel (task=%p, pc=%x)\n",
688 regs->msr |= MSR_VEC;
691 #ifdef CONFIG_ALTIVEC
693 AltivecAssistException(struct pt_regs *regs)
698 if (regs->msr & MSR_VEC)
699 giveup_altivec(current);
702 err = emulate_altivec(regs);
704 regs->nip += 4; /* skip emulated instruction */
705 emulate_single_step(regs);
709 if (err == -EFAULT) {
710 /* got an error reading the instruction */
711 _exception(SIGSEGV, regs, SEGV_ACCERR, regs->nip);
713 /* didn't recognize the instruction */
714 /* XXX quick hack for now: set the non-Java bit in the VSCR */
715 printk(KERN_ERR "unrecognized altivec instruction "
716 "in %s at %lx\n", current->comm, regs->nip);
717 current->thread.vscr.u[3] |= 0x10000;
720 #endif /* CONFIG_ALTIVEC */
722 #ifdef CONFIG_FSL_BOOKE
723 void CacheLockingException(struct pt_regs *regs, unsigned long address,
724 unsigned long error_code)
726 /* We treat cache locking instructions from the user
727 * as priv ops, in the future we could try to do
730 if (error_code & (ESR_DLK|ESR_ILK))
731 _exception(SIGILL, regs, ILL_PRVOPC, regs->nip);
734 #endif /* CONFIG_FSL_BOOKE */
738 SPEFloatingPointException(struct pt_regs *regs)
740 unsigned long spefscr;
744 spefscr = current->thread.spefscr;
745 fpexc_mode = current->thread.fpexc_mode;
747 /* Hardware does not neccessarily set sticky
748 * underflow/overflow/invalid flags */
749 if ((spefscr & SPEFSCR_FOVF) && (fpexc_mode & PR_FP_EXC_OVF)) {
751 spefscr |= SPEFSCR_FOVFS;
753 else if ((spefscr & SPEFSCR_FUNF) && (fpexc_mode & PR_FP_EXC_UND)) {
755 spefscr |= SPEFSCR_FUNFS;
757 else if ((spefscr & SPEFSCR_FDBZ) && (fpexc_mode & PR_FP_EXC_DIV))
759 else if ((spefscr & SPEFSCR_FINV) && (fpexc_mode & PR_FP_EXC_INV)) {
761 spefscr |= SPEFSCR_FINVS;
763 else if ((spefscr & (SPEFSCR_FG | SPEFSCR_FX)) && (fpexc_mode & PR_FP_EXC_RES))
766 current->thread.spefscr = spefscr;
768 _exception(SIGFPE, regs, code, regs->nip);
773 void __init trap_init(void)