2 * arch/ppc/platforms/4xx/ash.h
4 * Macros, definitions, and data structures specific to the IBM PowerPC
7 * Author: Armin Kuster <akuster@mvista.com>
9 * 2000-2002 (c) MontaVista, Software, Inc. This file is licensed under
10 * the terms of the GNU General Public License version 2. This program
11 * is licensed "as is" without any warranty of any kind, whether express
18 #include <asm/ibm_ocp.h>
19 #include <platforms/4xx/ibmnp405h.h>
23 * Data structure defining board information maintained by the boot
24 * ROM on IBM's "Ash" evaluation board. An effort has been made to
25 * keep the field names consistent with the 8xx 'bd_t' board info
29 typedef struct board_info {
30 unsigned char bi_s_version[4]; /* Version of this structure */
31 unsigned char bi_r_version[30]; /* Version of the IBM ROM */
32 unsigned int bi_memsize; /* DRAM installed, in bytes */
33 unsigned char bi_enetaddr[4][6]; /* Local Ethernet MAC address */
34 unsigned char bi_pci_enetaddr[6];
35 unsigned int bi_intfreq; /* Processor speed, in Hz */
36 unsigned int bi_busfreq; /* PLB Bus speed, in Hz */
37 unsigned int bi_pci_busfreq; /* PCI speed in Hz */
40 /* Some 4xx parts use a different timebase frequency from the internal clock.
42 #define bi_tbfreq bi_intfreq
44 /* Memory map for the IBM "Ash" NP405H evaluation board.
47 extern void *ash_rtc_base;
48 #define ASH_RTC_PADDR ((uint)0xf0000000)
49 #define ASH_RTC_VADDR ASH_RTC_PADDR
50 #define ASH_RTC_SIZE ((uint)8*1024)
53 /* Early initialization address mapping for block_io.
56 #define PPC4xx_PCI_IO_PADDR ((uint)PPC405_PCI_PHY_IO_BASE)
57 #define PPC4xx_PCI_IO_VADDR PPC4xx_PCI_IO_PADDR
58 #define PPC4xx_PCI_IO_SIZE ((uint)64*1024)
59 #define PPC4xx_PCI_CFG_PADDR ((uint)PPC405_PCI_CONFIG_ADDR)
60 #define PPC4xx_PCI_CFG_VADDR PPC4xx_PCI_CFG_PADDR
61 #define PPC4xx_PCI_CFG_SIZE ((uint)4*1024)
62 #define PPC4xx_PCI_LCFG_PADDR ((uint)0xef400000)
63 #define PPC4xx_PCI_LCFG_VADDR PPC4xx_PCI_LCFG_PADDR
64 #define PPC4xx_PCI_LCFG_SIZE ((uint)4*1024)
65 #define PPC4xx_ONB_IO_PADDR ((uint)0xef600000)
66 #define PPC4xx_ONB_IO_VADDR PPC4xx_ONB_IO_PADDR
67 #define PPC4xx_ONB_IO_SIZE ((uint)4*1024)
69 #define NR_BOARD_IRQS 32
71 #ifdef CONFIG_PPC405GP_INTERNAL_CLOCK
72 #define BASE_BAUD 201600
74 #define BASE_BAUD 691200
77 #define PPC4xx_MACHINE_NAME "IBM NP405H Ash"
79 extern char pci_irq_table[][4];
82 #endif /* !__ASSEMBLY__ */
83 #endif /* __ASM_ASH_H__ */
84 #endif /* __KERNEL__ */