2 * arch/ppc/platforms/4xx/ibm440gx.c
4 * PPC440GX I/O descriptions
6 * Matt Porter <mporter@mvista.com>
7 * Copyright 2002-2004 MontaVista Software Inc.
9 * Eugene Surovegin <eugene.surovegin@zultys.com> or <ebs@ebshome.net>
10 * Copyright (c) 2003, 2004 Zultys Technologies
12 * This program is free software; you can redistribute it and/or modify it
13 * under the terms of the GNU General Public License as published by the
14 * Free Software Foundation; either version 2 of the License, or (at your
15 * option) any later version.
18 #include <linux/init.h>
19 #include <linux/module.h>
20 #include <platforms/4xx/ibm440gx.h>
23 static struct ocp_func_emac_data ibm440gx_emac0_def = {
24 .rgmii_idx = -1, /* No RGMII */
25 .rgmii_mux = -1, /* No RGMII */
26 .zmii_idx = 0, /* ZMII device index */
27 .zmii_mux = 0, /* ZMII input of this EMAC */
28 .mal_idx = 0, /* MAL device index */
29 .mal_rx_chan = 0, /* MAL rx channel number */
30 .mal_tx_chan = 0, /* MAL tx channel number */
31 .wol_irq = 61, /* WOL interrupt number */
32 .mdio_idx = -1, /* No shared MDIO */
33 .tah_idx = -1, /* No TAH */
36 static struct ocp_func_emac_data ibm440gx_emac1_def = {
37 .rgmii_idx = -1, /* No RGMII */
38 .rgmii_mux = -1, /* No RGMII */
39 .zmii_idx = 0, /* ZMII device index */
40 .zmii_mux = 1, /* ZMII input of this EMAC */
41 .mal_idx = 0, /* MAL device index */
42 .mal_rx_chan = 1, /* MAL rx channel number */
43 .mal_tx_chan = 1, /* MAL tx channel number */
44 .wol_irq = 63, /* WOL interrupt number */
45 .mdio_idx = -1, /* No shared MDIO */
46 .tah_idx = -1, /* No TAH */
49 static struct ocp_func_emac_data ibm440gx_emac2_def = {
50 .rgmii_idx = 0, /* RGMII device index */
51 .rgmii_mux = 0, /* RGMII input of this EMAC */
52 .zmii_idx = 0, /* ZMII device index */
53 .zmii_mux = 2, /* ZMII input of this EMAC */
54 .mal_idx = 0, /* MAL device index */
55 .mal_rx_chan = 2, /* MAL rx channel number */
56 .mal_tx_chan = 2, /* MAL tx channel number */
57 .wol_irq = 65, /* WOL interrupt number */
58 .mdio_idx = -1, /* No shared MDIO */
59 .tah_idx = 0, /* TAH device index */
60 .jumbo = 1, /* Jumbo frames supported */
63 static struct ocp_func_emac_data ibm440gx_emac3_def = {
64 .rgmii_idx = 0, /* RGMII device index */
65 .rgmii_mux = 1, /* RGMII input of this EMAC */
66 .zmii_idx = 0, /* ZMII device index */
67 .zmii_mux = 3, /* ZMII input of this EMAC */
68 .mal_idx = 0, /* MAL device index */
69 .mal_rx_chan = 3, /* MAL rx channel number */
70 .mal_tx_chan = 3, /* MAL tx channel number */
71 .wol_irq = 67, /* WOL interrupt number */
72 .mdio_idx = -1, /* No shared MDIO */
73 .tah_idx = 1, /* TAH device index */
74 .jumbo = 1, /* Jumbo frames supported */
78 static struct ocp_func_mal_data ibm440gx_mal0_def = {
79 .num_tx_chans = 4, /* Number of TX channels */
80 .num_rx_chans = 4, /* Number of RX channels */
81 .txeob_irq = 10, /* TX End Of Buffer IRQ */
82 .rxeob_irq = 11, /* RX End Of Buffer IRQ */
83 .txde_irq = 33, /* TX Descriptor Error IRQ */
84 .rxde_irq = 34, /* RX Descriptor Error IRQ */
85 .serr_irq = 32, /* MAL System Error IRQ */
89 static struct ocp_func_iic_data ibm440gx_iic0_def = {
90 .fast_mode = 0, /* Use standad mode (100Khz) */
93 static struct ocp_func_iic_data ibm440gx_iic1_def = {
94 .fast_mode = 0, /* Use standad mode (100Khz) */
98 struct ocp_def core_ocp[] = {
99 { .vendor = OCP_VENDOR_IBM,
100 .function = OCP_FUNC_OPB,
102 .paddr = 0x0000000140000000ULL,
106 { .vendor = OCP_VENDOR_IBM,
107 .function = OCP_FUNC_16550,
109 .paddr = PPC440GX_UART0_ADDR,
113 { .vendor = OCP_VENDOR_IBM,
114 .function = OCP_FUNC_16550,
116 .paddr = PPC440GX_UART1_ADDR,
120 { .vendor = OCP_VENDOR_IBM,
121 .function = OCP_FUNC_IIC,
123 .paddr = 0x0000000140000400ULL,
126 .additions = &ibm440gx_iic0_def,
127 .show = &ocp_show_iic_data
129 { .vendor = OCP_VENDOR_IBM,
130 .function = OCP_FUNC_IIC,
132 .paddr = 0x0000000140000500ULL,
135 .additions = &ibm440gx_iic1_def,
136 .show = &ocp_show_iic_data
138 { .vendor = OCP_VENDOR_IBM,
139 .function = OCP_FUNC_GPIO,
141 .paddr = 0x0000000140000700ULL,
145 { .vendor = OCP_VENDOR_IBM,
146 .function = OCP_FUNC_MAL,
147 .paddr = OCP_PADDR_NA,
150 .additions = &ibm440gx_mal0_def,
151 .show = &ocp_show_mal_data,
153 { .vendor = OCP_VENDOR_IBM,
154 .function = OCP_FUNC_EMAC,
156 .paddr = 0x0000000140000800ULL,
159 .additions = &ibm440gx_emac0_def,
160 .show = &ocp_show_emac_data,
162 { .vendor = OCP_VENDOR_IBM,
163 .function = OCP_FUNC_EMAC,
165 .paddr = 0x0000000140000900ULL,
168 .additions = &ibm440gx_emac1_def,
169 .show = &ocp_show_emac_data,
171 { .vendor = OCP_VENDOR_IBM,
172 .function = OCP_FUNC_EMAC,
174 .paddr = 0x0000000140000C00ULL,
177 .additions = &ibm440gx_emac2_def,
178 .show = &ocp_show_emac_data,
180 { .vendor = OCP_VENDOR_IBM,
181 .function = OCP_FUNC_EMAC,
183 .paddr = 0x0000000140000E00ULL,
186 .additions = &ibm440gx_emac3_def,
187 .show = &ocp_show_emac_data,
189 { .vendor = OCP_VENDOR_IBM,
190 .function = OCP_FUNC_RGMII,
191 .paddr = 0x0000000140000790ULL,
195 { .vendor = OCP_VENDOR_IBM,
196 .function = OCP_FUNC_ZMII,
197 .paddr = 0x0000000140000780ULL,
201 { .vendor = OCP_VENDOR_IBM,
202 .function = OCP_FUNC_TAH,
204 .paddr = 0x0000000140000b50ULL,
208 { .vendor = OCP_VENDOR_IBM,
209 .function = OCP_FUNC_TAH,
211 .paddr = 0x0000000140000d50ULL,
215 { .vendor = OCP_VENDOR_INVALID