4 * Matt Porter <mporter@mvista.com>
6 * Copyright 2002 Roland Dreier
7 * Copyright 2003 MontaVista Software, Inc.
9 * This program is free software; you can redistribute it and/or modify it
10 * under the terms of the GNU General Public License as published by the
11 * Free Software Foundation; either version 2 of the License, or (at your
12 * option) any later version.
17 #ifndef __PPC_PLATFORMS_IBM440GX_H
18 #define __PPC_PLATFORMS_IBM440GX_H
20 #include <linux/config.h>
22 #include <asm/ibm44x.h>
25 #define PPC440GX_UART0_ADDR 0x0000000140000200ULL
26 #define PPC440GX_UART1_ADDR 0x0000000140000300ULL
30 /* Clock and Power Management */
31 #define IBM_CPM_IIC0 0x80000000 /* IIC interface */
32 #define IBM_CPM_IIC1 0x40000000 /* IIC interface */
33 #define IBM_CPM_PCI 0x20000000 /* PCI bridge */
34 #define IBM_CPM_RGMII 0x10000000 /* RGMII */
35 #define IBM_CPM_TAHOE0 0x08000000 /* TAHOE 0 */
36 #define IBM_CPM_TAHOE1 0x04000000 /* TAHOE 1 */
37 #define IBM_CPM_CPU 0x02000000 /* processor core */
38 #define IBM_CPM_DMA 0x01000000 /* DMA controller */
39 #define IBM_CPM_BGO 0x00800000 /* PLB to OPB bus arbiter */
40 #define IBM_CPM_BGI 0x00400000 /* OPB to PLB bridge */
41 #define IBM_CPM_EBC 0x00200000 /* External Bux Controller */
42 #define IBM_CPM_EBM 0x00100000 /* Ext Bus Master Interface */
43 #define IBM_CPM_DMC 0x00080000 /* SDRAM peripheral controller */
44 #define IBM_CPM_PLB 0x00040000 /* PLB bus arbiter */
45 #define IBM_CPM_SRAM 0x00020000 /* SRAM memory controller */
46 #define IBM_CPM_PPM 0x00002000 /* PLB Performance Monitor */
47 #define IBM_CPM_UIC1 0x00001000 /* Universal Interrupt Controller */
48 #define IBM_CPM_GPIO0 0x00000800 /* General Purpose IO (??) */
49 #define IBM_CPM_GPT 0x00000400 /* General Purpose Timers */
50 #define IBM_CPM_UART0 0x00000200 /* serial port 0 */
51 #define IBM_CPM_UART1 0x00000100 /* serial port 1 */
52 #define IBM_CPM_UIC0 0x00000080 /* Universal Interrupt Controller */
53 #define IBM_CPM_TMRCLK 0x00000040 /* CPU timers */
54 #define IBM_CPM_EMAC0 0x00000020 /* EMAC 0 */
55 #define IBM_CPM_EMAC1 0x00000010 /* EMAC 1 */
56 #define IBM_CPM_EMAC2 0x00000008 /* EMAC 2 */
57 #define IBM_CPM_EMAC3 0x00000004 /* EMAC 3 */
59 #define DFLT_IBM4xx_PM ~(IBM_CPM_UIC | IBM_CPM_UIC1 | IBM_CPM_CPU \
60 | IBM_CPM_EBC | IBM_CPM_SRAM | IBM_CPM_BGO \
61 | IBM_CPM_EBM | IBM_CPM_PLB | IBM_CPM_OPB \
62 | IBM_CPM_TMRCLK | IBM_CPM_DMA | IBM_CPM_PCI \
63 | IBM_CPM_TAHOE0 | IBM_CPM_TAHOE1 \
64 | IBM_CPM_EMAC0 | IBM_CPM_EMAC1 \
65 | IBM_CPM_EMAC2 | IBM_CPM_EMAC3 )
69 #define RS_TABLE_SIZE 2
71 #endif /* __PPC_PLATFORMS_IBM440GX_H */
72 #endif /* __KERNEL__ */