2 * arch/ppc/platforms/85xx/mpc8540_ads.c
4 * MPC8540ADS board specific routines
6 * Maintainer: Kumar Gala <kumar.gala@freescale.com>
8 * Copyright 2004 Freescale Semiconductor Inc.
10 * This program is free software; you can redistribute it and/or modify it
11 * under the terms of the GNU General Public License as published by the
12 * Free Software Foundation; either version 2 of the License, or (at your
13 * option) any later version.
16 #include <linux/config.h>
17 #include <linux/stddef.h>
18 #include <linux/kernel.h>
19 #include <linux/init.h>
20 #include <linux/errno.h>
21 #include <linux/reboot.h>
22 #include <linux/pci.h>
23 #include <linux/kdev_t.h>
24 #include <linux/major.h>
25 #include <linux/console.h>
26 #include <linux/delay.h>
27 #include <linux/irq.h>
28 #include <linux/seq_file.h>
29 #include <linux/root_dev.h>
30 #include <linux/serial.h>
31 #include <linux/tty.h> /* for linux/serial_core.h */
32 #include <linux/serial_core.h>
33 #include <linux/initrd.h>
34 #include <linux/module.h>
36 #include <asm/system.h>
37 #include <asm/pgtable.h>
39 #include <asm/atomic.h>
42 #include <asm/machdep.h>
44 #include <asm/open_pic.h>
45 #include <asm/bootinfo.h>
46 #include <asm/pci-bridge.h>
47 #include <asm/mpc85xx.h>
49 #include <asm/immap_85xx.h>
52 #include <mm/mmu_decl.h>
54 #include <syslib/ppc85xx_common.h>
55 #include <syslib/ppc85xx_setup.h>
57 struct ocp_gfar_data mpc85xx_tsec1_def = {
58 .interruptTransmit = MPC85xx_IRQ_TSEC1_TX,
59 .interruptError = MPC85xx_IRQ_TSEC1_ERROR,
60 .interruptReceive = MPC85xx_IRQ_TSEC1_RX,
61 .interruptPHY = MPC85xx_IRQ_EXT5,
62 .flags = (GFAR_HAS_GIGABIT | GFAR_HAS_MULTI_INTR
64 | GFAR_HAS_PHY_INTR | GFAR_HAS_COALESCE),
69 struct ocp_gfar_data mpc85xx_tsec2_def = {
70 .interruptTransmit = MPC85xx_IRQ_TSEC2_TX,
71 .interruptError = MPC85xx_IRQ_TSEC2_ERROR,
72 .interruptReceive = MPC85xx_IRQ_TSEC2_RX,
73 .interruptPHY = MPC85xx_IRQ_EXT5,
74 .flags = (GFAR_HAS_GIGABIT | GFAR_HAS_MULTI_INTR
76 | GFAR_HAS_PHY_INTR | GFAR_HAS_COALESCE),
81 struct ocp_gfar_data mpc85xx_fec_def = {
82 .interruptTransmit = MPC85xx_IRQ_FEC,
83 .interruptError = MPC85xx_IRQ_FEC,
84 .interruptReceive = MPC85xx_IRQ_FEC,
85 .interruptPHY = MPC85xx_IRQ_EXT5,
91 struct ocp_fs_i2c_data mpc85xx_i2c1_def = {
92 .flags = FS_I2C_SEPARATE_DFSRR,
95 /* ************************************************************************
97 * Setup the architecture
101 mpc8540ads_setup_arch(void)
104 struct ocp_gfar_data *einfo;
105 bd_t *binfo = (bd_t *) __res;
108 /* get the core frequency */
109 freq = binfo->bi_intfreq;
112 ppc_md.progress("mpc8540ads_setup_arch()", 0);
114 /* Set loops_per_jiffy to a half-way reasonable value,
115 for use until calibrate_delay gets called. */
116 loops_per_jiffy = freq / HZ;
119 /* setup PCI host bridges */
120 mpc85xx_setup_hose();
123 #ifdef CONFIG_DUMMY_CONSOLE
124 conswitchp = &dummy_con;
127 #ifdef CONFIG_SERIAL_8250
128 mpc85xx_early_serial_map();
131 #ifdef CONFIG_SERIAL_TEXT_DEBUG
132 /* Invalidate the entry we stole earlier the serial ports
133 * should be properly mapped */
134 invalidate_tlbcam_entry(NUM_TLBCAMS - 1);
137 def = ocp_get_one_device(OCP_VENDOR_FREESCALE, OCP_FUNC_GFAR, 0);
139 einfo = (struct ocp_gfar_data *) def->additions;
140 memcpy(einfo->mac_addr, binfo->bi_enetaddr, 6);
143 def = ocp_get_one_device(OCP_VENDOR_FREESCALE, OCP_FUNC_GFAR, 1);
145 einfo = (struct ocp_gfar_data *) def->additions;
146 memcpy(einfo->mac_addr, binfo->bi_enet1addr, 6);
149 def = ocp_get_one_device(OCP_VENDOR_FREESCALE, OCP_FUNC_GFAR, 2);
151 einfo = (struct ocp_gfar_data *) def->additions;
152 memcpy(einfo->mac_addr, binfo->bi_enet2addr, 6);
155 #ifdef CONFIG_BLK_DEV_INITRD
157 ROOT_DEV = Root_RAM0;
160 #ifdef CONFIG_ROOT_NFS
163 ROOT_DEV = Root_HDA1;
166 ocp_for_each_device(mpc85xx_update_paddr_ocp, &(binfo->bi_immr_base));
169 /* ************************************************************************ */
171 platform_init(unsigned long r3, unsigned long r4, unsigned long r5,
172 unsigned long r6, unsigned long r7)
174 /* parse_bootinfo must always be called first */
175 parse_bootinfo(find_bootinfo());
178 * If we were passed in a board information, copy it into the
179 * residual data area.
182 memcpy((void *) __res, (void *) (r3 + KERNELBASE),
185 #ifdef CONFIG_SERIAL_TEXT_DEBUG
187 bd_t *binfo = (bd_t *) __res;
189 /* Use the last TLB entry to map CCSRBAR to allow access to DUART regs */
190 settlbcam(NUM_TLBCAMS - 1, binfo->bi_immr_base,
191 binfo->bi_immr_base, MPC85xx_CCSRBAR_SIZE, _PAGE_IO, 0);
195 #if defined(CONFIG_BLK_DEV_INITRD)
197 * If the init RAM disk has been configured in, and there's a valid
198 * starting address for it, set it up.
201 initrd_start = r4 + KERNELBASE;
202 initrd_end = r5 + KERNELBASE;
204 #endif /* CONFIG_BLK_DEV_INITRD */
206 /* Copy the kernel command line arguments to a safe place. */
209 *(char *) (r7 + KERNELBASE) = 0;
210 strcpy(cmd_line, (char *) (r6 + KERNELBASE));
213 /* setup the PowerPC module struct */
214 ppc_md.setup_arch = mpc8540ads_setup_arch;
215 ppc_md.show_cpuinfo = mpc85xx_ads_show_cpuinfo;
217 ppc_md.init_IRQ = mpc85xx_ads_init_IRQ;
218 ppc_md.get_irq = openpic_get_irq;
220 ppc_md.restart = mpc85xx_restart;
221 ppc_md.power_off = mpc85xx_power_off;
222 ppc_md.halt = mpc85xx_halt;
224 ppc_md.find_end_of_memory = mpc85xx_find_end_of_memory;
226 ppc_md.time_init = NULL;
227 ppc_md.set_rtc_time = NULL;
228 ppc_md.get_rtc_time = NULL;
229 ppc_md.calibrate_decr = mpc85xx_calibrate_decr;
231 #if defined(CONFIG_SERIAL_8250) && defined(CONFIG_SERIAL_TEXT_DEBUG)
232 ppc_md.progress = gen550_progress;
233 #endif /* CONFIG_SERIAL_8250 && CONFIG_SERIAL_TEXT_DEBUG */
236 ppc_md.progress("mpc8540ads_init(): exit", 0);