2 * arch/ppc/platforms/85xx/mpc8560_ads.c
4 * MPC8560ADS board specific routines
6 * Maintainer: Kumar Gala <kumar.gala@freescale.com>
8 * Copyright 2004 Freescale Semiconductor Inc.
10 * This program is free software; you can redistribute it and/or modify it
11 * under the terms of the GNU General Public License as published by the
12 * Free Software Foundation; either version 2 of the License, or (at your
13 * option) any later version.
16 #include <linux/config.h>
17 #include <linux/stddef.h>
18 #include <linux/kernel.h>
19 #include <linux/init.h>
20 #include <linux/errno.h>
21 #include <linux/reboot.h>
22 #include <linux/pci.h>
23 #include <linux/kdev_t.h>
24 #include <linux/major.h>
25 #include <linux/console.h>
26 #include <linux/delay.h>
27 #include <linux/irq.h>
28 #include <linux/seq_file.h>
29 #include <linux/root_dev.h>
30 #include <linux/serial.h>
31 #include <linux/tty.h> /* for linux/serial_core.h */
32 #include <linux/serial_core.h>
33 #include <linux/initrd.h>
34 #include <linux/module.h>
36 #include <asm/system.h>
37 #include <asm/pgtable.h>
39 #include <asm/atomic.h>
42 #include <asm/machdep.h>
44 #include <asm/open_pic.h>
45 #include <asm/bootinfo.h>
46 #include <asm/pci-bridge.h>
47 #include <asm/mpc85xx.h>
49 #include <asm/immap_85xx.h>
53 #include <mm/mmu_decl.h>
55 #include <syslib/cpm2_pic.h>
56 #include <syslib/ppc85xx_common.h>
57 #include <syslib/ppc85xx_setup.h>
59 extern void cpm2_reset(void);
61 struct ocp_gfar_data mpc85xx_tsec1_def = {
62 .interruptTransmit = MPC85xx_IRQ_TSEC1_TX,
63 .interruptError = MPC85xx_IRQ_TSEC1_ERROR,
64 .interruptReceive = MPC85xx_IRQ_TSEC1_RX,
65 .interruptPHY = MPC85xx_IRQ_EXT5,
66 .flags = (GFAR_HAS_GIGABIT | GFAR_HAS_MULTI_INTR
67 | GFAR_HAS_RMON | GFAR_HAS_COALESCE
73 struct ocp_gfar_data mpc85xx_tsec2_def = {
74 .interruptTransmit = MPC85xx_IRQ_TSEC2_TX,
75 .interruptError = MPC85xx_IRQ_TSEC2_ERROR,
76 .interruptReceive = MPC85xx_IRQ_TSEC2_RX,
77 .interruptPHY = MPC85xx_IRQ_EXT5,
78 .flags = (GFAR_HAS_GIGABIT | GFAR_HAS_MULTI_INTR
79 | GFAR_HAS_RMON | GFAR_HAS_COALESCE
85 struct ocp_fs_i2c_data mpc85xx_i2c1_def = {
86 .flags = FS_I2C_SEPARATE_DFSRR,
89 /* ************************************************************************
91 * Setup the architecture
96 mpc8560ads_setup_arch(void)
99 struct ocp_gfar_data *einfo;
100 bd_t *binfo = (bd_t *) __res;
105 /* get the core frequency */
106 freq = binfo->bi_intfreq;
109 ppc_md.progress("mpc8560ads_setup_arch()", 0);
111 /* Set loops_per_jiffy to a half-way reasonable value,
112 for use until calibrate_delay gets called. */
113 loops_per_jiffy = freq / HZ;
116 /* setup PCI host bridges */
117 mpc85xx_setup_hose();
120 def = ocp_get_one_device(OCP_VENDOR_FREESCALE, OCP_FUNC_GFAR, 0);
122 einfo = (struct ocp_gfar_data *) def->additions;
123 memcpy(einfo->mac_addr, binfo->bi_enetaddr, 6);
126 def = ocp_get_one_device(OCP_VENDOR_FREESCALE, OCP_FUNC_GFAR, 1);
128 einfo = (struct ocp_gfar_data *) def->additions;
129 memcpy(einfo->mac_addr, binfo->bi_enet1addr, 6);
132 #ifdef CONFIG_BLK_DEV_INITRD
134 ROOT_DEV = Root_RAM0;
137 #ifdef CONFIG_ROOT_NFS
140 ROOT_DEV = Root_HDA1;
143 ocp_for_each_device(mpc85xx_update_paddr_ocp, &(binfo->bi_immr_base));
146 static irqreturn_t cpm2_cascade(int irq, void *dev_id, struct pt_regs *regs)
148 while ((irq = cpm2_get_irq(regs)) >= 0)
153 static struct irqaction cpm2_irqaction = {
154 .handler = cpm2_cascade,
155 .flags = SA_INTERRUPT,
156 .mask = CPU_MASK_NONE,
157 .name = "cpm2_cascade",
161 mpc8560_ads_init_IRQ(void)
164 volatile cpm2_map_t *immap = cpm2_immr;
167 mpc85xx_ads_init_IRQ();
169 /* disable all CPM interupts */
170 immap->im_intctl.ic_simrh = 0x0;
171 immap->im_intctl.ic_simrl = 0x0;
173 for (i = CPM_IRQ_OFFSET; i < (NR_CPM_INTS + CPM_IRQ_OFFSET); i++)
174 irq_desc[i].handler = &cpm2_pic;
176 /* Initialize the default interrupt mapping priorities,
177 * in case the boot rom changed something on us.
179 immap->im_intctl.ic_sicr = 0;
180 immap->im_intctl.ic_scprrh = 0x05309770;
181 immap->im_intctl.ic_scprrl = 0x05309770;
183 setup_irq(MPC85xx_IRQ_CPM, &cpm2_irqaction);
190 /* ************************************************************************ */
192 platform_init(unsigned long r3, unsigned long r4, unsigned long r5,
193 unsigned long r6, unsigned long r7)
195 /* parse_bootinfo must always be called first */
196 parse_bootinfo(find_bootinfo());
199 * If we were passed in a board information, copy it into the
200 * residual data area.
203 memcpy((void *) __res, (void *) (r3 + KERNELBASE),
207 #if defined(CONFIG_BLK_DEV_INITRD)
209 * If the init RAM disk has been configured in, and there's a valid
210 * starting address for it, set it up.
213 initrd_start = r4 + KERNELBASE;
214 initrd_end = r5 + KERNELBASE;
216 #endif /* CONFIG_BLK_DEV_INITRD */
218 /* Copy the kernel command line arguments to a safe place. */
221 *(char *) (r7 + KERNELBASE) = 0;
222 strcpy(cmd_line, (char *) (r6 + KERNELBASE));
225 /* setup the PowerPC module struct */
226 ppc_md.setup_arch = mpc8560ads_setup_arch;
227 ppc_md.show_cpuinfo = mpc85xx_ads_show_cpuinfo;
229 ppc_md.init_IRQ = mpc8560_ads_init_IRQ;
230 ppc_md.get_irq = openpic_get_irq;
232 ppc_md.restart = mpc85xx_restart;
233 ppc_md.power_off = mpc85xx_power_off;
234 ppc_md.halt = mpc85xx_halt;
236 ppc_md.find_end_of_memory = mpc85xx_find_end_of_memory;
238 ppc_md.time_init = NULL;
239 ppc_md.set_rtc_time = NULL;
240 ppc_md.get_rtc_time = NULL;
241 ppc_md.calibrate_decr = mpc85xx_calibrate_decr;
244 ppc_md.progress("mpc8560ads_init(): exit", 0);