1 /* Board information for the SBCPowerQUICCII, which should be generic for
2 * all 8260 boards. The IMMR is now given to us so the hard define
3 * will soon be removed. All of the clock values are computed from
4 * the configuration SCMR and the Power-On-Reset word.
7 #ifndef __PPC_SBC82xx_H__
8 #define __PPC_SBC82xx_H__
10 #include <asm/ppcboot.h>
12 #define IMAP_ADDR 0xf0000000
13 #define CPM_MAP_ADDR 0xf0000000
15 #define SBC82xx_TODC_NVRAM_ADDR 0x80000000
17 #define SBC82xx_MACADDR_NVRAM_FCC1 0x220000c9 /* JP6B */
18 #define SBC82xx_MACADDR_NVRAM_SCC1 0x220000cf /* JP6A */
19 #define SBC82xx_MACADDR_NVRAM_FCC2 0x220000d5 /* JP7A */
20 #define SBC82xx_MACADDR_NVRAM_FCC3 0x220000db /* JP7B */
22 #define BOOTROM_RESTART_ADDR ((uint)0x40000104)
24 #endif /* __PPC_SBC82xx_H__ */