2 * arch/ppc/syslib/cpc700.h
4 * Header file for IBM CPC700 Host Bridge, et. al.
6 * Author: Mark A. Greer
9 * 2000-2002 (c) MontaVista, Software, Inc. This file is licensed under
10 * the terms of the GNU General Public License version 2. This program
11 * is licensed "as is" without any warranty of any kind, whether express
16 * This file contains the defines and macros for the IBM CPC700 host bridge,
17 * memory controller, PIC, UARTs, IIC, and Timers.
20 #ifndef _ASMPPC_CPC700_H
21 #define _ASMPPC_CPC700_H
23 #include <linux/stddef.h>
24 #include <linux/types.h>
25 #include <linux/init.h>
27 #define CPC700_OUT_32(a,d) (*(u_int *)a = d)
28 #define CPC700_IN_32(a) (*(u_int *)a)
33 #define CPC700_PCI_CONFIG_ADDR 0xfec00000
34 #define CPC700_PCI_CONFIG_DATA 0xfec00004
36 #define CPC700_PMM0_LOCAL 0xff400000
37 #define CPC700_PMM0_MASK_ATTR 0xff400004
38 #define CPC700_PMM0_PCI_LOW 0xff400008
39 #define CPC700_PMM0_PCI_HIGH 0xff40000c
40 #define CPC700_PMM1_LOCAL 0xff400010
41 #define CPC700_PMM1_MASK_ATTR 0xff400014
42 #define CPC700_PMM1_PCI_LOW 0xff400018
43 #define CPC700_PMM1_PCI_HIGH 0xff40001c
44 #define CPC700_PMM2_LOCAL 0xff400020
45 #define CPC700_PMM2_MASK_ATTR 0xff400024
46 #define CPC700_PMM2_PCI_LOW 0xff400028
47 #define CPC700_PMM2_PCI_HIGH 0xff40002c
48 #define CPC700_PTM1_MEMSIZE 0xff400030
49 #define CPC700_PTM1_LOCAL 0xff400034
50 #define CPC700_PTM2_MEMSIZE 0xff400038
51 #define CPC700_PTM2_LOCAL 0xff40003c
56 * IBM calls the CPC700's programmable interrupt controller the Universal
57 * Interrupt Controller or UIC.
61 * UIC Register Addresses.
63 #define CPC700_UIC_UICSR 0xff500880 /* Status Reg (Rd/Clr)*/
64 #define CPC700_UIC_UICSRS 0xff500884 /* Status Reg (Set) */
65 #define CPC700_UIC_UICER 0xff500888 /* Enable Reg */
66 #define CPC700_UIC_UICCR 0xff50088c /* Critical Reg */
67 #define CPC700_UIC_UICPR 0xff500890 /* Polarity Reg */
68 #define CPC700_UIC_UICTR 0xff500894 /* Trigger Reg */
69 #define CPC700_UIC_UICMSR 0xff500898 /* Masked Status Reg */
70 #define CPC700_UIC_UICVR 0xff50089c /* Vector Reg */
71 #define CPC700_UIC_UICVCR 0xff5008a0 /* Vector Config Reg */
73 #define CPC700_UIC_UICER_ENABLE 0x00000001 /* Enable an IRQ */
75 #define CPC700_UIC_UICVCR_31_HI 0x00000000 /* IRQ 31 hi priority */
76 #define CPC700_UIC_UICVCR_0_HI 0x00000001 /* IRQ 0 hi priority */
77 #define CPC700_UIC_UICVCR_BASE_MASK 0xfffffffc
78 #define CPC700_UIC_UICVCR_ORDER_MASK 0x00000001
80 /* Specify value of a bit for an IRQ. */
81 #define CPC700_UIC_IRQ_BIT(i) ((0x00000001) << (31 - (i)))
86 extern struct hw_interrupt_type cpc700_pic;
87 extern unsigned int cpc700_irq_assigns[32][2];
89 extern void __init cpc700_init_IRQ(void);
90 extern int cpc700_get_irq(struct pt_regs *);
92 #endif /* _ASMPPC_CPC700_H */