2 * arch/ppc/platforms/pmac_feature.c
4 * Copyright (C) 1996-2001 Paul Mackerras (paulus@cs.anu.edu.au)
5 * Ben. Herrenschmidt (benh@kernel.crashing.org)
7 * This program is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU General Public License
9 * as published by the Free Software Foundation; either version
10 * 2 of the License, or (at your option) any later version.
14 * - Replace mdelay with some schedule loop if possible
15 * - Shorten some obfuscated delays on some routines (like modem
17 * - Refcount some clocks (see darwin)
18 * - Split split split...
21 #include <linux/config.h>
22 #include <linux/types.h>
23 #include <linux/init.h>
24 #include <linux/delay.h>
25 #include <linux/kernel.h>
26 #include <linux/sched.h>
27 #include <linux/spinlock.h>
28 #include <linux/adb.h>
29 #include <linux/pmu.h>
30 #include <linux/ioport.h>
31 #include <linux/pci.h>
32 #include <asm/sections.h>
33 #include <asm/errno.h>
34 #include <asm/keylargo.h>
35 #include <asm/uninorth.h>
38 #include <asm/machdep.h>
39 #include <asm/pmac_feature.h>
40 #include <asm/dbdma.h>
41 #include <asm/pci-bridge.h>
42 #include <asm/pmac_low_i2c.h>
47 #define DBG(fmt,...) printk(KERN_DEBUG fmt)
53 * We use a single global lock to protect accesses. Each driver has
54 * to take care of its own locking
56 static spinlock_t feature_lock __pmacdata = SPIN_LOCK_UNLOCKED;
58 #define LOCK(flags) spin_lock_irqsave(&feature_lock, flags);
59 #define UNLOCK(flags) spin_unlock_irqrestore(&feature_lock, flags);
63 * Instance of some macio stuffs
65 struct macio_chip macio_chips[MAX_MACIO_CHIPS] __pmacdata;
67 struct macio_chip* __pmac
68 macio_find(struct device_node* child, int type)
73 for (i=0; i < MAX_MACIO_CHIPS && macio_chips[i].of_node; i++)
74 if (child == macio_chips[i].of_node &&
75 (!type || macio_chips[i].type == type))
76 return &macio_chips[i];
77 child = child->parent;
82 static const char* macio_names[] __pmacdata =
100 * Uninorth reg. access. Note that Uni-N regs are big endian
103 #define UN_REG(r) (uninorth_base + ((r) >> 2))
104 #define UN_IN(r) (in_be32(UN_REG(r)))
105 #define UN_OUT(r,v) (out_be32(UN_REG(r), (v)))
106 #define UN_BIS(r,v) (UN_OUT((r), UN_IN(r) | (v)))
107 #define UN_BIC(r,v) (UN_OUT((r), UN_IN(r) & ~(v)))
109 static struct device_node* uninorth_node __pmacdata;
110 static u32* uninorth_base __pmacdata;
111 static u32 uninorth_rev __pmacdata;
114 extern struct pci_dev *k2_skiplist[2];
117 * For each motherboard family, we have a table of functions pointers
118 * that handle the various features.
121 typedef long (*feature_call)(struct device_node* node, long param, long value);
123 struct feature_table_entry {
124 unsigned int selector;
125 feature_call function;
130 const char* model_string;
131 const char* model_name;
133 struct feature_table_entry* features;
134 unsigned long board_flags;
136 static struct pmac_mb_def pmac_mb __pmacdata;
139 * Here are the chip specific feature functions
143 static long __pmac g5_read_gpio(struct device_node* node, long param, long value)
145 struct macio_chip* macio = &macio_chips[0];
147 return MACIO_IN8(param);
151 static long __pmac g5_write_gpio(struct device_node* node, long param, long value)
153 struct macio_chip* macio = &macio_chips[0];
155 MACIO_OUT8(param, (u8)(value & 0xff));
159 static long __pmac g5_gmac_enable(struct device_node* node, long param, long value)
161 struct macio_chip* macio = &macio_chips[0];
163 struct pci_dev *pdev = NULL;
168 /* XXX FIXME: We should fix pci_device_from_OF_node here, and
169 * get to a real pci_dev or we'll get into trouble with PCI
170 * domains the day we get overlapping numbers (like if we ever
171 * decide to show the HT root.
172 * Note that we only get the slot when value is 0. This is called
173 * early during boot with value 1 to enable all devices, at which
174 * point, we don't yet have probed pci_find_slot, so it would fail
175 * to look for the slot at this point.
178 pdev = pci_find_slot(node->busno, node->devfn);
182 MACIO_BIS(KEYLARGO_FCR1, K2_FCR1_GMAC_CLK_ENABLE);
184 k2_skiplist[0] = NULL;
186 k2_skiplist[0] = pdev;
188 MACIO_BIC(KEYLARGO_FCR1, K2_FCR1_GMAC_CLK_ENABLE);
197 static long __pmac g5_fw_enable(struct device_node* node, long param, long value)
199 struct macio_chip* macio = &macio_chips[0];
201 struct pci_dev *pdev = NULL;
203 /* XXX FIXME: We should fix pci_device_from_OF_node here, and
204 * get to a real pci_dev or we'll get into trouble with PCI
205 * domains the day we get overlapping numbers (like if we ever
206 * decide to show the HT root
207 * Note that we only get the slot when value is 0. This is called
208 * early during boot with value 1 to enable all devices, at which
209 * point, we don't yet have probed pci_find_slot, so it would fail
210 * to look for the slot at this point.
216 pdev = pci_find_slot(node->busno, node->devfn);
220 MACIO_BIS(KEYLARGO_FCR1, K2_FCR1_FW_CLK_ENABLE);
222 k2_skiplist[1] = NULL;
224 k2_skiplist[1] = pdev;
226 MACIO_BIC(KEYLARGO_FCR1, K2_FCR1_FW_CLK_ENABLE);
235 static long __pmac g5_mpic_enable(struct device_node* node, long param, long value)
239 if (node->parent == NULL || strcmp(node->parent->name, "u3"))
243 UN_BIS(U3_TOGGLE_REG, U3_MPIC_RESET | U3_MPIC_OUTPUT_ENABLE);
250 static long __pmac g5_reset_cpu(struct device_node* node, long param, long value)
252 unsigned int reset_io = 0;
254 struct macio_chip* macio;
255 struct device_node* np;
257 macio = &macio_chips[0];
258 if (macio->type != macio_keylargo2)
261 np = find_path_device("/cpus");
264 for (np = np->child; np != NULL; np = np->sibling) {
265 u32* num = (u32 *)get_property(np, "reg", NULL);
266 u32* rst = (u32 *)get_property(np, "soft-reset", NULL);
267 if (num == NULL || rst == NULL)
274 if (np == NULL || reset_io == 0)
278 MACIO_OUT8(reset_io, KEYLARGO_GPIO_OUTPUT_ENABLE);
279 (void)MACIO_IN8(reset_io);
281 MACIO_OUT8(reset_io, 0);
282 (void)MACIO_IN8(reset_io);
287 #endif /* CONFIG_SMP */
290 * This can be called from pmac_smp so isn't static
292 * This takes the second CPU off the bus on dual CPU machines
295 void __pmac g5_phy_disable_cpu1(void)
297 UN_OUT(U3_API_PHY_CONFIG_1, 0);
300 static long __pmac generic_get_mb_info(struct device_node* node, long param, long value)
303 case PMAC_MB_INFO_MODEL:
304 return pmac_mb.model_id;
305 case PMAC_MB_INFO_FLAGS:
306 return pmac_mb.board_flags;
307 case PMAC_MB_INFO_NAME:
308 /* hack hack hack... but should work */
309 *((const char **)value) = pmac_mb.model_name;
320 /* Used on any machine
322 static struct feature_table_entry any_features[] __pmacdata = {
323 { PMAC_FTR_GET_MB_INFO, generic_get_mb_info },
329 static struct feature_table_entry g5_features[] __pmacdata = {
330 { PMAC_FTR_GMAC_ENABLE, g5_gmac_enable },
331 { PMAC_FTR_1394_ENABLE, g5_fw_enable },
332 { PMAC_FTR_ENABLE_MPIC, g5_mpic_enable },
333 { PMAC_FTR_READ_GPIO, g5_read_gpio },
334 { PMAC_FTR_WRITE_GPIO, g5_write_gpio },
336 { PMAC_FTR_RESET_CPU, g5_reset_cpu },
337 #endif /* CONFIG_SMP */
341 static struct pmac_mb_def pmac_mb_defs[] __pmacdata = {
342 { "PowerMac7,2", "PowerMac G5",
343 PMAC_TYPE_POWERMAC_G5, g5_features,
346 { "RackMac3,1", "XServe G5",
347 PMAC_TYPE_POWERMAC_G5, g5_features,
353 * The toplevel feature_call callback
355 long __pmac pmac_do_feature_call(unsigned int selector, ...)
357 struct device_node* node;
360 feature_call func = NULL;
363 if (pmac_mb.features)
364 for (i=0; pmac_mb.features[i].function; i++)
365 if (pmac_mb.features[i].selector == selector) {
366 func = pmac_mb.features[i].function;
370 for (i=0; any_features[i].function; i++)
371 if (any_features[i].selector == selector) {
372 func = any_features[i].function;
378 va_start(args, selector);
379 node = (struct device_node*)va_arg(args, void*);
380 param = va_arg(args, long);
381 value = va_arg(args, long);
384 return func(node, param, value);
387 static int __init probe_motherboard(void)
390 struct macio_chip* macio = &macio_chips[0];
391 const char* model = NULL;
392 struct device_node *dt;
394 /* Lookup known motherboard type in device-tree. First try an
395 * exact match on the "model" property, then try a "compatible"
396 * match is none is found.
398 dt = find_devices("device-tree");
400 model = (const char *) get_property(dt, "model", NULL);
401 for(i=0; model && i<(sizeof(pmac_mb_defs)/sizeof(struct pmac_mb_def)); i++) {
402 if (strcmp(model, pmac_mb_defs[i].model_string) == 0) {
403 pmac_mb = pmac_mb_defs[i];
407 for(i=0; i<(sizeof(pmac_mb_defs)/sizeof(struct pmac_mb_def)); i++) {
408 if (machine_is_compatible(pmac_mb_defs[i].model_string)) {
409 pmac_mb = pmac_mb_defs[i];
414 /* Fallback to selection depending on mac-io chip type */
415 switch(macio->type) {
416 case macio_keylargo2:
417 pmac_mb.model_id = PMAC_TYPE_UNKNOWN_K2;
418 pmac_mb.model_name = "Unknown K2-based";
419 pmac_mb.features = g5_features;
425 /* Check for "mobile" machine */
426 if (model && (strncmp(model, "PowerBook", 9) == 0
427 || strncmp(model, "iBook", 5) == 0))
428 pmac_mb.board_flags |= PMAC_MB_MOBILE;
431 printk(KERN_INFO "PowerMac motherboard: %s\n", pmac_mb.model_name);
435 /* Initialize the Core99 UniNorth host bridge and memory controller
437 static void __init probe_uninorth(void)
439 uninorth_node = of_find_node_by_name(NULL, "u3");
440 if (uninorth_node && uninorth_node->n_addrs > 0) {
441 /* Small hack until I figure out if parsing in prom.c is correct. I should
442 * get rid of those pre-parsed junk anyway
444 unsigned long address = uninorth_node->addrs[0].address;
445 uninorth_base = ioremap(address, 0x40000);
446 uninorth_rev = in_be32(UN_REG(UNI_N_VERSION));
447 u3_ht = ioremap(address + U3_HT_CONFIG_BASE, 0x1000);
449 uninorth_node = NULL;
454 printk(KERN_INFO "Found U3 memory controller & host bridge, revision: %d\n",
456 printk(KERN_INFO "Mapped at 0x%08lx\n", (unsigned long)uninorth_base);
460 static void __init probe_one_macio(const char* name, const char* compat, int type)
462 struct device_node* node;
467 node = find_devices(name);
468 if (!node || !node->n_addrs)
472 if (device_is_compatible(node, compat))
478 for(i=0; i<MAX_MACIO_CHIPS; i++) {
479 if (!macio_chips[i].of_node)
481 if (macio_chips[i].of_node == node)
484 if (i >= MAX_MACIO_CHIPS) {
485 printk(KERN_ERR "pmac_feature: Please increase MAX_MACIO_CHIPS !\n");
486 printk(KERN_ERR "pmac_feature: %s skipped\n", node->full_name);
489 base = (volatile u32*)ioremap(node->addrs[0].address, node->addrs[0].size);
491 printk(KERN_ERR "pmac_feature: Can't map mac-io chip !\n");
494 if (type == macio_keylargo) {
495 u32* did = (u32 *)get_property(node, "device-id", NULL);
496 if (*did == 0x00000025)
498 if (*did == 0x0000003e)
499 type = macio_intrepid;
501 macio_chips[i].of_node = node;
502 macio_chips[i].type = type;
503 macio_chips[i].base = base;
504 macio_chips[i].flags = MACIO_FLAG_SCCB_ON | MACIO_FLAG_SCCB_ON;
505 macio_chips[i].name = macio_names[type];
506 revp = (u32 *)get_property(node, "revision-id", NULL);
508 macio_chips[i].rev = *revp;
509 printk(KERN_INFO "Found a %s mac-io controller, rev: %d, mapped at 0x%p\n",
510 macio_names[type], macio_chips[i].rev, macio_chips[i].base);
516 probe_one_macio("mac-io", "K2-Keylargo", macio_keylargo2);
518 macio_chips[0].lbus.index = 0;
519 macio_chips[1].lbus.index = 1;
521 return (macio_chips[0].of_node == NULL) ? -ENODEV : 0;
525 set_initial_features(void)
527 struct device_node *np;
529 if (macio_chips[0].type == macio_keylargo2) {
531 /* On SMP machines running UP, we have the second CPU eating
532 * bus cycles. We need to take it off the bus. This is done
533 * from pmac_smp for SMP kernels running on one CPU
535 np = of_find_node_by_type(NULL, "cpu");
537 np = of_find_node_by_type(np, "cpu");
539 g5_phy_disable_cpu1();
542 #endif /* CONFIG_SMP */
543 /* Enable GMAC for now for PCI probing. It will be disabled
544 * later on after PCI probe
546 np = of_find_node_by_name(NULL, "ethernet");
548 if (device_is_compatible(np, "K2-GMAC"))
549 g5_gmac_enable(np, 0, 1);
550 np = of_find_node_by_name(np, "ethernet");
553 /* Enable FW before PCI probe. Will be disabled later on
554 * Note: We should have a batter way to check that we are
555 * dealing with uninorth internal cell and not a PCI cell
556 * on the external PCI. The code below works though.
558 np = of_find_node_by_name(NULL, "firewire");
560 if (device_is_compatible(np, "pci106b,5811")) {
561 macio_chips[0].flags |= MACIO_FLAG_FW_SUPPORTED;
562 g5_fw_enable(np, 0, 1);
564 np = of_find_node_by_name(np, "firewire");
570 pmac_feature_init(void)
572 /* Detect the UniNorth memory controller */
575 /* Probe mac-io controllers */
576 if (probe_macios()) {
577 printk(KERN_WARNING "No mac-io chip found\n");
581 /* Setup low-level i2c stuffs */
584 /* Probe machine type */
585 if (probe_motherboard())
586 printk(KERN_WARNING "Unknown PowerMac !\n");
588 /* Set some initial features (turn off some chips that will
589 * be later turned on)
591 set_initial_features();
594 int __init pmac_feature_late_init(void)
597 struct device_node* np;
599 /* Request some resources late */
601 request_OF_resource(uninorth_node, 0, NULL);
602 np = find_devices("hammerhead");
604 request_OF_resource(np, 0, NULL);
605 np = find_devices("interrupt-controller");
607 request_OF_resource(np, 0, NULL);
612 device_initcall(pmac_feature_late_init);
615 static void dump_HT_speeds(char *name, u32 cfg, u32 frq)
617 int freqs[16] = { 200,300,400,500,600,800,1000,0,0,0,0,0,0,0,0,0 };
618 int bits[8] = { 8,16,0,32,2,4,0,0 };
619 int freq = (frq >> 8) & 0xf;
621 if (freqs[freq] == 0)
622 printk("%s: Unknown HT link frequency %x\n", name, freq);
624 printk("%s: %d MHz on main link, (%d in / %d out) bits width\n",
626 bits[(cfg >> 28) & 0x7], bits[(cfg >> 24) & 0x7]);
629 void __init pmac_check_ht_link(void)
631 #if 0 /* Disabled for now */
632 u32 ufreq, freq, ucfg, cfg;
633 struct device_node *pcix_node;
635 struct pci_controller *px_hose;
637 (void)in_be32(u3_ht + U3_HT_LINK_COMMAND);
638 ucfg = cfg = in_be32(u3_ht + U3_HT_LINK_CONFIG);
639 ufreq = freq = in_be32(u3_ht + U3_HT_LINK_FREQ);
640 dump_HT_speeds("U3 HyperTransport", cfg, freq);
642 pcix_node = of_find_compatible_node(NULL, "pci", "pci-x");
643 if (pcix_node == NULL) {
644 printk("No PCI-X bridge found\n");
647 px_hose = pcix_node->phb;
648 px_bus = pcix_node->busno;
649 px_devfn = pcix_node->devfn;
651 early_read_config_dword(px_hose, px_bus, px_devfn, 0xc4, &cfg);
652 early_read_config_dword(px_hose, px_bus, px_devfn, 0xcc, &freq);
653 dump_HT_speeds("PCI-X HT Uplink", cfg, freq);
654 early_read_config_dword(px_hose, px_bus, px_devfn, 0xc8, &cfg);
655 early_read_config_dword(px_hose, px_bus, px_devfn, 0xd0, &freq);
656 dump_HT_speeds("PCI-X HT Downlink", cfg, freq);