2 * PowerPC64 port by Mike Corrigan and Dave Engebretsen
3 * {mikejc|engebret}@us.ibm.com
5 * Copyright (c) 2000 Mike Corrigan <mikejc@us.ibm.com>
7 * SMP scalability work:
8 * Copyright (C) 2001 Anton Blanchard <anton@au.ibm.com>, IBM
13 * PowerPC Hashed Page Table functions
15 * This program is free software; you can redistribute it and/or
16 * modify it under the terms of the GNU General Public License
17 * as published by the Free Software Foundation; either version
18 * 2 of the License, or (at your option) any later version.
21 #include <linux/config.h>
22 #include <linux/spinlock.h>
23 #include <linux/errno.h>
24 #include <linux/sched.h>
25 #include <linux/proc_fs.h>
26 #include <linux/stat.h>
27 #include <linux/sysctl.h>
28 #include <linux/ctype.h>
29 #include <linux/cache.h>
30 #include <linux/init.h>
32 #include <asm/ppcdebug.h>
33 #include <asm/processor.h>
34 #include <asm/pgtable.h>
36 #include <asm/mmu_context.h>
38 #include <asm/types.h>
39 #include <asm/system.h>
40 #include <asm/uaccess.h>
42 #include <asm/machdep.h>
44 #include <asm/abs_addr.h>
45 #include <asm/tlbflush.h>
49 #include <asm/cacheflush.h>
50 #include <asm/cputable.h>
51 #include <asm/abs_addr.h>
54 * Note: pte --> Linux PTE
55 * HPTE --> PowerPC Hashed Page Table Entry
58 * htab_initialize is called with the MMU off (of course), but
59 * the kernel has been copied down to zero so it can directly
60 * reference global data. At this point it is very difficult
61 * to print debug info.
65 #ifdef CONFIG_PMAC_DART
66 extern unsigned long dart_tablebase;
67 #endif /* CONFIG_PMAC_DART */
69 HTAB htab_data = {NULL, 0, 0, 0, 0};
71 extern unsigned long _SDR1;
76 static inline void loop_forever(void)
78 volatile unsigned long x = 1;
83 #ifdef CONFIG_PPC_PSERIES
84 static inline void create_pte_mapping(unsigned long start, unsigned long end,
85 unsigned long mode, int large)
95 for (addr = start; addr < end; addr += step) {
96 unsigned long vpn, hash, hpteg;
97 unsigned long vsid = get_kernel_vsid(addr);
98 unsigned long va = (vsid << 28) | (addr & 0xfffffff);
102 vpn = va >> LARGE_PAGE_SHIFT;
104 vpn = va >> PAGE_SHIFT;
106 hash = hpt_hash(vpn, large);
108 hpteg = ((hash & htab_data.htab_hash_mask)*HPTES_PER_GROUP);
110 if (systemcfg->platform == PLATFORM_PSERIES_LPAR)
111 ret = pSeries_lpar_hpte_insert(hpteg, va,
112 virt_to_abs(addr) >> PAGE_SHIFT,
115 ret = pSeries_hpte_insert(hpteg, va,
116 virt_to_abs(addr) >> PAGE_SHIFT,
120 ppc64_terminate_msg(0x20, "create_pte_mapping");
126 void __init htab_initialize(void)
128 unsigned long table, htab_size_bytes;
129 unsigned long pteg_count;
130 unsigned long mode_rw;
131 int i, use_largepages = 0;
134 * Calculate the required size of the htab. We want the number of
135 * PTEGs to equal one half the number of real pages.
137 htab_size_bytes = 1UL << naca->pftSize;
138 pteg_count = htab_size_bytes >> 7;
140 /* For debug, make the HTAB 1/8 as big as it normally would be. */
141 ifppcdebug(PPCDBG_HTABSIZE) {
143 htab_size_bytes = pteg_count << 7;
146 htab_data.htab_num_ptegs = pteg_count;
147 htab_data.htab_hash_mask = pteg_count - 1;
149 if (systemcfg->platform == PLATFORM_PSERIES ||
150 systemcfg->platform == PLATFORM_POWERMAC) {
151 /* Find storage for the HPT. Must be contiguous in
152 * the absolute address space.
154 table = lmb_alloc(htab_size_bytes, htab_size_bytes);
156 ppc64_terminate_msg(0x20, "hpt space");
159 htab_data.htab = abs_to_virt(table);
161 /* htab absolute addr + encoded htabsize */
162 _SDR1 = table + __ilog2(pteg_count) - 11;
164 /* Initialize the HPT with no entries */
165 memset((void *)table, 0, htab_size_bytes);
167 /* Using a hypervisor which owns the htab */
168 htab_data.htab = NULL;
172 mode_rw = _PAGE_ACCESSED | _PAGE_COHERENT | PP_RWXX;
174 /* On U3 based machines, we need to reserve the DART area and
175 * _NOT_ map it to avoid cache paradoxes as it's remapped non
178 if (cur_cpu_spec->cpu_features & CPU_FTR_16M_PAGE)
181 /* add all physical memory to the bootmem map */
182 for (i=0; i < lmb.memory.cnt; i++) {
183 unsigned long base, size;
185 base = lmb.memory.region[i].physbase + KERNELBASE;
186 size = lmb.memory.region[i].size;
188 #ifdef CONFIG_PMAC_DART
189 /* Do not map the DART space. Fortunately, it will be aligned
190 * in such a way that it will not cross two lmb regions and will
191 * fit within a single 16Mb page.
192 * The DART space is assumed to be a full 16Mb region even if we
193 * only use 2Mb of that space. We will use more of it later for
194 * AGP GART. We have to use a full 16Mb large page.
196 if (dart_tablebase != 0 && dart_tablebase >= base
197 && dart_tablebase < (base + size)) {
198 if (base != dart_tablebase)
199 create_pte_mapping(base, dart_tablebase, mode_rw,
201 if ((base + size) > (dart_tablebase + 16*MB))
202 create_pte_mapping(dart_tablebase + 16*MB, base + size,
203 mode_rw, use_largepages);
206 #endif /* CONFIG_PMAC_DART */
207 create_pte_mapping(base, base + size, mode_rw, use_largepages);
215 * Called by asm hashtable.S for doing lazy icache flush
217 unsigned int hash_page_do_lazy_icache(unsigned int pp, pte_t pte, int trap)
221 #define PPC64_HWNOEXEC (1 << 2)
223 if (!pfn_valid(pte_pfn(pte)))
226 page = pte_page(pte);
229 if (!test_bit(PG_arch_1, &page->flags) && !PageReserved(page)) {
231 __flush_dcache_icache(page_address(page));
232 set_bit(PG_arch_1, &page->flags);
234 pp |= PPC64_HWNOEXEC;
240 * Called by asm hashtable.S in case of critical insert failure
242 void htab_insert_failure(void)
244 panic("hash_page: pte_insert failed\n");
247 int hash_page(unsigned long ea, unsigned long access, unsigned long trap)
251 struct mm_struct *mm;
259 /* Check for invalid addresses. */
260 if (!IS_VALID_EA(ea))
263 switch (REGION_ID(ea)) {
270 vsid = get_vsid(mm->context.id, ea);
274 vsid = get_kernel_vsid(ea);
276 case VMALLOC_REGION_ID:
278 vsid = get_kernel_vsid(ea);
283 * Should only be hit if there is an access to MMIO space
284 * which is protected by EEH.
285 * Send the problem up to do_page_fault
287 case KERNEL_REGION_ID:
289 * Should never get here - entire 0xC0... region is bolted.
290 * Send the problem up to do_page_fault
295 * Send the problem up to do_page_fault
307 tmp = cpumask_of_cpu(cpu);
308 if (user_region && cpus_equal(mm->cpu_vm_mask, tmp))
311 /* Is this a huge page ? */
312 if (unlikely(in_hugepage_area(mm->context, ea)))
313 ret = hash_huge_page(mm, access, ea, vsid, local);
315 ptep = find_linux_pte(pgdir, ea);
320 ret = __hash_page(ea, access, vsid, ptep, trap, local);
327 void flush_hash_page(unsigned long context, unsigned long ea, pte_t pte,
330 unsigned long vsid, vpn, va, hash, secondary, slot;
332 /* XXX fix for large ptes */
333 unsigned long large = 0;
335 if ((ea >= USER_START) && (ea <= USER_END))
336 vsid = get_vsid(context, ea);
338 vsid = get_kernel_vsid(ea);
340 va = (vsid << 28) | (ea & 0x0fffffff);
342 vpn = va >> LARGE_PAGE_SHIFT;
344 vpn = va >> PAGE_SHIFT;
345 hash = hpt_hash(vpn, large);
346 secondary = (pte_val(pte) & _PAGE_SECONDARY) >> 15;
349 slot = (hash & htab_data.htab_hash_mask) * HPTES_PER_GROUP;
350 slot += (pte_val(pte) & _PAGE_GROUP_IX) >> 12;
352 ppc_md.hpte_invalidate(slot, va, large, local);
355 void flush_hash_range(unsigned long context, unsigned long number, int local)
357 if (ppc_md.flush_hash_range) {
358 ppc_md.flush_hash_range(context, number, local);
361 struct ppc64_tlb_batch *batch = &__get_cpu_var(ppc64_tlb_batch);
363 for (i = 0; i < number; i++)
364 flush_hash_page(context, batch->addr[i], batch->pte[i],
369 static inline void make_bl(unsigned int *insn_addr, void *func)
371 unsigned long funcp = *((unsigned long *)func);
372 int offset = funcp - (unsigned long)insn_addr;
374 *insn_addr = (unsigned int)(0x48000001 | (offset & 0x03fffffc));
375 flush_icache_range((unsigned long)insn_addr, 4+
376 (unsigned long)insn_addr);
379 void __init htab_finish_init(void)
381 extern unsigned int *htab_call_hpte_insert1;
382 extern unsigned int *htab_call_hpte_insert2;
383 extern unsigned int *htab_call_hpte_remove;
384 extern unsigned int *htab_call_hpte_updatepp;
386 make_bl(htab_call_hpte_insert1, ppc_md.hpte_insert);
387 make_bl(htab_call_hpte_insert2, ppc_md.hpte_insert);
388 make_bl(htab_call_hpte_remove, ppc_md.hpte_remove);
389 make_bl(htab_call_hpte_updatepp, ppc_md.hpte_updatepp);