2 * arch/s390/kernel/entry.S
3 * S390 low-level entry points.
6 * Copyright (C) 1999,2000 IBM Deutschland Entwicklung GmbH, IBM Corporation
7 * Author(s): Martin Schwidefsky (schwidefsky@de.ibm.com),
8 * Hartmut Penner (hp@de.ibm.com),
9 * Denis Joseph Barrow (djbarrow@de.ibm.com,barrow_dj@yahoo.com),
12 #include <linux/sys.h>
13 #include <linux/linkage.h>
14 #include <linux/config.h>
15 #include <asm/cache.h>
16 #include <asm/lowcore.h>
17 #include <asm/errno.h>
18 #include <asm/ptrace.h>
19 #include <asm/thread_info.h>
20 #include <asm/offsets.h>
21 #include <asm/unistd.h>
24 * Stack layout for the system_call stack entry.
25 * The first few entries are identical to the user_regs_struct.
27 SP_PTREGS = STACK_FRAME_OVERHEAD
28 SP_ARGS = STACK_FRAME_OVERHEAD + __PT_ARGS
29 SP_PSW = STACK_FRAME_OVERHEAD + __PT_PSW
30 SP_R0 = STACK_FRAME_OVERHEAD + __PT_GPRS
31 SP_R1 = STACK_FRAME_OVERHEAD + __PT_GPRS + 4
32 SP_R2 = STACK_FRAME_OVERHEAD + __PT_GPRS + 8
33 SP_R3 = STACK_FRAME_OVERHEAD + __PT_GPRS + 12
34 SP_R4 = STACK_FRAME_OVERHEAD + __PT_GPRS + 16
35 SP_R5 = STACK_FRAME_OVERHEAD + __PT_GPRS + 20
36 SP_R6 = STACK_FRAME_OVERHEAD + __PT_GPRS + 24
37 SP_R7 = STACK_FRAME_OVERHEAD + __PT_GPRS + 28
38 SP_R8 = STACK_FRAME_OVERHEAD + __PT_GPRS + 32
39 SP_R9 = STACK_FRAME_OVERHEAD + __PT_GPRS + 36
40 SP_R10 = STACK_FRAME_OVERHEAD + __PT_GPRS + 40
41 SP_R11 = STACK_FRAME_OVERHEAD + __PT_GPRS + 44
42 SP_R12 = STACK_FRAME_OVERHEAD + __PT_GPRS + 48
43 SP_R13 = STACK_FRAME_OVERHEAD + __PT_GPRS + 52
44 SP_R14 = STACK_FRAME_OVERHEAD + __PT_GPRS + 56
45 SP_R15 = STACK_FRAME_OVERHEAD + __PT_GPRS + 60
46 SP_ORIG_R2 = STACK_FRAME_OVERHEAD + __PT_ORIG_GPR2
47 SP_ILC = STACK_FRAME_OVERHEAD + __PT_ILC
48 SP_TRAP = STACK_FRAME_OVERHEAD + __PT_TRAP
49 SP_SIZE = STACK_FRAME_OVERHEAD + __PT_SIZE
51 _TIF_WORK_SVC = (_TIF_SIGPENDING | _TIF_NEED_RESCHED | \
52 _TIF_RESTART_SVC | _TIF_SINGLE_STEP )
53 _TIF_WORK_INT = (_TIF_SIGPENDING | _TIF_NEED_RESCHED)
55 #define BASED(name) name-system_call(%r13)
58 * Register usage in interrupt handlers:
59 * R9 - pointer to current task structure
60 * R13 - pointer to literal pool
61 * R14 - return register for function calls
62 * R15 - kernel stack pointer
65 .macro SAVE_ALL_BASE savearea
66 stm %r12,%r15,\savearea
67 l %r13,__LC_SVC_NEW_PSW+4 # load &system_call to %r13
70 .macro SAVE_ALL psworg,savearea,sync
73 tm \psworg+1,0x01 # test problem state bit
74 bz BASED(2f) # skip stack setup save
75 l %r15,__LC_KERNEL_STACK # problem state -> load ksp
77 tm \psworg+1,0x01 # test problem state bit
78 bnz BASED(1f) # from user -> load async stack
79 clc \psworg+4(4),BASED(.Lcritical_end)
81 clc \psworg+4(4),BASED(.Lcritical_start)
83 l %r14,BASED(.Lcleanup_critical)
85 tm 0(%r12),0x01 # retest problem state after cleanup
87 0: l %r14,__LC_ASYNC_STACK # are we already on the async stack ?
91 1: l %r15,__LC_ASYNC_STACK
93 2: s %r15,BASED(.Lc_spsize) # make room for registers & psw
94 mvc SP_PSW(8,%r15),0(%r12) # move user PSW to stack
96 st %r2,SP_ORIG_R2(%r15) # store original content of gpr 2
97 icm %r12,12,__LC_SVC_ILC
98 stm %r0,%r11,SP_R0(%r15) # store gprs %r0-%r11 to kernel stack
100 mvc SP_R12(16,%r15),\savearea # move %r12-%r15 to stack
102 st %r12,0(%r15) # clear back chain
105 .macro RESTORE_ALL sync
106 mvc __LC_RETURN_PSW(8),SP_PSW(%r15) # move user PSW to lowcore
108 ni __LC_RETURN_PSW+1,0xfd # clear wait state bit
110 lm %r0,%r15,SP_R0(%r15) # load gprs 0-15 of user
111 lpsw __LC_RETURN_PSW # back to caller
115 * Scheduler resume function, called by switch_to
116 * gpr2 = (task_struct *) prev
117 * gpr3 = (task_struct *) next
125 tm __THREAD_per(%r3),0xe8 # new process is using per ?
126 bz __switch_to_noper-__switch_to_base(%r1) # if not we're fine
127 stctl %c9,%c11,24(%r15) # We are using per stuff
128 clc __THREAD_per(12,%r3),24(%r15)
129 be __switch_to_noper-__switch_to_base(%r1) # we got away w/o bashing TLB's
130 lctl %c9,%c11,__THREAD_per(%r3) # Nope we didn't
132 stm %r6,%r15,24(%r15) # store __switch_to registers of prev task
133 st %r15,__THREAD_ksp(%r2) # store kernel stack to prev->tss.ksp
134 l %r15,__THREAD_ksp(%r3) # load kernel stack from next->tss.ksp
135 lm %r6,%r15,24(%r15) # load __switch_to registers of next task
136 st %r3,__LC_CURRENT # __LC_CURRENT = current task struct
137 l %r3,__THREAD_info(%r3) # load thread_info from task struct
138 st %r3,__LC_THREAD_INFO
140 st %r3,__LC_KERNEL_STACK # __LC_KERNEL_STACK = new kernel stack
144 * do_softirq calling function. We want to run the softirq functions on the
145 * asynchronous interrupt stack.
147 .global do_call_softirq
150 stm %r12,%r15,28(%r15)
154 l %r0,__LC_ASYNC_STACK
157 be 0f-do_call_base(%r13)
158 l %r15,__LC_ASYNC_STACK
159 0: sl %r15,.Lc_overhead-do_call_base(%r13)
160 st %r12,0(%r15) # store backchain
161 l %r1,.Ldo_softirq-do_call_base(%r13)
163 lm %r12,%r15,28(%r12)
169 * SVC interrupt handler routine. System calls are synchronous events and
170 * are executed with interrupts enabled.
175 SAVE_ALL_BASE __LC_SAVE_AREA
176 SAVE_ALL __LC_SVC_OLD_PSW,__LC_SAVE_AREA,1
177 lh %r7,0x8a # get svc number from lowcore
179 l %r9,__LC_THREAD_INFO # load pointer to thread_info struct
180 sla %r7,2 # *4 and test for svc 0
181 bnz BASED(sysc_nr_ok) # svc number > 0
182 # svc 0: system call number in %r1
183 cl %r1,BASED(.Lnr_syscalls)
184 bnl BASED(sysc_nr_ok)
185 lr %r7,%r1 # copy svc number to %r7
188 mvc SP_ARGS(4,%r15),SP_R7(%r15)
190 tm __TI_flags+3(%r9),(_TIF_SYSCALL_TRACE|_TIF_SYSCALL_AUDIT)
191 l %r8,sys_call_table-system_call(%r7,%r13) # get system call addr.
192 bnz BASED(sysc_tracesys)
193 basr %r14,%r8 # call sys_xxxx
194 st %r2,SP_R2(%r15) # store return value (change R2 on stack)
195 # ATTENTION: check sys_execve_glue before
196 # changing anything here !!
199 tm SP_PSW+1(%r15),0x01 # returning to user ?
200 bno BASED(sysc_leave)
201 tm __TI_flags+3(%r9),_TIF_WORK_SVC
202 bnz BASED(sysc_work) # there is work to do (signals etc.)
207 # recheck if there is more work to do
210 tm __TI_flags+3(%r9),_TIF_WORK_SVC
211 bz BASED(sysc_leave) # there is no work to do
213 # One of the work bits is on. Find out which one.
216 tm __TI_flags+3(%r9),_TIF_NEED_RESCHED
217 bo BASED(sysc_reschedule)
218 tm __TI_flags+3(%r9),_TIF_SIGPENDING
219 bo BASED(sysc_sigpending)
220 tm __TI_flags+3(%r9),_TIF_RESTART_SVC
221 bo BASED(sysc_restart)
222 tm __TI_flags+3(%r9),_TIF_SINGLE_STEP
223 bo BASED(sysc_singlestep)
227 # _TIF_NEED_RESCHED is set, call schedule
230 l %r1,BASED(.Lschedule)
231 la %r14,BASED(sysc_work_loop)
232 br %r1 # call scheduler
235 # _TIF_SIGPENDING is set, call do_signal
238 ni __TI_flags+3(%r9),255-_TIF_SINGLE_STEP # clear TIF_SINGLE_STEP
239 la %r2,SP_PTREGS(%r15) # load pt_regs
240 sr %r3,%r3 # clear *oldset
241 l %r1,BASED(.Ldo_signal)
242 basr %r14,%r1 # call do_signal
243 tm __TI_flags+3(%r9),_TIF_RESTART_SVC
244 bo BASED(sysc_restart)
245 b BASED(sysc_leave) # out of here, do NOT recheck
248 # _TIF_RESTART_SVC is set, set up registers and restart svc
251 ni __TI_flags+3(%r9),255-_TIF_RESTART_SVC # clear TIF_RESTART_SVC
252 l %r7,SP_R2(%r15) # load new svc number
254 mvc SP_R2(4,%r15),SP_ORIG_R2(%r15) # restore first argument
255 lm %r2,%r6,SP_R2(%r15) # load svc arguments
256 b BASED(sysc_do_restart) # restart svc
259 # _TIF_SINGLE_STEP is set, call do_single_step
262 ni __TI_flags+3(%r9),255-_TIF_SINGLE_STEP # clear TIF_SINGLE_STEP
263 mvi SP_TRAP+1(%r15),0x28 # set trap indication to pgm check
264 la %r2,SP_PTREGS(%r15) # address of register-save area
265 l %r1,BASED(.Lhandle_per) # load adr. of per handler
266 la %r14,BASED(sysc_return) # load adr. of system return
267 br %r1 # branch to do_single_step
272 # call trace before and after sys_call
276 la %r2,SP_PTREGS(%r15) # load pt_regs
281 clc SP_R2(4,%r15),BASED(.Lnr_syscalls)
282 bnl BASED(sysc_tracenogo)
283 l %r7,SP_R2(%r15) # strace might have changed the
284 sll %r7,2 # system call
285 l %r8,sys_call_table-system_call(%r7,%r13)
287 lm %r3,%r6,SP_R3(%r15)
288 l %r2,SP_ORIG_R2(%r15)
289 basr %r14,%r8 # call sys_xxx
290 st %r2,SP_R2(%r15) # store return value
292 tm __TI_flags+3(%r9),(_TIF_SYSCALL_TRACE|_TIF_SYSCALL_AUDIT)
293 bz BASED(sysc_return)
295 la %r2,SP_PTREGS(%r15) # load pt_regs
297 la %r14,BASED(sysc_return)
301 # a new process exits the kernel with ret_from_fork
305 l %r13,__LC_SVC_NEW_PSW+4
306 l %r9,__LC_THREAD_INFO # load pointer to thread_info struct
307 l %r1,BASED(.Lschedtail)
309 stosm 24(%r15),0x03 # reenable interrupts
313 # clone, fork, vfork, exec and sigreturn need glue,
314 # because they all expect pt_regs as parameter,
315 # but are called with different parameter.
316 # return-address is set up above
319 la %r2,SP_PTREGS(%r15) # load pt_regs
321 br %r1 # branch to sys_clone
324 la %r2,SP_PTREGS(%r15) # load pt_regs
326 br %r1 # branch to sys_fork
329 la %r2,SP_PTREGS(%r15) # load pt_regs
331 br %r1 # branch to sys_vfork
334 la %r2,SP_PTREGS(%r15) # load pt_regs
335 l %r1,BASED(.Lexecve)
336 lr %r12,%r14 # save return address
337 basr %r14,%r1 # call sys_execve
338 ltr %r2,%r2 # check if execve failed
339 bnz 0(%r12) # it did fail -> store result in gpr2
340 b 4(%r12) # SKIP ST 2,SP_R2(15) after BASR 14,8
341 # in system_call/sysc_tracesys
344 la %r2,SP_PTREGS(%r15) # load pt_regs as parameter
345 l %r1,BASED(.Lsigreturn)
346 br %r1 # branch to sys_sigreturn
348 sys_rt_sigreturn_glue:
349 la %r2,SP_PTREGS(%r15) # load pt_regs as parameter
350 l %r1,BASED(.Lrt_sigreturn)
351 br %r1 # branch to sys_sigreturn
354 # sigsuspend and rt_sigsuspend need pt_regs as an additional
355 # parameter and they have to skip the store of %r2 into the
356 # user register %r2 because the return value was set in
357 # sigsuspend and rt_sigsuspend already and must not be overwritten!
361 lr %r5,%r4 # move mask back
362 lr %r4,%r3 # move history1 parameter
363 lr %r3,%r2 # move history0 parameter
364 la %r2,SP_PTREGS(%r15) # load pt_regs as first parameter
365 l %r1,BASED(.Lsigsuspend)
366 la %r14,4(%r14) # skip store of return value
367 br %r1 # branch to sys_sigsuspend
369 sys_rt_sigsuspend_glue:
370 lr %r4,%r3 # move sigsetsize parameter
371 lr %r3,%r2 # move unewset parameter
372 la %r2,SP_PTREGS(%r15) # load pt_regs as first parameter
373 l %r1,BASED(.Lrt_sigsuspend)
374 la %r14,4(%r14) # skip store of return value
375 br %r1 # branch to sys_rt_sigsuspend
377 sys_sigaltstack_glue:
378 la %r4,SP_PTREGS(%r15) # load pt_regs as parameter
379 l %r1,BASED(.Lsigaltstack)
380 br %r1 # branch to sys_sigreturn
384 * Program check handler routine
387 .globl pgm_check_handler
390 * First we need to check for a special case:
391 * Single stepping an instruction that disables the PER event mask will
392 * cause a PER event AFTER the mask has been set. Example: SVC or LPSW.
393 * For a single stepped SVC the program check handler gets control after
394 * the SVC new PSW has been loaded. But we want to execute the SVC first and
395 * then handle the PER event. Therefore we update the SVC old PSW to point
396 * to the pgm_check_handler and branch to the SVC handler after we checked
397 * if we have to load the kernel stack register.
398 * For every other possible cause for PER event without the PER mask set
399 * we just ignore the PER event (FIXME: is there anything we have to do
402 SAVE_ALL_BASE __LC_SAVE_AREA
403 tm __LC_PGM_INT_CODE+1,0x80 # check whether we got a per exception
404 bnz BASED(pgm_per) # got per exception -> special case
405 SAVE_ALL __LC_PGM_OLD_PSW,__LC_SAVE_AREA,1
406 l %r9,__LC_THREAD_INFO # load pointer to thread_info struct
407 l %r3,__LC_PGM_ILC # load program interruption code
411 l %r7,BASED(.Ljump_table)
413 l %r7,0(%r8,%r7) # load address of handler routine
414 la %r2,SP_PTREGS(%r15) # address of register-save area
415 la %r14,BASED(sysc_return)
416 br %r7 # branch to interrupt-handler
419 # handle per exception
422 tm __LC_PGM_OLD_PSW,0x40 # test if per event recording is on
423 bnz BASED(pgm_per_std) # ok, normal per event from user space
424 # ok its one of the special cases, now we need to find out which one
425 clc __LC_PGM_OLD_PSW(8),__LC_SVC_NEW_PSW
427 # no interesting special case, ignore PER event
428 lm %r12,%r15,__LC_SAVE_AREA
432 # Normal per exception
435 SAVE_ALL __LC_PGM_OLD_PSW,__LC_SAVE_AREA,1
436 l %r9,__LC_THREAD_INFO # load pointer to thread_info struct
438 mvc __THREAD_per+__PER_atmid(2,%r1),__LC_PER_ATMID
439 mvc __THREAD_per+__PER_address(4,%r1),__LC_PER_ADDRESS
440 mvc __THREAD_per+__PER_access_id(1,%r1),__LC_PER_ACCESS_ID
441 oi __TI_flags+3(%r9),_TIF_SINGLE_STEP # set TIF_SINGLE_STEP
442 l %r3,__LC_PGM_ILC # load program interruption code
444 nr %r8,%r3 # clear per-event-bit and ilc
445 be BASED(sysc_return) # only per or per+check ?
449 # it was a single stepped SVC that is causing all the trouble
452 SAVE_ALL __LC_SVC_OLD_PSW,__LC_SAVE_AREA,1
453 lh %r7,0x8a # get svc number from lowcore
454 l %r9,__LC_THREAD_INFO # load pointer to thread_info struct
456 mvc __THREAD_per+__PER_atmid(2,%r1),__LC_PER_ATMID
457 mvc __THREAD_per+__PER_address(4,%r1),__LC_PER_ADDRESS
458 mvc __THREAD_per+__PER_access_id(1,%r1),__LC_PER_ACCESS_ID
459 oi __TI_flags+3(%r9),_TIF_SINGLE_STEP # set TIF_SINGLE_STEP
460 stosm 24(%r15),0x03 # reenable interrupts
464 * IO interrupt handler routine
467 .globl io_int_handler
470 SAVE_ALL_BASE __LC_SAVE_AREA+16
471 SAVE_ALL __LC_IO_OLD_PSW,__LC_SAVE_AREA+16,0
472 l %r9,__LC_THREAD_INFO # load pointer to thread_info struct
473 l %r1,BASED(.Ldo_IRQ) # load address of do_IRQ
474 la %r2,SP_PTREGS(%r15) # address of register-save area
475 basr %r14,%r1 # branch to standard irq handler
478 tm SP_PSW+1(%r15),0x01 # returning to user ?
479 #ifdef CONFIG_PREEMPT
480 bno BASED(io_preempt) # no -> check for preemptive scheduling
482 bno BASED(io_leave) # no-> skip resched & signal
484 tm __TI_flags+3(%r9),_TIF_WORK_INT
485 bnz BASED(io_work) # there is work to do (signals etc.)
489 #ifdef CONFIG_PREEMPT
491 icm %r0,15,__TI_precount(%r9)
494 s %r1,BASED(.Lc_spsize)
495 mvc SP_PTREGS(__PT_SIZE,%r1),SP_PTREGS(%r15)
496 xc 0(4,%r1),0(%r1) # clear back chain
499 tm __TI_flags+3(%r9),_TIF_NEED_RESCHED
501 mvc __TI_precount(4,%r9),BASED(.Lc_pactive)
502 stosm 24(%r15),0x03 # reenable interrupts
503 l %r1,BASED(.Lschedule)
504 basr %r14,%r1 # call schedule
505 stnsm 24(%r15),0xfc # disable I/O and ext. interrupts
506 xc __TI_precount(4,%r9),__TI_precount(%r9)
507 b BASED(io_resume_loop)
511 # switch to kernel stack, then check the TIF bits
514 l %r1,__LC_KERNEL_STACK
515 s %r1,BASED(.Lc_spsize)
516 mvc SP_PTREGS(__PT_SIZE,%r1),SP_PTREGS(%r15)
517 xc 0(4,%r1),0(%r1) # clear back chain
520 # One of the work bits is on. Find out which one.
521 # Checked are: _TIF_SIGPENDING and _TIF_NEED_RESCHED
524 tm __TI_flags+3(%r9),_TIF_NEED_RESCHED
525 bo BASED(io_reschedule)
526 tm __TI_flags+3(%r9),_TIF_SIGPENDING
527 bo BASED(io_sigpending)
531 # _TIF_NEED_RESCHED is set, call schedule
534 l %r1,BASED(.Lschedule)
535 stosm 24(%r15),0x03 # reenable interrupts
536 basr %r14,%r1 # call scheduler
537 stnsm 24(%r15),0xfc # disable I/O and ext. interrupts
538 tm __TI_flags+3(%r9),_TIF_WORK_INT
539 bz BASED(io_leave) # there is no work to do
540 b BASED(io_work_loop)
543 # _TIF_SIGPENDING is set, call do_signal
546 stosm 24(%r15),0x03 # reenable interrupts
547 la %r2,SP_PTREGS(%r15) # load pt_regs
548 sr %r3,%r3 # clear *oldset
549 l %r1,BASED(.Ldo_signal)
550 basr %r14,%r1 # call do_signal
551 stnsm 24(%r15),0xfc # disable I/O and ext. interrupts
552 b BASED(io_leave) # out of here, do NOT recheck
555 * External interrupt handler routine
558 .globl ext_int_handler
561 SAVE_ALL_BASE __LC_SAVE_AREA+16
562 SAVE_ALL __LC_EXT_OLD_PSW,__LC_SAVE_AREA+16,0
563 l %r9,__LC_THREAD_INFO # load pointer to thread_info struct
564 la %r2,SP_PTREGS(%r15) # address of register-save area
565 lh %r3,__LC_EXT_INT_CODE # get interruption code
566 l %r1,BASED(.Ldo_extint)
571 * Machine check handler routines
574 .globl mcck_int_handler
576 SAVE_ALL_BASE __LC_SAVE_AREA+32
577 SAVE_ALL __LC_MCK_OLD_PSW,__LC_SAVE_AREA+32,0
578 l %r1,BASED(.Ls390_mcck)
579 basr %r14,%r1 # call machine check handler
585 * Restart interruption handler, kick starter for additional CPUs
587 .globl restart_int_handler
589 l %r15,__LC_SAVE_AREA+60 # load ksp
590 lctl %c0,%c15,__LC_CREGS_SAVE_AREA # get new ctl regs
591 lam %a0,%a15,__LC_AREGS_SAVE_AREA
592 stosm 0(%r15),0x04 # now we can turn dat on
593 lm %r6,%r15,24(%r15) # load registers from clone
595 l %r14,restart_addr-.(%r14)
596 br %r14 # branch to start_secondary
598 .long start_secondary
601 * If we do not run with SMP enabled, let the new CPU crash ...
603 .globl restart_int_handler
607 lpsw restart_crash-restart_base(%r1)
610 .long 0x000a0000,0x00000000
614 cleanup_table_system_call:
615 .long system_call + 0x80000000, sysc_do_svc + 0x80000000
616 cleanup_table_sysc_return:
617 .long sysc_return + 0x80000000, sysc_leave + 0x80000000
618 cleanup_table_sysc_leave:
619 .long sysc_leave + 0x80000000, sysc_work_loop + 0x80000000
620 cleanup_table_sysc_work_loop:
621 .long sysc_work_loop + 0x80000000, sysc_reschedule + 0x80000000
624 clc 4(4,%r12),BASED(cleanup_table_system_call)
626 clc 4(4,%r12),BASED(cleanup_table_system_call+4)
627 bl BASED(cleanup_system_call)
629 clc 4(4,%r12),BASED(cleanup_table_sysc_return)
631 clc 4(4,%r12),BASED(cleanup_table_sysc_return+4)
632 bl BASED(cleanup_sysc_return)
634 clc 4(4,%r12),BASED(cleanup_table_sysc_leave)
636 clc 4(4,%r12),BASED(cleanup_table_sysc_leave+4)
637 bl BASED(cleanup_sysc_leave)
639 clc 4(4,%r12),BASED(cleanup_table_sysc_work_loop)
641 clc 4(4,%r12),BASED(cleanup_table_sysc_work_loop+4)
642 bl BASED(cleanup_sysc_leave)
647 mvc __LC_RETURN_PSW(4),0(%r12)
648 clc 4(4,%r12),BASED(cleanup_table_system_call)
650 mvc __LC_SAVE_AREA(16),__LC_SAVE_AREA+16
651 0: st %r13,__LC_SAVE_AREA+20
652 SAVE_ALL __LC_SVC_OLD_PSW,__LC_SAVE_AREA,1
653 st %r15,__LC_SAVE_AREA+28
655 mvc __LC_RETURN_PSW+4(4),BASED(cleanup_table_system_call+4)
656 la %r12,__LC_RETURN_PSW
660 mvc __LC_RETURN_PSW(4),0(%r12)
661 mvc __LC_RETURN_PSW+4(4),BASED(cleanup_table_sysc_return)
662 la %r12,__LC_RETURN_PSW
666 clc 4(4,%r12),BASED(cleanup_sysc_leave_lpsw)
668 mvc __LC_RETURN_PSW(8),SP_PSW(%r15)
669 mvc __LC_SAVE_AREA+16(16),SP_R12(%r15)
670 lm %r0,%r11,SP_R0(%r15)
672 0: la %r12,__LC_RETURN_PSW
674 cleanup_sysc_leave_lpsw:
675 .long sysc_leave + 10 + 0x80000000
681 .Lc_spsize: .long SP_SIZE
682 .Lc_overhead: .long STACK_FRAME_OVERHEAD
683 .Lc_pactive: .long PREEMPT_ACTIVE
684 .Lnr_syscalls: .long NR_syscalls
685 .L0x018: .short 0x018
686 .L0x020: .short 0x020
687 .L0x028: .short 0x028
688 .L0x030: .short 0x030
689 .L0x038: .short 0x038
694 .Ls390_mcck: .long s390_do_machine_check
695 .Ldo_IRQ: .long do_IRQ
696 .Ldo_extint: .long do_extint
697 .Ldo_signal: .long do_signal
698 .Ldo_softirq: .long do_softirq
699 .Lhandle_per: .long do_single_step
700 .Ljump_table: .long pgm_check_table
701 .Lschedule: .long schedule
702 .Lclone: .long sys_clone
703 .Lexecve: .long sys_execve
704 .Lfork: .long sys_fork
705 .Lrt_sigreturn:.long sys_rt_sigreturn
707 .long sys_rt_sigsuspend
708 .Lsigreturn: .long sys_sigreturn
709 .Lsigsuspend: .long sys_sigsuspend
710 .Lsigaltstack: .long sys_sigaltstack
711 .Ltrace: .long syscall_trace
712 .Lvfork: .long sys_vfork
713 .Lschedtail: .long schedule_tail
716 .long __critical_start + 0x80000000
718 .long __critical_end + 0x80000000
720 .long cleanup_critical
722 #define SYSCALL(esa,esame,emu) .long esa
723 .globl sys_call_table
725 #include "syscalls.S"