2 * arch/s390/kernel/entry.S
3 * S390 low-level entry points.
6 * Copyright (C) 1999,2000 IBM Deutschland Entwicklung GmbH, IBM Corporation
7 * Author(s): Martin Schwidefsky (schwidefsky@de.ibm.com),
8 * Hartmut Penner (hp@de.ibm.com),
9 * Denis Joseph Barrow (djbarrow@de.ibm.com,barrow_dj@yahoo.com),
12 #include <linux/sys.h>
13 #include <linux/linkage.h>
14 #include <linux/config.h>
15 #include <asm/cache.h>
16 #include <asm/lowcore.h>
17 #include <asm/errno.h>
18 #include <asm/ptrace.h>
19 #include <asm/thread_info.h>
20 #include <asm/offsets.h>
21 #include <asm/unistd.h>
25 * Stack layout for the system_call stack entry.
26 * The first few entries are identical to the user_regs_struct.
28 SP_PTREGS = STACK_FRAME_OVERHEAD
29 SP_ARGS = STACK_FRAME_OVERHEAD + __PT_ARGS
30 SP_PSW = STACK_FRAME_OVERHEAD + __PT_PSW
31 SP_R0 = STACK_FRAME_OVERHEAD + __PT_GPRS
32 SP_R1 = STACK_FRAME_OVERHEAD + __PT_GPRS + 8
33 SP_R2 = STACK_FRAME_OVERHEAD + __PT_GPRS + 16
34 SP_R3 = STACK_FRAME_OVERHEAD + __PT_GPRS + 24
35 SP_R4 = STACK_FRAME_OVERHEAD + __PT_GPRS + 32
36 SP_R5 = STACK_FRAME_OVERHEAD + __PT_GPRS + 40
37 SP_R6 = STACK_FRAME_OVERHEAD + __PT_GPRS + 48
38 SP_R7 = STACK_FRAME_OVERHEAD + __PT_GPRS + 56
39 SP_R8 = STACK_FRAME_OVERHEAD + __PT_GPRS + 64
40 SP_R9 = STACK_FRAME_OVERHEAD + __PT_GPRS + 72
41 SP_R10 = STACK_FRAME_OVERHEAD + __PT_GPRS + 80
42 SP_R11 = STACK_FRAME_OVERHEAD + __PT_GPRS + 88
43 SP_R12 = STACK_FRAME_OVERHEAD + __PT_GPRS + 96
44 SP_R13 = STACK_FRAME_OVERHEAD + __PT_GPRS + 104
45 SP_R14 = STACK_FRAME_OVERHEAD + __PT_GPRS + 112
46 SP_R15 = STACK_FRAME_OVERHEAD + __PT_GPRS + 120
47 SP_ORIG_R2 = STACK_FRAME_OVERHEAD + __PT_ORIG_GPR2
48 SP_ILC = STACK_FRAME_OVERHEAD + __PT_ILC
49 SP_TRAP = STACK_FRAME_OVERHEAD + __PT_TRAP
50 SP_SIZE = STACK_FRAME_OVERHEAD + __PT_SIZE
52 STACK_SHIFT = PAGE_SHIFT + THREAD_ORDER
53 STACK_SIZE = 1 << STACK_SHIFT
55 _TIF_WORK_SVC = (_TIF_SIGPENDING | _TIF_NEED_RESCHED | \
56 _TIF_RESTART_SVC | _TIF_SINGLE_STEP )
57 _TIF_WORK_INT = (_TIF_SIGPENDING | _TIF_NEED_RESCHED)
59 #define BASED(name) name-system_call(%r13)
62 * Register usage in interrupt handlers:
63 * R9 - pointer to current task structure
64 * R13 - pointer to literal pool
65 * R14 - return register for function calls
66 * R15 - kernel stack pointer
69 .macro SAVE_ALL_BASE savearea
70 stmg %r12,%r15,\savearea
74 .macro SAVE_ALL psworg,savearea,sync
77 tm \psworg+1,0x01 # test problem state bit
78 jz 2f # skip stack setup save
79 lg %r15,__LC_KERNEL_STACK # problem state -> load ksp
81 tm \psworg+1,0x01 # test problem state bit
82 jnz 1f # from user -> load kernel stack
83 clc \psworg+8(8),BASED(.Lcritical_end)
85 clc \psworg+8(8),BASED(.Lcritical_start)
87 brasl %r14,cleanup_critical
88 tm 0(%r12),0x01 # retest problem state after cleanup
90 0: lg %r14,__LC_ASYNC_STACK # are we already on the async. stack ?
92 srag %r14,%r14,STACK_SHIFT
94 1: lg %r15,__LC_ASYNC_STACK # load async stack
96 #ifdef CONFIG_CHECK_STACK
98 2: tml %r15,STACK_SIZE - CONFIG_STACK_GUARD
102 2: aghi %r15,-SP_SIZE # make room for registers & psw
103 mvc SP_PSW(16,%r15),0(%r12) # move user PSW to stack
105 stg %r2,SP_ORIG_R2(%r15) # store original content of gpr 2
106 icm %r12,12,__LC_SVC_ILC
107 stmg %r0,%r11,SP_R0(%r15) # store gprs %r0-%r11 to kernel stack
109 mvc SP_R12(32,%r15),\savearea # move %r12-%r15 to stack
111 stg %r12,__SF_BACKCHAIN(%r15)
114 .macro RESTORE_ALL sync
115 mvc __LC_RETURN_PSW(16),SP_PSW(%r15) # move user PSW to lowcore
117 ni __LC_RETURN_PSW+1,0xfd # clear wait state bit
119 lmg %r0,%r15,SP_R0(%r15) # load gprs 0-15 of user
120 lpswe __LC_RETURN_PSW # back to caller
124 * Scheduler resume function, called by switch_to
125 * gpr2 = (task_struct *) prev
126 * gpr3 = (task_struct *) next
132 tm __THREAD_per+4(%r3),0xe8 # is the new process using per ?
133 jz __switch_to_noper # if not we're fine
134 stctg %c9,%c11,__SF_EMPTY(%r15)# We are using per stuff
135 clc __THREAD_per(24,%r3),__SF_EMPTY(%r15)
136 je __switch_to_noper # we got away without bashing TLB's
137 lctlg %c9,%c11,__THREAD_per(%r3) # Nope we didn't
139 stmg %r6,%r15,__SF_GPRS(%r15)# store __switch_to registers of prev task
140 stg %r15,__THREAD_ksp(%r2) # store kernel stack to prev->tss.ksp
141 lg %r15,__THREAD_ksp(%r3) # load kernel stack from next->tss.ksp
142 lmg %r6,%r15,__SF_GPRS(%r15)# load __switch_to registers of next task
143 stg %r3,__LC_CURRENT # __LC_CURRENT = current task struct
144 lctl %c4,%c4,__TASK_pid(%r3) # load pid to control reg. 4
145 lg %r3,__THREAD_info(%r3) # load thread_info from task struct
146 stg %r3,__LC_THREAD_INFO
148 stg %r3,__LC_KERNEL_STACK # __LC_KERNEL_STACK = new kernel stack
153 * SVC interrupt handler routine. System calls are synchronous events and
154 * are executed with interrupts enabled.
159 SAVE_ALL_BASE __LC_SAVE_AREA
160 SAVE_ALL __LC_SVC_OLD_PSW,__LC_SAVE_AREA,1
161 llgh %r7,__LC_SVC_INT_CODE # get svc number from lowcore
163 lg %r9,__LC_THREAD_INFO # load pointer to thread_info struct
164 slag %r7,%r7,2 # *4 and test for svc 0
166 # svc 0: system call number in %r1
167 cl %r1,BASED(.Lnr_syscalls)
169 lgfr %r7,%r1 # clear high word in r1
170 slag %r7,%r7,2 # svc 0: system call number in %r1
172 mvc SP_ARGS(8,%r15),SP_R7(%r15)
174 larl %r10,sys_call_table
175 #ifdef CONFIG_S390_SUPPORT
176 tm SP_PSW+3(%r15),0x01 # are we running in 31 bit mode ?
178 larl %r10,sys_call_table_emu # use 31 bit emulation system calls
181 tm __TI_flags+7(%r9),(_TIF_SYSCALL_TRACE|_TIF_SYSCALL_AUDIT)
182 lgf %r8,0(%r7,%r10) # load address of system call routine
184 basr %r14,%r8 # call sys_xxxx
185 stg %r2,SP_R2(%r15) # store return value (change R2 on stack)
186 # ATTENTION: check sys_execve_glue before
187 # changing anything here !!
190 tm SP_PSW+1(%r15),0x01 # returning to user ?
192 tm __TI_flags+7(%r9),_TIF_WORK_SVC
193 jnz sysc_work # there is work to do (signals etc.)
198 # recheck if there is more work to do
201 tm __TI_flags+7(%r9),_TIF_WORK_SVC
202 jz sysc_leave # there is no work to do
204 # One of the work bits is on. Find out which one.
207 tm __TI_flags+7(%r9),_TIF_NEED_RESCHED
209 tm __TI_flags+7(%r9),_TIF_SIGPENDING
211 tm __TI_flags+7(%r9),_TIF_RESTART_SVC
213 tm __TI_flags+7(%r9),_TIF_SINGLE_STEP
218 # _TIF_NEED_RESCHED is set, call schedule
221 larl %r14,sysc_work_loop
222 jg schedule # return point is sysc_return
225 # _TIF_SIGPENDING is set, call do_signal
228 ni __TI_flags+7(%r9),255-_TIF_SINGLE_STEP # clear TIF_SINGLE_STEP
229 la %r2,SP_PTREGS(%r15) # load pt_regs
230 sgr %r3,%r3 # clear *oldset
231 brasl %r14,do_signal # call do_signal
232 tm __TI_flags+7(%r9),_TIF_RESTART_SVC
234 tm __TI_flags+7(%r9),_TIF_SINGLE_STEP
236 j sysc_leave # out of here, do NOT recheck
239 # _TIF_RESTART_SVC is set, set up registers and restart svc
242 ni __TI_flags+7(%r9),255-_TIF_RESTART_SVC # clear TIF_RESTART_SVC
243 lg %r7,SP_R2(%r15) # load new svc number
245 mvc SP_R2(8,%r15),SP_ORIG_R2(%r15) # restore first argument
246 lmg %r2,%r6,SP_R2(%r15) # load svc arguments
247 j sysc_do_restart # restart svc
250 # _TIF_SINGLE_STEP is set, call do_single_step
253 ni __TI_flags+7(%r9),255-_TIF_SINGLE_STEP # clear TIF_SINGLE_STEP
254 lhi %r0,__LC_PGM_OLD_PSW
255 sth %r0,SP_TRAP(%r15) # set trap indication to pgm check
256 la %r2,SP_PTREGS(%r15) # address of register-save area
257 larl %r14,sysc_return # load adr. of system return
258 jg do_single_step # branch to do_sigtrap
264 # call syscall_trace before and after system call
265 # special linkage: %r12 contains the return address for trace_svc
268 la %r2,SP_PTREGS(%r15) # load pt_regs
272 brasl %r14,syscall_trace
276 lg %r7,SP_R2(%r15) # strace might have changed the
277 sll %r7,2 # system call
280 lmg %r3,%r6,SP_R3(%r15)
281 lg %r2,SP_ORIG_R2(%r15)
282 basr %r14,%r8 # call sys_xxx
283 stg %r2,SP_R2(%r15) # store return value
285 tm __TI_flags+7(%r9),(_TIF_SYSCALL_TRACE|_TIF_SYSCALL_AUDIT)
287 la %r2,SP_PTREGS(%r15) # load pt_regs
289 larl %r14,sysc_return # return point is sysc_return
293 # a new process exits the kernel with ret_from_fork
297 lg %r13,__LC_SVC_NEW_PSW+8
298 lg %r9,__LC_THREAD_INFO # load pointer to thread_info struct
299 tm SP_PSW+1(%r15),0x01 # forking a kernel thread ?
301 stg %r15,SP_R15(%r15) # store stack pointer for new kthread
302 0: brasl %r14,schedule_tail
303 stosm 24(%r15),0x03 # reenable interrupts
307 # clone, fork, vfork, exec and sigreturn need glue,
308 # because they all expect pt_regs as parameter,
309 # but are called with different parameter.
310 # return-address is set up above
313 la %r2,SP_PTREGS(%r15) # load pt_regs
314 jg sys_clone # branch to sys_clone
316 #ifdef CONFIG_S390_SUPPORT
318 la %r2,SP_PTREGS(%r15) # load pt_regs
319 jg sys32_clone # branch to sys32_clone
323 la %r2,SP_PTREGS(%r15) # load pt_regs
324 jg sys_fork # branch to sys_fork
327 la %r2,SP_PTREGS(%r15) # load pt_regs
328 jg sys_vfork # branch to sys_vfork
331 la %r2,SP_PTREGS(%r15) # load pt_regs
332 lgr %r12,%r14 # save return address
333 brasl %r14,sys_execve # call sys_execve
334 ltgr %r2,%r2 # check if execve failed
335 bnz 0(%r12) # it did fail -> store result in gpr2
336 b 6(%r12) # SKIP STG 2,SP_R2(15) in
337 # system_call/sysc_tracesys
338 #ifdef CONFIG_S390_SUPPORT
340 la %r2,SP_PTREGS(%r15) # load pt_regs
341 lgr %r12,%r14 # save return address
342 brasl %r14,sys32_execve # call sys32_execve
343 ltgr %r2,%r2 # check if execve failed
344 bnz 0(%r12) # it did fail -> store result in gpr2
345 b 6(%r12) # SKIP STG 2,SP_R2(15) in
346 # system_call/sysc_tracesys
350 la %r2,SP_PTREGS(%r15) # load pt_regs as parameter
351 jg sys_sigreturn # branch to sys_sigreturn
353 #ifdef CONFIG_S390_SUPPORT
354 sys32_sigreturn_glue:
355 la %r2,SP_PTREGS(%r15) # load pt_regs as parameter
356 jg sys32_sigreturn # branch to sys32_sigreturn
359 sys_rt_sigreturn_glue:
360 la %r2,SP_PTREGS(%r15) # load pt_regs as parameter
361 jg sys_rt_sigreturn # branch to sys_sigreturn
363 #ifdef CONFIG_S390_SUPPORT
364 sys32_rt_sigreturn_glue:
365 la %r2,SP_PTREGS(%r15) # load pt_regs as parameter
366 jg sys32_rt_sigreturn # branch to sys32_sigreturn
370 # sigsuspend and rt_sigsuspend need pt_regs as an additional
371 # parameter and they have to skip the store of %r2 into the
372 # user register %r2 because the return value was set in
373 # sigsuspend and rt_sigsuspend already and must not be overwritten!
377 lgr %r5,%r4 # move mask back
378 lgr %r4,%r3 # move history1 parameter
379 lgr %r3,%r2 # move history0 parameter
380 la %r2,SP_PTREGS(%r15) # load pt_regs as first parameter
381 la %r14,6(%r14) # skip store of return value
382 jg sys_sigsuspend # branch to sys_sigsuspend
384 #ifdef CONFIG_S390_SUPPORT
385 sys32_sigsuspend_glue:
386 llgfr %r4,%r4 # unsigned long
387 lgr %r5,%r4 # move mask back
389 lgr %r4,%r3 # move history1 parameter
391 lgr %r3,%r2 # move history0 parameter
392 la %r2,SP_PTREGS(%r15) # load pt_regs as first parameter
393 la %r14,6(%r14) # skip store of return value
394 jg sys32_sigsuspend # branch to sys32_sigsuspend
397 sys_rt_sigsuspend_glue:
398 lgr %r4,%r3 # move sigsetsize parameter
399 lgr %r3,%r2 # move unewset parameter
400 la %r2,SP_PTREGS(%r15) # load pt_regs as first parameter
401 la %r14,6(%r14) # skip store of return value
402 jg sys_rt_sigsuspend # branch to sys_rt_sigsuspend
404 #ifdef CONFIG_S390_SUPPORT
405 sys32_rt_sigsuspend_glue:
406 llgfr %r3,%r3 # size_t
407 lgr %r4,%r3 # move sigsetsize parameter
408 llgtr %r2,%r2 # sigset_emu31_t *
409 lgr %r3,%r2 # move unewset parameter
410 la %r2,SP_PTREGS(%r15) # load pt_regs as first parameter
411 la %r14,6(%r14) # skip store of return value
412 jg sys32_rt_sigsuspend # branch to sys32_rt_sigsuspend
415 sys_sigaltstack_glue:
416 la %r4,SP_PTREGS(%r15) # load pt_regs as parameter
417 jg sys_sigaltstack # branch to sys_sigreturn
419 #ifdef CONFIG_S390_SUPPORT
420 sys32_sigaltstack_glue:
421 la %r4,SP_PTREGS(%r15) # load pt_regs as parameter
422 jg sys32_sigaltstack_wrapper # branch to sys_sigreturn
426 * Program check handler routine
429 .globl pgm_check_handler
432 * First we need to check for a special case:
433 * Single stepping an instruction that disables the PER event mask will
434 * cause a PER event AFTER the mask has been set. Example: SVC or LPSW.
435 * For a single stepped SVC the program check handler gets control after
436 * the SVC new PSW has been loaded. But we want to execute the SVC first and
437 * then handle the PER event. Therefore we update the SVC old PSW to point
438 * to the pgm_check_handler and branch to the SVC handler after we checked
439 * if we have to load the kernel stack register.
440 * For every other possible cause for PER event without the PER mask set
441 * we just ignore the PER event (FIXME: is there anything we have to do
444 SAVE_ALL_BASE __LC_SAVE_AREA
445 tm __LC_PGM_INT_CODE+1,0x80 # check whether we got a per exception
446 jnz pgm_per # got per exception -> special case
447 SAVE_ALL __LC_PGM_OLD_PSW,__LC_SAVE_AREA,1
448 lg %r9,__LC_THREAD_INFO # load pointer to thread_info struct
449 lgf %r3,__LC_PGM_ILC # load program interruption code
454 larl %r1,pgm_check_table
455 lg %r1,0(%r8,%r1) # load address of handler routine
456 la %r2,SP_PTREGS(%r15) # address of register-save area
457 larl %r14,sysc_return
458 br %r1 # branch to interrupt-handler
461 # handle per exception
464 tm __LC_PGM_OLD_PSW,0x40 # test if per event recording is on
465 jnz pgm_per_std # ok, normal per event from user space
466 # ok its one of the special cases, now we need to find out which one
467 clc __LC_PGM_OLD_PSW(16),__LC_SVC_NEW_PSW
469 # no interesting special case, ignore PER event
470 lmg %r12,%r15,__LC_SAVE_AREA
471 lpswe __LC_PGM_OLD_PSW
474 # Normal per exception
477 SAVE_ALL __LC_PGM_OLD_PSW,__LC_SAVE_AREA,1
478 lg %r9,__LC_THREAD_INFO # load pointer to thread_info struct
479 lg %r1,__TI_task(%r9)
480 mvc __THREAD_per+__PER_atmid(2,%r1),__LC_PER_ATMID
481 mvc __THREAD_per+__PER_address(8,%r1),__LC_PER_ADDRESS
482 mvc __THREAD_per+__PER_access_id(1,%r1),__LC_PER_ACCESS_ID
483 oi __TI_flags+7(%r9),_TIF_SINGLE_STEP # set TIF_SINGLE_STEP
484 lgf %r3,__LC_PGM_ILC # load program interruption code
486 ngr %r8,%r3 # clear per-event-bit and ilc
491 # it was a single stepped SVC that is causing all the trouble
494 SAVE_ALL __LC_SVC_OLD_PSW,__LC_SAVE_AREA,1
495 llgh %r7,__LC_SVC_INT_CODE # get svc number from lowcore
496 lg %r9,__LC_THREAD_INFO # load pointer to thread_info struct
497 lg %r1,__TI_task(%r9)
498 mvc __THREAD_per+__PER_atmid(2,%r1),__LC_PER_ATMID
499 mvc __THREAD_per+__PER_address(8,%r1),__LC_PER_ADDRESS
500 mvc __THREAD_per+__PER_access_id(1,%r1),__LC_PER_ACCESS_ID
501 oi __TI_flags+7(%r9),_TIF_SINGLE_STEP # set TIF_SINGLE_STEP
502 stosm __SF_EMPTY(%r15),0x03 # reenable interrupts
506 * IO interrupt handler routine
508 .globl io_int_handler
511 SAVE_ALL_BASE __LC_SAVE_AREA+32
512 SAVE_ALL __LC_IO_OLD_PSW,__LC_SAVE_AREA+32,0
513 lg %r9,__LC_THREAD_INFO # load pointer to thread_info struct
514 la %r2,SP_PTREGS(%r15) # address of register-save area
515 brasl %r14,do_IRQ # call standard irq handler
518 tm SP_PSW+1(%r15),0x01 # returning to user ?
519 #ifdef CONFIG_PREEMPT
520 jno io_preempt # no -> check for preemptive scheduling
522 jno io_leave # no-> skip resched & signal
524 tm __TI_flags+7(%r9),_TIF_WORK_INT
525 jnz io_work # there is work to do (signals etc.)
529 #ifdef CONFIG_PREEMPT
531 icm %r0,15,__TI_precount(%r9)
533 # switch to kernel stack
536 mvc SP_PTREGS(__PT_SIZE,%r1),SP_PTREGS(%r15)
537 xc __SF_BACKCHAIN(8,%r1),__SF_BACKCHAIN(%r1) # clear back chain
540 tm __TI_flags+7(%r9),_TIF_NEED_RESCHED
543 mvc __TI_precount(4,%r9),0(%r1)
544 stosm __SF_EMPTY(%r15),0x03 # reenable interrupts
545 brasl %r14,schedule # call schedule
546 stnsm __SF_EMPTY(%r15),0xfc # disable I/O and ext. interrupts
547 xc __TI_precount(4,%r9),__TI_precount(%r9)
552 # switch to kernel stack, then check TIF bits
555 lg %r1,__LC_KERNEL_STACK
557 mvc SP_PTREGS(__PT_SIZE,%r1),SP_PTREGS(%r15)
558 xc __SF_BACKCHAIN(8,%r1),__SF_BACKCHAIN(%r1) # clear back chain
561 # One of the work bits is on. Find out which one.
562 # Checked are: _TIF_SIGPENDING and _TIF_NEED_RESCHED
565 tm __TI_flags+7(%r9),_TIF_NEED_RESCHED
567 tm __TI_flags+7(%r9),_TIF_SIGPENDING
572 # _TIF_NEED_RESCHED is set, call schedule
575 stosm __SF_EMPTY(%r15),0x03 # reenable interrupts
576 brasl %r14,schedule # call scheduler
577 stnsm __SF_EMPTY(%r15),0xfc # disable I/O and ext. interrupts
578 tm __TI_flags+7(%r9),_TIF_WORK_INT
579 jz io_leave # there is no work to do
583 # _TIF_SIGPENDING is set, call do_signal
586 stosm __SF_EMPTY(%r15),0x03 # reenable interrupts
587 la %r2,SP_PTREGS(%r15) # load pt_regs
588 slgr %r3,%r3 # clear *oldset
589 brasl %r14,do_signal # call do_signal
590 stnsm __SF_EMPTY(%r15),0xfc # disable I/O and ext. interrupts
591 j sysc_leave # out of here, do NOT recheck
594 * External interrupt handler routine
596 .globl ext_int_handler
599 SAVE_ALL_BASE __LC_SAVE_AREA+32
600 SAVE_ALL __LC_EXT_OLD_PSW,__LC_SAVE_AREA+32,0
601 lg %r9,__LC_THREAD_INFO # load pointer to thread_info struct
602 la %r2,SP_PTREGS(%r15) # address of register-save area
603 llgh %r3,__LC_EXT_INT_CODE # get interruption code
608 * Machine check handler routines
610 .globl mcck_int_handler
612 SAVE_ALL_BASE __LC_SAVE_AREA+64
613 SAVE_ALL __LC_MCK_OLD_PSW,__LC_SAVE_AREA+64,0
614 brasl %r14,s390_do_machine_check
620 * Restart interruption handler, kick starter for additional CPUs
622 .globl restart_int_handler
624 lg %r15,__LC_SAVE_AREA+120 # load ksp
625 lghi %r10,__LC_CREGS_SAVE_AREA
626 lctlg %c0,%c15,0(%r10) # get new ctl regs
627 lghi %r10,__LC_AREGS_SAVE_AREA
629 lmg %r6,%r15,__SF_GPRS(%r15) # load registers from clone
630 stosm __SF_EMPTY(%r15),0x04 # now we can turn dat on
634 * If we do not run with SMP enabled, let the new CPU crash ...
636 .globl restart_int_handler
640 lpswe restart_crash-restart_base(%r1)
643 .long 0x000a0000,0x00000000,0x00000000,0x00000000
647 #ifdef CONFIG_CHECK_STACK
649 * The synchronous or the asynchronous stack overflowed. We are dead.
650 * No need to properly save the registers, we are going to panic anyway.
651 * Setup a pt_regs so that show_trace can provide a good call trace.
654 lg %r15,__LC_PANIC_STACK # change to panic stack
656 mvc SP_PSW(16,%r15),0(%r12) # move user PSW to stack
657 stmg %r0,%r11,SP_R0(%r15) # store gprs %r0-%r11 to kernel stack
658 la %r1,__LC_SAVE_AREA
659 chi %r12,__LC_SVC_OLD_PSW
661 chi %r12,__LC_PGM_OLD_PSW
663 la %r1,__LC_SAVE_AREA+16
664 0: mvc SP_R12(32,%r15),0(%r1) # move %r12-%r15 to stack
665 xc __SF_BACKCHAIN(8,%r15),__SF_BACKCHAIN(%r15) # clear back chain
666 la %r2,SP_PTREGS(%r15) # load pt_regs
667 jg kernel_stack_overflow
670 cleanup_table_system_call:
671 .quad system_call, sysc_do_svc
672 cleanup_table_sysc_return:
673 .quad sysc_return, sysc_leave
674 cleanup_table_sysc_leave:
675 .quad sysc_leave, sysc_work_loop
676 cleanup_table_sysc_work_loop:
677 .quad sysc_work_loop, sysc_reschedule
680 clc 8(8,%r12),BASED(cleanup_table_system_call)
682 clc 8(8,%r12),BASED(cleanup_table_system_call+8)
683 jl cleanup_system_call
685 clc 8(8,%r12),BASED(cleanup_table_sysc_return)
687 clc 8(8,%r12),BASED(cleanup_table_sysc_return+8)
688 jl cleanup_sysc_return
690 clc 8(8,%r12),BASED(cleanup_table_sysc_leave)
692 clc 8(8,%r12),BASED(cleanup_table_sysc_leave+8)
693 jl cleanup_sysc_leave
695 clc 8(8,%r12),BASED(cleanup_table_sysc_work_loop)
697 clc 8(8,%r12),BASED(cleanup_table_sysc_work_loop+8)
698 jl cleanup_sysc_leave
703 mvc __LC_RETURN_PSW(8),0(%r12)
704 clc 8(8,%r12),BASED(cleanup_table_system_call)
706 mvc __LC_SAVE_AREA(32),__LC_SAVE_AREA+32
707 0: stg %r13,__LC_SAVE_AREA+40
708 SAVE_ALL __LC_SVC_OLD_PSW,__LC_SAVE_AREA,1
709 stg %r15,__LC_SAVE_AREA+56
710 llgh %r7,__LC_SVC_INT_CODE
711 mvc __LC_RETURN_PSW+8(8),BASED(cleanup_table_system_call+8)
712 la %r12,__LC_RETURN_PSW
716 mvc __LC_RETURN_PSW(8),0(%r12)
717 mvc __LC_RETURN_PSW+8(8),BASED(cleanup_table_sysc_return)
718 la %r12,__LC_RETURN_PSW
722 clc 8(8,%r12),BASED(cleanup_sysc_leave_lpsw)
724 mvc __LC_RETURN_PSW(16),SP_PSW(%r15)
725 mvc __LC_SAVE_AREA+32(32),SP_R12(%r15)
726 lmg %r0,%r11,SP_R0(%r15)
728 0: la %r12,__LC_RETURN_PSW
730 cleanup_sysc_leave_lpsw:
731 .quad sysc_leave + 12
738 .Lc_pactive: .long PREEMPT_ACTIVE
739 .Lnr_syscalls: .long NR_syscalls
740 .L0x0130: .short 0x130
741 .L0x0140: .short 0x140
742 .L0x0150: .short 0x150
743 .L0x0160: .short 0x160
744 .L0x0170: .short 0x170
746 .quad __critical_start
750 #define SYSCALL(esa,esame,emu) .long esame
751 .globl sys_call_table
753 #include "syscalls.S"
756 #ifdef CONFIG_S390_SUPPORT
758 #define SYSCALL(esa,esame,emu) .long emu
759 .globl sys_call_table_emu
761 #include "syscalls.S"