2 * arch/s390/kernel/head.S
5 * Copyright (C) 1999,2000 IBM Deutschland Entwicklung GmbH, IBM Corporation
6 * Author(s): Hartmut Penner (hp@de.ibm.com),
7 * Martin Schwidefsky (schwidefsky@de.ibm.com),
8 * Rob van der Heij (rvdhei@iae.nl)
10 * There are 5 different IPL methods
11 * 1) load the image directly into ram at address 0 and do an PSW restart
12 * 2) linload will load the image from address 0x10000 to memory 0x10000
13 * and start the code thru LPSW 0x0008000080010000 (VM only, deprecated)
14 * 3) generate the tape ipl header, store the generated image on a tape
16 * In case of SL tape you need to IPL 5 times to get past VOL1 etc
17 * 4) generate the vm reader ipl header, move the generated image to the
18 * VM reader (use option NOH!) and do a ipl from reader (VM only)
19 * 5) direct call of start by the SALIPL loader
20 * We use the cpuid to distinguish between VM and native ipl
21 * params for kernel are pushed to 0x10400 (see setup.h)
24 Okt 25 2000 <rvdheij@iae.nl>
25 added code to skip HDR and EOF to allow SL tape IPL (5 retries)
26 changed first CCW from rewind to backspace block
30 #include <linux/config.h>
31 #include <asm/setup.h>
32 #include <asm/lowcore.h>
33 #include <asm/offsets.h>
37 .long 0x00080000,0x80000000+startup # Just a restart PSW
39 #ifdef CONFIG_IPL_TAPE
42 .long 0x00080000,0x80000000+iplstart # The first 24 bytes are loaded
43 .long 0x27000000,0x60000001 # by ipl to addresses 0-23.
44 .long 0x02000000,0x20000000+IPL_BS # (a PSW and two CCWs).
45 .long 0x00000000,0x00000000 # external old psw
46 .long 0x00000000,0x00000000 # svc old psw
47 .long 0x00000000,0x00000000 # program check old psw
48 .long 0x00000000,0x00000000 # machine check old psw
49 .long 0x00000000,0x00000000 # io old psw
50 .long 0x00000000,0x00000000
51 .long 0x00000000,0x00000000
52 .long 0x00000000,0x00000000
53 .long 0x000a0000,0x00000058 # external new psw
54 .long 0x000a0000,0x00000060 # svc new psw
55 .long 0x000a0000,0x00000068 # program check new psw
56 .long 0x000a0000,0x00000070 # machine check new psw
57 .long 0x00080000,0x80000000+.Lioint # io new psw
61 # subroutine for loading from tape
67 la %r3,.Lorbread # r3 = address of orb
68 la %r5,.Lirb # r5 = address of irb
69 st %r2,.Lccwread+4 # initialize CCW data addresses
75 ssch 0(%r3) # load chunk of IPL_BS bytes
79 tm 8(%r5),0x82 # do we have a problem ?
82 icm %r7,3,10(%r5) # get residual count
84 la %r7,IPL_BS(%r7) # IPL_BS-residual=#bytes read
85 ar %r2,%r7 # add to total size
86 tm 8(%r5),0x01 # found a tape mark ?
88 l %r0,.Lccwread+4 # update CCW data addresses
94 br %r14 # r2 contains the total size
96 bas %r14,.Lsense # do the sensing
97 bct %r6,.Lssch # dec. retry count & branch
105 ssch 0(%r7) # start sense command
109 tm 8(%r5),0x82 # do we have a problem ?
113 # Wait for interrupt subroutine
118 c %r1,0xb8 # compare subchannel number
122 tm 8(%r5),0x82 # do we have a problem ?
124 tm 8(%r5),0x04 # got device end ?
133 .long 0x00000000,0x0080ff00,.Lccwread
136 .long 0x00000000,0x0080ff00,.Lccwsense
139 .long 0x02200000+IPL_BS,0x00000000
141 .long 0x04200001,0x00000000
143 .long 0x020a0000,0x80000000+.Lioint
145 .Lirb: .long 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
146 .Lcr6: .long 0xff000000
148 .Lcrash:.long 0x000a0000,0x00000000
151 #endif /* CONFIG_IPL_TAPE */
156 .long 0x00080000,0x80000000+iplstart # The first 24 bytes are loaded
157 .long 0x02000018,0x60000050 # by ipl to addresses 0-23.
158 .long 0x02000068,0x60000050 # (a PSW and two CCWs).
159 .fill 80-24,1,0x40 # bytes 24-79 are discarded !!
160 .long 0x020000f0,0x60000050 # The next 160 byte are loaded
161 .long 0x02000140,0x60000050 # to addresses 0x18-0xb7
162 .long 0x02000190,0x60000050 # They form the continuation
163 .long 0x020001e0,0x60000050 # of the CCW program started
164 .long 0x02000230,0x60000050 # by ipl and load the range
165 .long 0x02000280,0x60000050 # 0x0f0-0x730 from the image
166 .long 0x020002d0,0x60000050 # to the range 0x0f0-0x730
167 .long 0x02000320,0x60000050 # in memory. At the end of
168 .long 0x02000370,0x60000050 # the channel program the PSW
169 .long 0x020003c0,0x60000050 # at location 0 is loaded.
170 .long 0x02000410,0x60000050 # Initial processing starts
171 .long 0x02000460,0x60000050 # at 0xf0 = iplstart.
172 .long 0x020004b0,0x60000050
173 .long 0x02000500,0x60000050
174 .long 0x02000550,0x60000050
175 .long 0x020005a0,0x60000050
176 .long 0x020005f0,0x60000050
177 .long 0x02000640,0x60000050
178 .long 0x02000690,0x60000050
179 .long 0x020006e0,0x20000050
183 # subroutine for loading cards from the reader
186 la %r3,.Lorb # r2 = address of orb into r2
187 la %r5,.Lirb # r4 = address of irb
191 st %r2,4(%r6) # initialize CCW data addresses
196 lctl %c6,%c6,.Lcr6 # set IO subclass mask
199 ssch 0(%r3) # load chunk of 1600 bytes
202 mvc 0x78(8),.Lnewpsw # set up IO interrupt psw
205 c %r1,0xb8 # compare subchannel number
210 ic %r0,8(%r5) # get device status
211 chi %r0,8 # channel end ?
213 chi %r0,12 # channel end + device end ?
217 s %r0,8(%r3) # r0/8 = number of ccws executed
218 mhi %r0,10 # *10 = number of bytes in ccws
219 lh %r3,10(%r5) # get residual count
220 sr %r0,%r3 # #ccws*80-residual=#bytes read
223 br %r14 # r2 contains the total size
226 ahi %r2,0x640 # add 0x640 to total size
230 l %r0,4(%r6) # update CCW data addresses
241 .Lorb: .long 0x00000000,0x0080ff00,.Lccws
242 .Lirb: .long 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
243 .Lcr6: .long 0xff000000
246 .Lcrash:.long 0x000a0000,0x00000000
248 .long 0x00080000,0x80000000+.Lioint
250 .long 0x020a0000,0x80000000+.Lioint
254 .long 0x02600050,0x00000000
256 .long 0x02200050,0x00000000
257 #endif /* CONFIG_IPL_VM */
260 lh %r1,0xb8 # test if subchannel number
261 bct %r1,.Lnoload # is valid
262 l %r1,0xb8 # load ipl subchannel number
263 la %r2,IPL_BS # load start address
264 bas %r14,.Lloader # load rest of ipl image
265 larl %r12,_pstart # pointer to parameter area
266 st %r1,IPL_DEVICE+4-PARMAREA(%r12) # store ipl device number
269 # load parameter file from ipl device
272 l %r2,INITRD_START+4-PARMAREA(%r12)# use ramdisk location as temp
273 bas %r14,.Lloader # load parameter file
274 ltr %r2,%r2 # got anything ?
280 l %r4,INITRD_START+4-PARMAREA(%r12)
281 clc 0(3,%r4),.L_hdr # if it is HDRx
282 bz .Lagain1 # skip dataset header
283 clc 0(3,%r4),.L_eof # if it is EOFx
284 bz .Lagain1 # skip dateset trailer
288 tm 0(%r5),0x80 # high order bit set ?
289 bo .Ldocv # yes -> convert from EBCDIC
295 tr 0(256,%r4),0(%r3) # convert parameters to ascii
296 tr 256(256,%r4),0(%r3)
297 tr 512(256,%r4),0(%r3)
298 tr 768(122,%r4),0(%r3)
299 .Lnocv: la %r3,COMMAND_LINE-PARMAREA(%r12) # load adr. of command line
300 mvc 0(256,%r3),0(%r4)
301 mvc 256(256,%r3),256(%r4)
302 mvc 512(256,%r3),512(%r4)
303 mvc 768(122,%r3),768(%r4)
308 chi %r0,0x20 # is it a space ?
316 stc %r0,0(%r2,%r3) # terminate buffer
320 # load ramdisk from ipl device
323 l %r2,INITRD_START+4-PARMAREA(%r12)# load adr. of ramdisk
324 bas %r14,.Lloader # load ramdisk
325 st %r2,INITRD_SIZE+4-PARMAREA(%r12) # store size of ramdisk
328 st %r2,INITRD_START+4-PARMAREA(%r12)# no ramdisk found, null it
330 l %r2,INITRD_START+4-PARMAREA(%r12)
331 clc 0(3,%r2),.L_hdr # skip HDRx and EOFx
338 # reset files in VM reader
340 stidp __LC_CPUID # store cpuid
341 tm __LC_CPUID,0xff # running VM ?
350 # everything loaded, go for it
356 .Lstartup: .long startup
357 .Lcvtab:.long _ebcasc # ebcdic to ascii table
358 .Lreset:.byte 0xc3,0xc8,0xc1,0xd5,0xc7,0xc5,0x40,0xd9,0xc4,0xd9,0x40
359 .byte 0xc1,0xd3,0xd3,0x40,0xd2,0xc5,0xc5,0xd7,0x40,0xd5,0xd6
360 .byte 0xc8,0xd6,0xd3,0xc4 # "change rdr all keep nohold"
361 .L_eof: .long 0xc5d6c600 /* C'EOF' */
362 .L_hdr: .long 0xc8c4d900 /* C'HDR' */
363 #endif /* CONFIG_IPL */
366 # SALIPL loader support. Based on a patch by Rob van der Heij.
367 # This entry point is called directly from the SALIPL loader and
368 # doesn't need a builtin ipl record.
373 stm %r0,%r15,0x07b0 # store registers
377 l %r8,.cmd # pointer to command buffer
379 ltr %r9,%r9 # do we have SALIPL parameters?
382 mvc 0(64,%r8),0x00b0 # copy saved registers
383 xc 64(240-64,%r8),0(%r8) # remainder of buffer
384 tr 0(64,%r8),.lowcase
387 mvc 0(240,%r8),0(%r9) # copy iplparms into buffer
389 l %r10,.tbl # EBCDIC to ASCII table
390 tr 0(240,%r8),0(%r10)
391 stidp __LC_CPUID # Are we running on VM maybe
394 .long 0x83300060 # diag 3,0,x'0060' - storage size
397 mvc 0x68(8),.pgmnw # set up pgm check handler
410 st %r0,INITRD_SIZE+4-PARMAREA(%r11)
411 st %r0,INITRD_START+4-PARMAREA(%r11)
412 j startup # continue with startup
413 .tbl: .long _ebcasc # translate table
414 .cmd: .long COMMAND_LINE # address of command line buffer
415 .parm: .long PARMAREA
416 .fourmeg: .long 0x00400000 # 4M
417 .pgmnw: .long 0x00080000,.pgmx
418 .memsize: .long memory_size
420 .byte 0x00,0x01,0x02,0x03,0x04,0x05,0x06,0x07
421 .byte 0x08,0x09,0x0a,0x0b,0x0c,0x0d,0x0e,0x0f
422 .byte 0x10,0x11,0x12,0x13,0x14,0x15,0x16,0x17
423 .byte 0x18,0x19,0x1a,0x1b,0x1c,0x1d,0x1e,0x1f
424 .byte 0x20,0x21,0x22,0x23,0x24,0x25,0x26,0x27
425 .byte 0x28,0x29,0x2a,0x2b,0x2c,0x2d,0x2e,0x2f
426 .byte 0x30,0x31,0x32,0x33,0x34,0x35,0x36,0x37
427 .byte 0x38,0x39,0x3a,0x3b,0x3c,0x3d,0x3e,0x3f
428 .byte 0x40,0x41,0x42,0x43,0x44,0x45,0x46,0x47
429 .byte 0x48,0x49,0x4a,0x4b,0x4c,0x4d,0x4e,0x4f
430 .byte 0x50,0x51,0x52,0x53,0x54,0x55,0x56,0x57
431 .byte 0x58,0x59,0x5a,0x5b,0x5c,0x5d,0x5e,0x5f
432 .byte 0x60,0x61,0x62,0x63,0x64,0x65,0x66,0x67
433 .byte 0x68,0x69,0x6a,0x6b,0x6c,0x6d,0x6e,0x6f
434 .byte 0x70,0x71,0x72,0x73,0x74,0x75,0x76,0x77
435 .byte 0x78,0x79,0x7a,0x7b,0x7c,0x7d,0x7e,0x7f
437 .byte 0x80,0x81,0x82,0x83,0x84,0x85,0x86,0x87
438 .byte 0x88,0x89,0x8a,0x8b,0x8c,0x8d,0x8e,0x8f
439 .byte 0x90,0x91,0x92,0x93,0x94,0x95,0x96,0x97
440 .byte 0x98,0x99,0x9a,0x9b,0x9c,0x9d,0x9e,0x9f
441 .byte 0xa0,0xa1,0xa2,0xa3,0xa4,0xa5,0xa6,0xa7
442 .byte 0xa8,0xa9,0xaa,0xab,0xac,0xad,0xae,0xaf
443 .byte 0xb0,0xb1,0xb2,0xb3,0xb4,0xb5,0xb6,0xb7
444 .byte 0xb8,0xb9,0xba,0xbb,0xbc,0xbd,0xbe,0xbf
445 .byte 0xc0,0x81,0x82,0x83,0x84,0x85,0x86,0x87 # .abcdefg
446 .byte 0x88,0x89,0xca,0xcb,0xcc,0xcd,0xce,0xcf # hi
447 .byte 0xd0,0x91,0x92,0x93,0x94,0x95,0x96,0x97 # .jklmnop
448 .byte 0x98,0x99,0xda,0xdb,0xdc,0xdd,0xde,0xdf # qr
449 .byte 0xe0,0xe1,0xa2,0xa3,0xa4,0xa5,0xa6,0xa7 # ..stuvwx
450 .byte 0xa8,0xa9,0xea,0xeb,0xec,0xed,0xee,0xef # yz
451 .byte 0xf0,0xf1,0xf2,0xf3,0xf4,0xf5,0xf6,0xf7
452 .byte 0xf8,0xf9,0xfa,0xfb,0xfc,0xfd,0xfe,0xff
455 # startup-code at 0x10000, running in real mode
456 # this is called either by the ipl loader or directly by PSW restart
457 # or linload or SALIPL
460 startup:basr %r13,0 # get base
461 .LPG1: sll %r13,1 # remove high order bit
463 lhi %r1,1 # mode 1 = esame
464 slr %r0,%r0 # set cpuid to zero
465 sigp %r1,%r0,0x12 # switch to esame mode
466 sam64 # switch to 64 bit mode
467 lctlg %c0,%c15,.Lctl-.LPG1(%r13) # load control registers
468 larl %r12,_pstart # pointer to parameter area
469 # move IPL device to lowcore
470 mvc __LC_IPLDEV(4),IPL_DEVICE+4-PARMAREA(%r12)
475 larl %r2,__bss_start # start of bss segment
476 larl %r3,_end # end of bss segment
477 sgr %r3,%r2 # length of bss
479 sgr %r5,%r5 # set src,length and pad to zero
480 mvcle %r2,%r4,0 # clear mem
481 jo .-4 # branch back, if not finish
483 # set program check new psw mask
484 mvc __LC_PGM_NEW_PSW(8),.Lpcmsk-.LPG1(%r13)
487 # find memory chunks.
489 larl %r1,.Lchkmem # set program check address
490 stg %r1,__LC_PGM_NEW_PSW+8
491 la %r1,1 # test in increments of 128KB
493 larl %r3,memory_chunk
494 slgr %r4,%r4 # set start of chunk to zero
495 slgr %r5,%r5 # set end of chunk to zero
496 slr %r6,%r6 # set access code to zero
498 tprot 0(%r5),0 # test protection of first byte
501 clr %r6,%r7 # compare cc with last access code
503 clgr %r4,%r5 # chunk size > 0?
505 stg %r4,0(%r3) # store start address of chunk
508 stg %r0,8(%r3) # store size of chunk
509 st %r6,20(%r3) # store type of chunk
511 lgr %r4,%r5 # set start to end
513 stg %r5,0(%r8) # store memory size
515 lr %r6,%r7 # set access code to last cc
517 algr %r5,%r1 # add 128KB to end of chunk
519 .Lchkmem: # > 16EB or tprot got a program check
520 clgr %r4,%r5 # chunk size > 0?
522 stg %r4,0(%r3) # store start address of chunk
525 stg %r0,8(%r3) # store size of chunk
526 st %r6,20(%r3) # store type of chunk
530 stg %r5,0(%r8) # store memory size
532 # Running native the HSA is located at 2GB and we will get an
533 # addressing exception trying to access it. We have to restart
534 # the scan at 2GB to find out if the machine has more than 2GB.
544 larl %r12,machine_flags
546 # find out if we are running under VM
548 stidp __LC_CPUID # store cpuid
549 tm __LC_CPUID,0xff # running under VM ?
551 oi 7(%r12),1 # set VM flag
552 0: lh %r0,__LC_CPUID+4 # get cpu version
553 chi %r0,0x7490 # running on a P/390 ?
555 oi 7(%r12),4 # set P/390 flag
557 chi %r0,0x2084 # new stidp format?
559 oi 7(%r12),64 # set new stidp flag
563 # find out if we have the MVPG instruction
565 la %r1,0f-.LPG1(%r13) # set program check address
566 stg %r1,__LC_PGM_NEW_PSW+8
570 mvpg %r1,%r2 # test MVPG instruction
571 oi 7(%r12),16 # set MVPG flag
575 # find out if the diag 0x44 works in 64 bit mode
577 la %r1,0f-.LPG1(%r13) # set program check address
578 stg %r1,__LC_PGM_NEW_PSW+8
579 mvc __LC_DIAG44_OPCODE(8),.Lnop-.LPG1(%r13)
580 diag 0,0,0x44 # test diag 0x44
581 oi 7(%r12),32 # set diag44 flag
582 mvc __LC_DIAG44_OPCODE(8),.Ldiag44-.LPG1(%r13)
586 # find out if we have the IDTE instruction
588 la %r1,0f-.LPG1(%r13) # set program check address
589 stg %r1,__LC_PGM_NEW_PSW+8
590 .long 0xb2b10000 # store facility list
591 tm 0xc8,0x08 # check bit for clearing-by-ASCE
596 oi 7(%r12),0x80 # set IDTE flag
599 lpswe .Lentry-.LPG1(13) # jump to _stext in primary-space,
600 # virtual and never return ...
602 .Lentry:.quad 0x0000000180000000,_stext
603 .Lctl: .quad 0x04b50002 # cr0: various things
604 .quad 0 # cr1: primary space segment table
605 .quad .Lduct # cr2: dispatchable unit control table
606 .quad 0 # cr3: instruction authorization
607 .quad 0 # cr4: instruction authorization
608 .quad 0xffffffffffffffff # cr5: primary-aste origin
609 .quad 0 # cr6: I/O interrupts
610 .quad 0 # cr7: secondary space segment table
611 .quad 0 # cr8: access registers translation
612 .quad 0 # cr9: tracing off
613 .quad 0 # cr10: tracing off
614 .quad 0 # cr11: tracing off
615 .quad 0 # cr12: tracing off
616 .quad 0 # cr13: home space segment table
617 .quad 0xc0000000 # cr14: machine check handling off
618 .quad 0 # cr15: linkage stack operations
619 .Lpcmsk:.quad 0x0000000180000000
620 .L4malign:.quad 0xffffffffffc00000
621 .Lscan2g:.quad 0x80000000 + 0x20000 - 8 # 2GB + 128K - 8
622 .Lnop: .long 0x07000700
623 .Ldiag44:.long 0x83000044
626 .Lduct: .long 0,0,0,0,0,0,0,0
627 .long 0,0,0,0,0,0,0,0
630 # params at 10400 (setup.h)
636 .quad RAMDISK_ORIGIN # INITRD_START
637 .quad RAMDISK_SIZE # INITRD_SIZE
640 .byte "root=/dev/ram0 ro"
646 #ifdef CONFIG_SHARED_KERNEL
651 # startup-code, running in virtual mode
654 _stext: basr %r13,0 # get base
659 larl %r15,init_thread_union
660 lg %r14,__TI_task(%r15) # cache current in lowcore
661 stg %r14,__LC_CURRENT
662 aghi %r15,16384 # init_task_union + 16384
663 stg %r15,__LC_KERNEL_STACK # set end of kernel stack
665 xc 0(8,%r15),0(%r15) # set backchain to zero
667 # check control registers
668 stctg %c0,%c15,0(%r15)
669 oi 6(%r15),0x20 # enable sigp external interrupts
670 oi 4(%r15),0x10 # switch on low address proctection
671 lctlg %c0,%c15,0(%r15)
674 lam 0,15,.Laregs-.LPG2(%r13) # load access regs needed by uaccess
675 brasl %r14,start_kernel # go to C code
677 # We returned from start_kernel ?!? PANIK
680 lpswe .Ldw-.(%r13) # load disabled wait psw
683 .Ldw: .quad 0x0002000180000000,0x0000000000000000
684 .Laregs: .long 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0