2 * pcic.c: MicroSPARC-IIep PCI controller support
4 * Copyright (C) 1998 V. Roganov and G. Raiko
6 * Code is derived from Ultra/PCI PSYCHO controller support, see that
9 * Support for diverse IIep based platforms by Pete Zaitcev.
10 * CP-1200 by Eric Brower.
13 #include <linux/config.h>
14 #include <linux/kernel.h>
15 #include <linux/types.h>
16 #include <linux/init.h>
18 #include <linux/slab.h>
19 #include <linux/jiffies.h>
22 #include <asm/sbus.h> /* for sanity check... */
23 #include <asm/swift.h> /* for cache flushing. */
26 #include <linux/ctype.h>
27 #include <linux/pci.h>
28 #include <linux/time.h>
29 #include <linux/timex.h>
30 #include <linux/interrupt.h>
33 #include <asm/oplib.h>
35 #include <asm/timer.h>
36 #include <asm/uaccess.h>
39 struct pci_fixup pcibios_fixups[] = {
43 unsigned int pcic_pin_to_irq(unsigned int pin, char *name);
46 * I studied different documents and many live PROMs both from 2.30
47 * family and 3.xx versions. I came to the amazing conclusion: there is
48 * absolutely no way to route interrupts in IIep systems relying on
49 * information which PROM presents. We must hardcode interrupt routing
50 * schematics. And this actually sucks. -- zaitcev 1999/05/12
52 * To find irq for a device we determine which routing map
53 * is in effect or, in other words, on which machine we are running.
54 * We use PROM name for this although other techniques may be used
55 * in special cases (Gleb reports a PROMless IIep based system).
56 * Once we know the map we take device configuration address and
57 * find PCIC pin number where INT line goes. Then we may either program
58 * preferred irq into the PCIC or supply the preexisting irq to the device.
61 unsigned char busno; /* PCI bus number */
62 unsigned char devfn; /* Configuration address */
63 unsigned char pin; /* PCIC external interrupt pin */
64 unsigned char irq; /* Preferred IRQ (mappable in PCIC) */
65 unsigned int force; /* Enforce preferred IRQ */
70 struct pcic_ca2irq *intmap;
75 * JavaEngine-1 apparently has different versions.
77 * According to communications with Sun folks, for P2 build 501-4628-03:
78 * pin 0 - parallel, audio;
81 * pin 3 - PS/2 kbd and mouse.
83 * OEM manual (805-1486):
87 * pin 3: Not connected
88 * OEM manual says that 501-4628 & 501-4811 are the same thing,
89 * only the latter has NAND flash in place.
91 * So far unofficial Sun wins over the OEM manual. Poor OEMs...
93 static struct pcic_ca2irq pcic_i_je1a[] = { /* 501-4811-03 */
94 { 0, 0x00, 2, 12, 0 }, /* EBus: hogs all */
95 { 0, 0x01, 1, 6, 1 }, /* Happy Meal */
96 { 0, 0x80, 0, 7, 0 }, /* IGA (unused) */
99 /* XXX JS-E entry is incomplete - PCI Slot 2 address (pin 7)? */
100 static struct pcic_ca2irq pcic_i_jse[] = {
101 { 0, 0x00, 0, 13, 0 }, /* Ebus - serial and keyboard */
102 { 0, 0x01, 1, 6, 0 }, /* hme */
103 { 0, 0x08, 2, 9, 0 }, /* VGA - we hope not used :) */
104 { 0, 0x10, 6, 8, 0 }, /* PCI INTA# in Slot 1 */
105 { 0, 0x18, 7, 12, 0 }, /* PCI INTA# in Slot 2, shared w. RTC */
106 { 0, 0x38, 4, 9, 0 }, /* All ISA devices. Read 8259. */
107 { 0, 0x80, 5, 11, 0 }, /* EIDE */
108 /* {0,0x88, 0,0,0} - unknown device... PMU? Probably no interrupt. */
109 { 0, 0xA0, 4, 9, 0 }, /* USB */
111 * Some pins belong to non-PCI devices, we hardcode them in drivers.
112 * sun4m timers - irq 10, 14
113 * PC style RTC - pin 7, irq 4 ?
114 * Smart card, Parallel - pin 4 shared with USB, ISA
115 * audio - pin 3, irq 5 ?
119 /* SPARCengine-6 was the original release name of CP1200.
120 * The documentation differs between the two versions
122 static struct pcic_ca2irq pcic_i_se6[] = {
123 { 0, 0x08, 0, 2, 0 }, /* SCSI */
124 { 0, 0x01, 1, 6, 0 }, /* HME */
125 { 0, 0x00, 3, 13, 0 }, /* EBus */
129 * Krups (courtesy of Varol Kaptan)
130 * No documentation available, but it was easy to guess
131 * because it was very similar to Espresso.
133 * pin 0 - kbd, mouse, serial;
135 * pin 2 - igs (we do not use it);
137 * pin 4,5,6 - unused;
138 * pin 7 - RTC (from P2 onwards as David B. says).
140 static struct pcic_ca2irq pcic_i_jk[] = {
141 { 0, 0x00, 0, 13, 0 }, /* Ebus - serial and keyboard */
142 { 0, 0x01, 1, 6, 0 }, /* hme */
146 * Several entries in this list may point to the same routing map
147 * as several PROMs may be installed on the same physical board.
149 #define SN2L_INIT(name, map) \
150 { name, map, sizeof(map)/sizeof(struct pcic_ca2irq) }
152 static struct pcic_sn2list pcic_known_sysnames[] = {
153 SN2L_INIT("SUNW,JavaEngine1", pcic_i_je1a), /* JE1, PROM 2.32 */
154 SN2L_INIT("SUNW,JS-E", pcic_i_jse), /* PROLL JavaStation-E */
155 SN2L_INIT("SUNW,SPARCengine-6", pcic_i_se6), /* SPARCengine-6/CP-1200 */
156 SN2L_INIT("SUNW,JS-NC", pcic_i_jk), /* PROLL JavaStation-NC */
157 SN2L_INIT("SUNW,JSIIep", pcic_i_jk), /* OBP JavaStation-NC */
162 * Only one PCIC per IIep,
163 * and since we have no SMP IIep, only one per system.
166 static struct linux_pcic pcic0;
168 unsigned int pcic_regs;
169 volatile int pcic_speculative;
170 volatile int pcic_trapped;
172 static void pci_do_gettimeofday(struct timeval *tv);
173 static int pci_do_settimeofday(struct timespec *tv);
175 #define CONFIG_CMD(bus, device_fn, where) (0x80000000 | (((unsigned int)bus) << 16) | (((unsigned int)device_fn) << 8) | (where & ~3))
177 static int pcic_read_config_dword(unsigned int busno, unsigned int devfn,
178 int where, u32 *value)
180 struct linux_pcic *pcic;
185 local_irq_save(flags);
186 #if 0 /* does not fail here */
187 pcic_speculative = 1;
190 writel(CONFIG_CMD(busno, devfn, where), pcic->pcic_config_space_addr);
191 #if 0 /* does not fail here */
194 local_irq_restore(flags);
199 pcic_speculative = 2;
201 *value = readl(pcic->pcic_config_space_data + (where&4));
204 pcic_speculative = 0;
205 local_irq_restore(flags);
209 pcic_speculative = 0;
210 local_irq_restore(flags);
214 static int pcic_read_config(struct pci_bus *bus, unsigned int devfn,
215 int where, int size, u32 *val)
219 if (bus->number != 0) return -EINVAL;
222 pcic_read_config_dword(bus->number, devfn, where&~3, &v);
223 *val = 0xff & (v >> (8*(where & 3)));
226 if (where&1) return -EINVAL;
227 pcic_read_config_dword(bus->number, devfn, where&~3, &v);
228 *val = 0xffff & (v >> (8*(where & 3)));
231 if (where&3) return -EINVAL;
232 pcic_read_config_dword(bus->number, devfn, where&~3, val);
238 static int pcic_write_config_dword(unsigned int busno, unsigned int devfn,
239 int where, u32 value)
241 struct linux_pcic *pcic;
246 local_irq_save(flags);
247 writel(CONFIG_CMD(busno, devfn, where), pcic->pcic_config_space_addr);
248 writel(value, pcic->pcic_config_space_data + (where&4));
249 local_irq_restore(flags);
253 static int pcic_write_config(struct pci_bus *bus, unsigned int devfn,
254 int where, int size, u32 val)
258 if (bus->number != 0) return -EINVAL;
261 pcic_read_config_dword(bus->number, devfn, where&~3, &v);
262 v = (v & ~(0xff << (8*(where&3)))) |
263 ((0xff&val) << (8*(where&3)));
264 return pcic_write_config_dword(bus->number, devfn, where&~3, v);
266 if (where&1) return -EINVAL;
267 pcic_read_config_dword(bus->number, devfn, where&~3, &v);
268 v = (v & ~(0xffff << (8*(where&3)))) |
269 ((0xffff&val) << (8*(where&3)));
270 return pcic_write_config_dword(bus->number, devfn, where&~3, v);
272 if (where&3) return -EINVAL;
273 return pcic_write_config_dword(bus->number, devfn, where, val);
278 static struct pci_ops pcic_ops = {
279 .read = pcic_read_config,
280 .write = pcic_write_config,
284 * On sparc64 pcibios_init() calls pci_controller_probe().
285 * We want PCIC probed little ahead so that interrupt controller
286 * would be operational.
288 int __init pcic_probe(void)
290 struct linux_pcic *pcic;
291 struct linux_prom_registers regs[PROMREG_MAX];
292 struct linux_pbm_info* pbm;
298 prom_printf("PCIC: called twice!\n");
303 node = prom_getchild (prom_root_node);
304 node = prom_searchsiblings (node, "pci");
308 * Map in PCIC register set, config space, and IO base
310 err = prom_getproperty(node, "reg", (char*)regs, sizeof(regs));
311 if (err == 0 || err == -1) {
312 prom_printf("PCIC: Error, cannot get PCIC registers "
319 pcic->pcic_res_regs.name = "pcic_registers";
320 pcic->pcic_regs = (unsigned long)
321 ioremap(regs[0].phys_addr, regs[0].reg_size);
322 if (!pcic->pcic_regs) {
323 prom_printf("PCIC: Error, cannot map PCIC registers.\n");
327 pcic->pcic_res_io.name = "pcic_io";
328 if ((pcic->pcic_io = (unsigned long)
329 ioremap(regs[1].phys_addr, 0x10000)) == 0) {
330 prom_printf("PCIC: Error, cannot map PCIC IO Base.\n");
334 pcic->pcic_res_cfg_addr.name = "pcic_cfg_addr";
335 if ((pcic->pcic_config_space_addr = (unsigned long)
336 ioremap(regs[2].phys_addr, regs[2].reg_size * 2)) == 0) {
337 prom_printf("PCIC: Error, cannot map"
338 "PCI Configuration Space Address.\n");
343 * Docs say three least significant bits in address and data
344 * must be the same. Thus, we need adjust size of data.
346 pcic->pcic_res_cfg_data.name = "pcic_cfg_data";
347 if ((pcic->pcic_config_space_data = (unsigned long)
348 ioremap(regs[3].phys_addr, regs[3].reg_size * 2)) == 0) {
349 prom_printf("PCIC: Error, cannot map"
350 "PCI Configuration Space Data.\n");
355 pbm->prom_node = node;
356 prom_getstring(node, "name", namebuf, 63); namebuf[63] = 0;
357 strcpy(pbm->prom_name, namebuf);
360 extern volatile int t_nmi[1];
361 extern int pcic_nmi_trap_patch[1];
363 t_nmi[0] = pcic_nmi_trap_patch[0];
364 t_nmi[1] = pcic_nmi_trap_patch[1];
365 t_nmi[2] = pcic_nmi_trap_patch[2];
366 t_nmi[3] = pcic_nmi_trap_patch[3];
367 swift_flush_dcache();
368 pcic_regs = pcic->pcic_regs;
371 prom_getstring(prom_root_node, "name", namebuf, 63); namebuf[63] = 0;
373 struct pcic_sn2list *p;
375 for (p = pcic_known_sysnames; p->sysname != NULL; p++) {
376 if (strcmp(namebuf, p->sysname) == 0)
379 pcic->pcic_imap = p->intmap;
380 pcic->pcic_imdim = p->mapdim;
382 if (pcic->pcic_imap == NULL) {
384 * We do not panic here for the sake of embedded systems.
386 printk("PCIC: System %s is unknown, cannot route interrupts\n",
393 static void __init pcic_pbm_scan_bus(struct linux_pcic *pcic)
395 struct linux_pbm_info *pbm = &pcic->pbm;
397 pbm->pci_bus = pci_scan_bus(pbm->pci_first_busno, &pcic_ops, pbm);
398 #if 0 /* deadwood transplanted from sparc64 */
399 pci_fill_in_pbm_cookies(pbm->pci_bus, pbm, pbm->prom_node);
400 pci_record_assignments(pbm, pbm->pci_bus);
401 pci_assign_unassigned(pbm, pbm->pci_bus);
402 pci_fixup_irq(pbm, pbm->pci_bus);
407 * Main entry point from the PCI subsystem.
409 static int __init pcic_init(void)
411 struct linux_pcic *pcic;
414 * PCIC should be initialized at start of the timer.
415 * So, here we report the presence of PCIC and do some magic passes.
422 * Switch off IOTLB translation.
424 writeb(PCI_DVMA_CONTROL_IOTLB_DISABLE,
425 pcic->pcic_regs+PCI_DVMA_CONTROL);
428 * Increase mapped size for PCI memory space (DMA access).
429 * Should be done in that order (size first, address second).
430 * Why we couldn't set up 4GB and forget about it? XXX
432 writel(0xF0000000UL, pcic->pcic_regs+PCI_SIZE_0);
433 writel(0+PCI_BASE_ADDRESS_SPACE_MEMORY,
434 pcic->pcic_regs+PCI_BASE_ADDRESS_0);
436 pcic_pbm_scan_bus(pcic);
442 int pcic_present(void)
447 static int __init pdev_to_pnode(struct linux_pbm_info *pbm,
448 struct pci_dev *pdev)
450 struct linux_prom_pci_registers regs[PROMREG_MAX];
452 int node = prom_getchild(pbm->prom_node);
455 err = prom_getproperty(node, "reg",
456 (char *)®s[0], sizeof(regs));
457 if(err != 0 && err != -1) {
458 unsigned long devfn = (regs[0].which_io >> 8) & 0xff;
459 if(devfn == pdev->devfn)
462 node = prom_getsibling(node);
467 static inline struct pcidev_cookie *pci_devcookie_alloc(void)
469 return kmalloc(sizeof(struct pcidev_cookie), GFP_ATOMIC);
472 static void pcic_map_pci_device(struct linux_pcic *pcic,
473 struct pci_dev *dev, int node)
476 unsigned long address;
480 if (node == 0 || node == -1) {
481 strcpy(namebuf, "???");
483 prom_getstring(node, "name", namebuf, 63); namebuf[63] = 0;
486 for (j = 0; j < 6; j++) {
487 address = dev->resource[j].start;
488 if (address == 0) break; /* are sequential */
489 flags = dev->resource[j].flags;
490 if ((flags & IORESOURCE_IO) != 0) {
491 if (address < 0x10000) {
493 * A device responds to I/O cycles on PCI.
494 * We generate these cycles with memory
495 * access into the fixed map (phys 0x30000000).
497 * Since a device driver does not want to
498 * do ioremap() before accessing PC-style I/O,
499 * we supply virtual, ready to access address.
501 * Ebus devices do not come here even if
502 * CheerIO makes a similar conversion.
503 * See ebus.c for details.
505 * Note that check_region()/request_region()
506 * work for these devices.
508 * XXX Neat trick, but it's a *bad* idea
509 * to shit into regions like that.
510 * What if we want to allocate one more
511 * PCI base address...
513 dev->resource[j].start =
514 pcic->pcic_io + address;
515 dev->resource[j].end = 1; /* XXX */
516 dev->resource[j].flags =
517 (flags & ~IORESOURCE_IO) | IORESOURCE_MEM;
520 * OOPS... PCI Spec allows this. Sun does
521 * not have any devices getting above 64K
522 * so it must be user with a weird I/O
523 * board in a PCI slot. We must remap it
524 * under 64K but it is not done yet. XXX
526 printk("PCIC: Skipping I/O space at 0x%lx,"
527 "this will Oops if a driver attaches;"
528 "device '%s' at %02x:%02x)\n", address,
529 namebuf, dev->bus->number, dev->devfn);
536 pcic_fill_irq(struct linux_pcic *pcic, struct pci_dev *dev, int node)
538 struct pcic_ca2irq *p;
542 if (node == 0 || node == -1) {
543 strcpy(namebuf, "???");
545 prom_getstring(node, "name", namebuf, sizeof(namebuf));
548 if ((p = pcic->pcic_imap) == 0) {
552 for (i = 0; i < pcic->pcic_imdim; i++) {
553 if (p->busno == dev->bus->number && p->devfn == dev->devfn)
557 if (i >= pcic->pcic_imdim) {
558 printk("PCIC: device %s devfn %02x:%02x not found in %d\n",
559 namebuf, dev->bus->number, dev->devfn, pcic->pcic_imdim);
565 if (i >= 0 && i < 4) {
566 ivec = readw(pcic->pcic_regs+PCI_INT_SELECT_LO);
567 dev->irq = ivec >> (i << 2) & 0xF;
568 } else if (i >= 4 && i < 8) {
569 ivec = readw(pcic->pcic_regs+PCI_INT_SELECT_HI);
570 dev->irq = ivec >> ((i-4) << 2) & 0xF;
571 } else { /* Corrupted map */
572 printk("PCIC: BAD PIN %d\n", i); for (;;) {}
574 /* P3 */ /* printk("PCIC: device %s pin %d ivec 0x%x irq %x\n", namebuf, i, ivec, dev->irq); */
577 * dev->irq=0 means PROM did not bother to program the upper
578 * half of PCIC. This happens on JS-E with PROM 3.11, for instance.
580 if (dev->irq == 0 || p->force) {
581 if (p->irq == 0 || p->irq >= 15) { /* Corrupted map */
582 printk("PCIC: BAD IRQ %d\n", p->irq); for (;;) {}
584 printk("PCIC: setting irq %d at pin %d for device %02x:%02x\n",
585 p->irq, p->pin, dev->bus->number, dev->devfn);
590 ivec = readw(pcic->pcic_regs+PCI_INT_SELECT_HI);
591 ivec &= ~(0xF << ((i - 4) << 2));
592 ivec |= p->irq << ((i - 4) << 2);
593 writew(ivec, pcic->pcic_regs+PCI_INT_SELECT_HI);
595 ivec = readw(pcic->pcic_regs+PCI_INT_SELECT_LO);
596 ivec &= ~(0xF << (i << 2));
597 ivec |= p->irq << (i << 2);
598 writew(ivec, pcic->pcic_regs+PCI_INT_SELECT_LO);
606 * Normally called from {do_}pci_scan_bus...
608 void __init pcibios_fixup_bus(struct pci_bus *bus)
610 struct list_head *walk;
611 int i, has_io, has_mem;
613 struct linux_pcic *pcic;
614 /* struct linux_pbm_info* pbm = &pcic->pbm; */
616 struct pcidev_cookie *pcp;
619 printk("pcibios_fixup_bus: no PCIC\n");
625 * Next crud is an equivalent of pbm = pcic_bus_to_pbm(bus);
627 if (bus->number != 0) {
628 printk("pcibios_fixup_bus: nonzero bus 0x%x\n", bus->number);
632 walk = &bus->devices;
633 for (walk = walk->next; walk != &bus->devices; walk = walk->next) {
634 struct pci_dev *dev = pci_dev_b(walk);
637 * Comment from i386 branch:
638 * There are buggy BIOSes that forget to enable I/O and memory
639 * access to PCI devices. We try to fix this, but we need to
640 * be sure that the BIOS didn't forget to assign an address
641 * to the device. [mj]
642 * OBP is a case of such BIOS :-)
644 has_io = has_mem = 0;
646 unsigned long f = dev->resource[i].flags;
647 if (f & IORESOURCE_IO) {
649 } else if (f & IORESOURCE_MEM)
652 pcic_read_config(dev->bus, dev->devfn, PCI_COMMAND, 2, &cmd);
653 if (has_io && !(cmd & PCI_COMMAND_IO)) {
654 printk("PCIC: Enabling I/O for device %02x:%02x\n",
655 dev->bus->number, dev->devfn);
656 cmd |= PCI_COMMAND_IO;
657 pcic_write_config(dev->bus, dev->devfn,
658 PCI_COMMAND, 2, cmd);
660 if (has_mem && !(cmd & PCI_COMMAND_MEMORY)) {
661 printk("PCIC: Enabling memory for device %02x:%02x\n",
662 dev->bus->number, dev->devfn);
663 cmd |= PCI_COMMAND_MEMORY;
664 pcic_write_config(dev->bus, dev->devfn,
665 PCI_COMMAND, 2, cmd);
668 node = pdev_to_pnode(&pcic->pbm, dev);
673 pcp = pci_devcookie_alloc();
674 pcp->pbm = &pcic->pbm;
675 pcp->prom_node = node;
678 /* fixing I/O to look like memory */
679 if ((dev->class>>16) != PCI_BASE_CLASS_BRIDGE)
680 pcic_map_pci_device(pcic, dev, node);
682 pcic_fill_irq(pcic, dev, node);
687 * pcic_pin_to_irq() is exported to ebus.c.
690 pcic_pin_to_irq(unsigned int pin, char *name)
692 struct linux_pcic *pcic = &pcic0;
697 ivec = readw(pcic->pcic_regs+PCI_INT_SELECT_LO);
698 irq = ivec >> (pin << 2) & 0xF;
699 } else if (pin < 8) {
700 ivec = readw(pcic->pcic_regs+PCI_INT_SELECT_HI);
701 irq = ivec >> ((pin-4) << 2) & 0xF;
702 } else { /* Corrupted map */
703 printk("PCIC: BAD PIN %d FOR %s\n", pin, name);
704 for (;;) {} /* XXX Cannot panic properly in case of PROLL */
706 /* P3 */ /* printk("PCIC: dev %s pin %d ivec 0x%x irq %x\n", name, pin, ivec, irq); */
710 /* Makes compiler happy */
711 static volatile int pcic_timer_dummy;
713 static void pcic_clear_clock_irq(void)
715 pcic_timer_dummy = readl(pcic0.pcic_regs+PCI_SYS_LIMIT);
718 static irqreturn_t pcic_timer_handler (int irq, void *h, struct pt_regs *regs)
720 write_seqlock(&xtime_lock); /* Dummy, to show that we remember */
721 pcic_clear_clock_irq();
723 write_sequnlock(&xtime_lock);
727 #define USECS_PER_JIFFY 10000 /* We have 100HZ "standard" timer for sparc */
728 #define TICK_TIMER_LIMIT ((100*1000000/4)/100)
730 void __init pci_time_init(void)
732 struct linux_pcic *pcic = &pcic0;
736 /* A hack until do_gettimeofday prototype is moved to arch specific headers
737 and btfixupped. Patch do_gettimeofday with ba pci_do_gettimeofday; nop */
738 ((unsigned int *)do_gettimeofday)[0] =
739 0x10800000 | ((((unsigned long)pci_do_gettimeofday -
740 (unsigned long)do_gettimeofday) >> 2) & 0x003fffff);
741 ((unsigned int *)do_gettimeofday)[1] = 0x01000000;
742 BTFIXUPSET_CALL(bus_do_settimeofday, pci_do_settimeofday, BTFIXUPCALL_NORM);
745 writel (TICK_TIMER_LIMIT, pcic->pcic_regs+PCI_SYS_LIMIT);
746 /* PROM should set appropriate irq */
747 v = readb(pcic->pcic_regs+PCI_COUNTER_IRQ);
748 timer_irq = PCI_COUNTER_IRQ_SYS(v);
749 writel (PCI_COUNTER_IRQ_SET(timer_irq, 0),
750 pcic->pcic_regs+PCI_COUNTER_IRQ);
751 irq = request_irq(timer_irq, pcic_timer_handler,
752 (SA_INTERRUPT | SA_STATIC_ALLOC), "timer", NULL);
754 prom_printf("time_init: unable to attach IRQ%d\n", timer_irq);
760 static __inline__ unsigned long do_gettimeoffset(void)
763 * We devide all to 100
764 * to have microsecond resolution and to avoid overflow
766 unsigned long count =
767 readl(pcic0.pcic_regs+PCI_SYS_COUNTER) & ~PCI_SYS_COUNTER_OVERFLOW;
768 count = ((count/100)*USECS_PER_JIFFY) / (TICK_TIMER_LIMIT/100);
772 extern unsigned long wall_jiffies;
774 static void pci_do_gettimeofday(struct timeval *tv)
778 unsigned long usec, sec;
779 unsigned long max_ntp_tick = tick_usec - tickadj;
784 seq = read_seqbegin_irqsave(&xtime_lock, flags);
785 usec = do_gettimeoffset();
786 lost = jiffies - wall_jiffies;
789 * If time_adjust is negative then NTP is slowing the clock
790 * so make sure not to go into next possible interval.
791 * Better to lose some accuracy than have time go backwards..
793 if (unlikely(time_adjust < 0)) {
794 usec = min(usec, max_ntp_tick);
797 usec += lost * max_ntp_tick;
799 else if (unlikely(lost))
800 usec += lost * tick_usec;
803 usec += (xtime.tv_nsec / 1000);
804 } while (read_seqretry_irqrestore(&xtime_lock, seq, flags));
806 while (usec >= 1000000) {
815 static int pci_do_settimeofday(struct timespec *tv)
817 if ((unsigned long)tv->tv_nsec >= NSEC_PER_SEC)
821 * This is revolting. We need to set "xtime" correctly. However, the
822 * value in this location is the value at the most recent update of
823 * wall time. Discover what correction gettimeofday() would have
824 * made, and then undo it!
826 tv->tv_nsec -= 1000 * (do_gettimeoffset() +
827 (jiffies - wall_jiffies) * (USEC_PER_SEC / HZ));
828 while (tv->tv_nsec < 0) {
829 tv->tv_nsec += NSEC_PER_SEC;
833 wall_to_monotonic.tv_sec += xtime.tv_sec - tv->tv_sec;
834 wall_to_monotonic.tv_nsec += xtime.tv_nsec - tv->tv_nsec;
836 if (wall_to_monotonic.tv_nsec > NSEC_PER_SEC) {
837 wall_to_monotonic.tv_nsec -= NSEC_PER_SEC;
838 wall_to_monotonic.tv_sec++;
840 if (wall_to_monotonic.tv_nsec < 0) {
841 wall_to_monotonic.tv_nsec += NSEC_PER_SEC;
842 wall_to_monotonic.tv_sec--;
845 xtime.tv_sec = tv->tv_sec;
846 xtime.tv_nsec = tv->tv_nsec;
847 time_adjust = 0; /* stop active adjtime() */
848 time_status |= STA_UNSYNC;
849 time_maxerror = NTP_PHASE_LIMIT;
850 time_esterror = NTP_PHASE_LIMIT;
855 static void watchdog_reset() {
856 writeb(0, pcic->pcic_regs+PCI_SYS_STATUS);
861 * Other archs parse arguments here.
863 char * __init pcibios_setup(char *str)
868 void pcibios_align_resource(void *data, struct resource *res,
869 unsigned long size, unsigned long align)
873 int pcibios_enable_device(struct pci_dev *pdev, int mask)
881 void pcic_nmi(unsigned int pend, struct pt_regs *regs)
884 pend = flip_dword(pend);
886 if (!pcic_speculative || (pend & PCI_SYS_INT_PENDING_PIO) == 0) {
888 * XXX On CP-1200 PCI #SERR may happen, we do not know
889 * what to do about it yet.
891 printk("Aiee, NMI pend 0x%x pc 0x%x spec %d, hanging\n",
892 pend, (int)regs->pc, pcic_speculative);
895 pcic_speculative = 0;
897 regs->pc = regs->npc;
901 static inline unsigned long get_irqmask(int irq_nr)
906 static inline char *pcic_irq_itoa(unsigned int irq)
908 static char buff[16];
909 sprintf(buff, "%d", irq);
913 static void pcic_disable_irq(unsigned int irq_nr)
915 unsigned long mask, flags;
917 mask = get_irqmask(irq_nr);
918 local_irq_save(flags);
919 writel(mask, pcic0.pcic_regs+PCI_SYS_INT_TARGET_MASK_SET);
920 local_irq_restore(flags);
923 static void pcic_enable_irq(unsigned int irq_nr)
925 unsigned long mask, flags;
927 mask = get_irqmask(irq_nr);
928 local_irq_save(flags);
929 writel(mask, pcic0.pcic_regs+PCI_SYS_INT_TARGET_MASK_CLEAR);
930 local_irq_restore(flags);
933 static void pcic_clear_profile_irq(int cpu)
935 printk("PCIC: unimplemented code: FILE=%s LINE=%d", __FILE__, __LINE__);
938 static void pcic_load_profile_irq(int cpu, unsigned int limit)
940 printk("PCIC: unimplemented code: FILE=%s LINE=%d", __FILE__, __LINE__);
943 /* We assume the caller has disabled local interrupts when these are called,
944 * or else very bizarre behavior will result.
946 static void pcic_disable_pil_irq(unsigned int pil)
948 writel(get_irqmask(pil), pcic0.pcic_regs+PCI_SYS_INT_TARGET_MASK_SET);
951 static void pcic_enable_pil_irq(unsigned int pil)
953 writel(get_irqmask(pil), pcic0.pcic_regs+PCI_SYS_INT_TARGET_MASK_CLEAR);
956 void __init sun4m_pci_init_IRQ(void)
958 BTFIXUPSET_CALL(enable_irq, pcic_enable_irq, BTFIXUPCALL_NORM);
959 BTFIXUPSET_CALL(disable_irq, pcic_disable_irq, BTFIXUPCALL_NORM);
960 BTFIXUPSET_CALL(enable_pil_irq, pcic_enable_pil_irq, BTFIXUPCALL_NORM);
961 BTFIXUPSET_CALL(disable_pil_irq, pcic_disable_pil_irq, BTFIXUPCALL_NORM);
962 BTFIXUPSET_CALL(clear_clock_irq, pcic_clear_clock_irq, BTFIXUPCALL_NORM);
963 BTFIXUPSET_CALL(clear_profile_irq, pcic_clear_profile_irq, BTFIXUPCALL_NORM);
964 BTFIXUPSET_CALL(load_profile_irq, pcic_load_profile_irq, BTFIXUPCALL_NORM);
965 BTFIXUPSET_CALL(__irq_itoa, pcic_irq_itoa, BTFIXUPCALL_NORM);
968 int pcibios_assign_resource(struct pci_dev *pdev, int resource)
974 * This probably belongs here rather than ioport.c because
975 * we do not want this crud linked into SBus kernels.
976 * Also, think for a moment about likes of floppy.c that
977 * include architecture specific parts. They may want to redefine ins/outs.
979 * We do not use horroble macroses here because we want to
980 * advance pointer by sizeof(size).
982 void outsb(unsigned long addr, const void *src, unsigned long count) {
985 writeb(*(const char *)src, addr);
991 void outsw(unsigned long addr, const void *src, unsigned long count) {
994 writew(*(const short *)src, addr);
1000 void outsl(unsigned long addr, const void *src, unsigned long count) {
1003 writel(*(const long *)src, addr);
1009 void insb(unsigned long addr, void *dst, unsigned long count) {
1012 *(unsigned char *)dst = readb(addr);
1018 void insw(unsigned long addr, void *dst, unsigned long count) {
1021 *(unsigned short *)dst = readw(addr);
1027 void insl(unsigned long addr, void *dst, unsigned long count) {
1031 * XXX I am sure we are in for an unaligned trap here.
1033 *(unsigned long *)dst = readl(addr);
1039 subsys_initcall(pcic_init);