arch/sparc/kernel/sun4m_smp.c

   1 /* sun4m_smp.c: Sparc SUN4M SMP support.
   2  *
   3  * Copyright (C) 1996 David S. Miller (davem@caip.rutgers.edu)
   4  */
   5
   6 #include <asm/head.h>
   7
   8 #include <linux/kernel.h>
   9 #include <linux/sched.h>
  10 #include <linux/threads.h>
  11 #include <linux/smp.h>
  12 #include <linux/smp_lock.h>
  13 #include <linux/interrupt.h>
  14 #include <linux/kernel_stat.h>
  15 #include <linux/init.h>
  16 #include <linux/spinlock.h>
  17 #include <linux/mm.h>
  18 #include <linux/swap.h>
  19 #include <asm/cacheflush.h>
  20 #include <asm/tlbflush.h>
  21
  22 #include <asm/ptrace.h>
  23 #include <asm/atomic.h>
  24
  25 #include <asm/delay.h>
  26 #include <asm/irq.h>
  27 #include <asm/page.h>
  28 #include <asm/pgalloc.h>
  29 #include <asm/pgtable.h>
  30 #include <asm/oplib.h>
  31 #include <asm/hardirq.h>
  32 #include <asm/cpudata.h>
  33
  34 #define IRQ_RESCHEDULE          13
  35 #define IRQ_STOP_CPU            14
  36 #define IRQ_CROSS_CALL          15
  37
  38 extern ctxd_t *srmmu_ctx_table_phys;
  39
  40 extern void calibrate_delay(void);
  41
  42 extern volatile int smp_processors_ready;
  43 extern int smp_num_cpus;
  44 extern int smp_threads_ready;
  45 extern volatile unsigned long cpu_callin_map[NR_CPUS];
  46 extern unsigned char boot_cpu_id;
  47 extern int smp_activated;
  48 extern volatile int __cpu_number_map[NR_CPUS];
  49 extern volatile int __cpu_logical_map[NR_CPUS];
  50 extern volatile unsigned long ipi_count;
  51 extern volatile int smp_process_available;
  52 extern volatile int smp_commenced;
  53 extern int __smp4m_processor_id(void);
  54
  55 /*#define SMP_DEBUG*/
  56
  57 #ifdef SMP_DEBUG
  58 #define SMP_PRINTK(x)   printk x
  59 #else
  60 #define SMP_PRINTK(x)
  61 #endif
  62
  63 static inline unsigned long swap(volatile unsigned long *ptr, unsigned long val)
  64 {
  65         __asm__ __volatile__("swap [%1], %0\n\t" :
  66                              "=&r" (val), "=&r" (ptr) :
  67                              "0" (val), "1" (ptr));
  68         return val;
  69 }
  70
  71 static void smp_setup_percpu_timer(void);
  72 extern void cpu_probe(void);
  73
  74 void __init smp4m_callin(void)
  75 {
  76         int cpuid = hard_smp_processor_id();
  77
  78         local_flush_cache_all();
  79         local_flush_tlb_all();
  80
  81         set_irq_udt(boot_cpu_id);
  82
  83         /* Get our local ticker going. */
  84         smp_setup_percpu_timer();
  85
  86         calibrate_delay();
  87         smp_store_cpu_info(cpuid);
  88
  89         local_flush_cache_all();
  90         local_flush_tlb_all();
  91
  92         /*
  93          * Unblock the master CPU _only_ when the scheduler state
  94          * of all secondary CPUs will be up-to-date, so after
  95          * the SMP initialization the master will be just allowed
  96          * to call the scheduler code.
  97          */
  98         /* Allow master to continue. */
  99         swap((unsigned long *)&cpu_callin_map[cpuid], 1);
 100
 101         local_flush_cache_all();
 102         local_flush_tlb_all();
 103
 104         cpu_probe();
 105
 106         /* Fix idle thread fields. */
 107         __asm__ __volatile__("ld [%0], %%g6\n\t"
 108                              : : "r" (&current_set[cpuid])
 109                              : "memory" /* paranoid */);
 110
 111         /* Attach to the address space of init_task. */
 112         atomic_inc(&init_mm.mm_count);
 113         current->active_mm = &init_mm;
 114
 115         while(!smp_commenced)
 116                 barrier();
 117
 118         local_flush_cache_all();
 119         local_flush_tlb_all();
 120
 121         local_irq_enable();
 122 }
 123
 124 extern int cpu_idle(void *unused);
 125 extern void init_IRQ(void);
 126 extern void cpu_panic(void);
 127
 128 /*
 129  *      Cycle through the processors asking the PROM to start each one.
 130  */
 131
 132 extern struct linux_prom_registers smp_penguin_ctable;
 133 extern unsigned long trapbase_cpu1[];
 134 extern unsigned long trapbase_cpu2[];
 135 extern unsigned long trapbase_cpu3[];
 136
 137 void __init smp4m_boot_cpus(void)
 138 {
 139         int cpucount = 0;
 140         int i, mid;
 141
 142         printk("Entering SMP Mode...\n");
 143
 144         local_irq_enable();
 145         cpus_clear(cpu_present_map);
 146
 147         for (i = 0; !cpu_find_by_instance(i, NULL, &mid); i++)
 148                 cpu_set(mid, cpu_present_map);
 149
 150         for(i=0; i < NR_CPUS; i++) {
 151                 __cpu_number_map[i] = -1;
 152                 __cpu_logical_map[i] = -1;
 153         }
 154
 155         __cpu_number_map[boot_cpu_id] = 0;
 156         __cpu_logical_map[0] = boot_cpu_id;
 157         current_thread_info()->cpu = boot_cpu_id;
 158
 159         smp_store_cpu_info(boot_cpu_id);
 160         set_irq_udt(boot_cpu_id);
 161         smp_setup_percpu_timer();
 162         local_flush_cache_all();
 163         if(cpu_find_by_instance(1, NULL, NULL))
 164                 return;  /* Not an MP box. */
 165         for(i = 0; i < NR_CPUS; i++) {
 166                 if(i == boot_cpu_id)
 167                         continue;
 168
 169                 if (cpu_isset(i, cpu_present_map)) {
 170                         extern unsigned long sun4m_cpu_startup;
 171                         unsigned long *entry = &sun4m_cpu_startup;
 172                         struct task_struct *p;
 173                         int timeout;
 174
 175                         /* Cook up an idler for this guy. */
 176                         kernel_thread(start_secondary, NULL, CLONE_IDLETASK);
 177
 178                         cpucount++;
 179
 180                         p = prev_task(&init_task);
 181
 182                         init_idle(p, i);
 183
 184                         current_set[i] = p->thread_info;
 185
 186                         unhash_process(p);
 187
 188                         /* See trampoline.S for details... */
 189                         entry += ((i-1) * 3);
 190
 191                         /*
 192                          * Initialize the contexts table
 193                          * Since the call to prom_startcpu() trashes the structure,
 194                          * we need to re-initialize it for each cpu
 195                          */
 196                         smp_penguin_ctable.which_io = 0;
 197                         smp_penguin_ctable.phys_addr = (unsigned int) srmmu_ctx_table_phys;
 198                         smp_penguin_ctable.reg_size = 0;
 199
 200                         /* whirrr, whirrr, whirrrrrrrrr... */
 201                         printk("Starting CPU %d at %p\n", i, entry);
 202                         local_flush_cache_all();
 203                         prom_startcpu(cpu_data(i).prom_node,
 204                                       &smp_penguin_ctable, 0, (char *)entry);
 205
 206                         /* wheee... it's going... */
 207                         for(timeout = 0; timeout < 10000; timeout++) {
 208                                 if(cpu_callin_map[i])
 209                                         break;
 210                                 udelay(200);
 211                         }
 212                         if(cpu_callin_map[i]) {
 213                                 /* Another "Red Snapper". */
 214                                 __cpu_number_map[i] = i;
 215                                 __cpu_logical_map[i] = i;
 216                         } else {
 217                                 cpucount--;
 218                                 printk("Processor %d is stuck.\n", i);
 219                         }
 220                 }
 221                 if(!(cpu_callin_map[i])) {
 222                         cpu_clear(i, cpu_present_map);
 223                         __cpu_number_map[i] = -1;
 224                 }
 225         }
 226         local_flush_cache_all();
 227         if(cpucount == 0) {
 228                 printk("Error: only one Processor found.\n");
 229                 cpu_present_map = cpumask_of_cpu(smp_processor_id());
 230         } else {
 231                 unsigned long bogosum = 0;
 232                 for(i = 0; i < NR_CPUS; i++) {
 233                         if (cpu_isset(i, cpu_present_map))
 234                                 bogosum += cpu_data(i).udelay_val;
 235                 }
 236                 printk("Total of %d Processors activated (%lu.%02lu BogoMIPS).\n",
 237                        cpucount + 1,
 238                        bogosum/(500000/HZ),
 239                        (bogosum/(5000/HZ))%100);
 240                 smp_activated = 1;
 241                 smp_num_cpus = cpucount + 1;
 242         }
 243
 244         /* Free unneeded trap tables */
 245         if (!cpu_isset(i, cpu_present_map)) {
 246                 ClearPageReserved(virt_to_page(trapbase_cpu1));
 247                 set_page_count(virt_to_page(trapbase_cpu1), 1);
 248                 free_page((unsigned long)trapbase_cpu1);
 249                 totalram_pages++;
 250                 num_physpages++;
 251         }
 252         if (!cpu_isset(2, cpu_present_map)) {
 253                 ClearPageReserved(virt_to_page(trapbase_cpu2));
 254                 set_page_count(virt_to_page(trapbase_cpu2), 1);
 255                 free_page((unsigned long)trapbase_cpu2);
 256                 totalram_pages++;
 257                 num_physpages++;
 258         }
 259         if (!cpu_isset(3, cpu_present_map)) {
 260                 ClearPageReserved(virt_to_page(trapbase_cpu3));
 261                 set_page_count(virt_to_page(trapbase_cpu3), 1);
 262                 free_page((unsigned long)trapbase_cpu3);
 263                 totalram_pages++;
 264                 num_physpages++;
 265         }
 266
 267         /* Ok, they are spinning and ready to go. */
 268         smp_processors_ready = 1;
 269 }
 270
 271 /* At each hardware IRQ, we get this called to forward IRQ reception
 272  * to the next processor.  The caller must disable the IRQ level being
 273  * serviced globally so that there are no double interrupts received.
 274  *
 275  * XXX See sparc64 irq.c.
 276  */
 277 void smp4m_irq_rotate(int cpu)
 278 {
 279 }
 280
 281 /* Cross calls, in order to work efficiently and atomically do all
 282  * the message passing work themselves, only stopcpu and reschedule
 283  * messages come through here.
 284  */
 285 void smp4m_message_pass(int target, int msg, unsigned long data, int wait)
 286 {
 287         static unsigned long smp_cpu_in_msg[NR_CPUS];
 288         cpumask_t mask;
 289         int me = smp_processor_id();
 290         int irq, i;
 291
 292         if(msg == MSG_RESCHEDULE) {
 293                 irq = IRQ_RESCHEDULE;
 294
 295                 if(smp_cpu_in_msg[me])
 296                         return;
 297         } else if(msg == MSG_STOP_CPU) {
 298                 irq = IRQ_STOP_CPU;
 299         } else {
 300                 goto barf;
 301         }
 302
 303         smp_cpu_in_msg[me]++;
 304         if(target == MSG_ALL_BUT_SELF || target == MSG_ALL) {
 305                 mask = cpu_present_map;
 306                 if(target == MSG_ALL_BUT_SELF)
 307                         cpu_clear(me, mask);
 308                 for(i = 0; i < 4; i++) {
 309                         if (cpu_isset(i, mask))
 310                                 set_cpu_int(i, irq);
 311                 }
 312         } else {
 313                 set_cpu_int(target, irq);
 314         }
 315         smp_cpu_in_msg[me]--;
 316
 317         return;
 318 barf:
 319         printk("Yeeee, trying to send SMP msg(%d) on cpu %d\n", msg, me);
 320         panic("Bogon SMP message pass.");
 321 }
 322
 323 static struct smp_funcall {
 324         smpfunc_t func;
 325         unsigned long arg1;
 326         unsigned long arg2;
 327         unsigned long arg3;
 328         unsigned long arg4;
 329         unsigned long arg5;
 330         unsigned long processors_in[NR_CPUS];  /* Set when ipi entered. */
 331         unsigned long processors_out[NR_CPUS]; /* Set when ipi exited. */
 332 } ccall_info;
 333
 334 static spinlock_t cross_call_lock = SPIN_LOCK_UNLOCKED;
 335
 336 /* Cross calls must be serialized, at least currently. */
 337 void smp4m_cross_call(smpfunc_t func, unsigned long arg1, unsigned long arg2,
 338                     unsigned long arg3, unsigned long arg4, unsigned long arg5)
 339 {
 340         if(smp_processors_ready) {
 341                 register int ncpus = smp_num_cpus;
 342                 unsigned long flags;
 343
 344                 spin_lock_irqsave(&cross_call_lock, flags);
 345
 346                 /* Init function glue. */
 347                 ccall_info.func = func;
 348                 ccall_info.arg1 = arg1;
 349                 ccall_info.arg2 = arg2;
 350                 ccall_info.arg3 = arg3;
 351                 ccall_info.arg4 = arg4;
 352                 ccall_info.arg5 = arg5;
 353
 354                 /* Init receive/complete mapping, plus fire the IPI's off. */
 355                 {
 356                         cpumask_t mask = cpu_present_map;
 357                         register int i;
 358
 359                         cpu_clear(smp_processor_id(), mask);
 360                         for(i = 0; i < ncpus; i++) {
 361                                 if (cpu_isset(i, mask)) {
 362                                         ccall_info.processors_in[i] = 0;
 363                                         ccall_info.processors_out[i] = 0;
 364                                         set_cpu_int(i, IRQ_CROSS_CALL);
 365                                 } else {
 366                                         ccall_info.processors_in[i] = 1;
 367                                         ccall_info.processors_out[i] = 1;
 368                                 }
 369                         }
 370                 }
 371
 372                 {
 373                         register int i;
 374
 375                         i = 0;
 376                         do {
 377                                 while(!ccall_info.processors_in[i])
 378                                         barrier();
 379                         } while(++i < ncpus);
 380
 381                         i = 0;
 382                         do {
 383                                 while(!ccall_info.processors_out[i])
 384                                         barrier();
 385                         } while(++i < ncpus);
 386                 }
 387
 388                 spin_unlock_irqrestore(&cross_call_lock, flags);
 389         }
 390 }
 391
 392 /* Running cross calls. */
 393 void smp4m_cross_call_irq(void)
 394 {
 395         int i = smp_processor_id();
 396
 397         ccall_info.processors_in[i] = 1;
 398         ccall_info.func(ccall_info.arg1, ccall_info.arg2, ccall_info.arg3,
 399                         ccall_info.arg4, ccall_info.arg5);
 400         ccall_info.processors_out[i] = 1;
 401 }
 402
 403 extern void sparc_do_profile(unsigned long pc, unsigned long o7);
 404
 405 void smp4m_percpu_timer_interrupt(struct pt_regs *regs)
 406 {
 407         int cpu = smp_processor_id();
 408
 409         clear_profile_irq(cpu);
 410
 411         if(!user_mode(regs))
 412                 sparc_do_profile(regs->pc, regs->u_regs[UREG_RETPC]);
 413
 414         if(!--prof_counter(cpu)) {
 415                 int user = user_mode(regs);
 416
 417                 irq_enter();
 418                 update_process_times(user);
 419                 irq_exit();
 420
 421                 prof_counter(cpu) = prof_multiplier(cpu);
 422         }
 423 }
 424
 425 extern unsigned int lvl14_resolution;
 426
 427 static void __init smp_setup_percpu_timer(void)
 428 {
 429         int cpu = smp_processor_id();
 430
 431         prof_counter(cpu) = prof_multiplier(cpu) = 1;
 432         load_profile_irq(cpu, lvl14_resolution);
 433
 434         if(cpu == boot_cpu_id)
 435                 enable_pil_irq(14);
 436 }
 437
 438 void __init smp4m_blackbox_id(unsigned *addr)
 439 {
 440         int rd = *addr & 0x3e000000;
 441         int rs1 = rd >> 11;
 442
 443         addr[0] = 0x81580000 | rd;              /* rd %tbr, reg */
 444         addr[1] = 0x8130200c | rd | rs1;        /* srl reg, 0xc, reg */
 445         addr[2] = 0x80082003 | rd | rs1;        /* and reg, 3, reg */
 446 }
 447
 448 void __init smp4m_blackbox_current(unsigned *addr)
 449 {
 450         int rd = *addr & 0x3e000000;
 451         int rs1 = rd >> 11;
 452
 453         addr[0] = 0x81580000 | rd;              /* rd %tbr, reg */
 454         addr[2] = 0x8130200a | rd | rs1;        /* srl reg, 0xa, reg */
 455         addr[4] = 0x8008200c | rd | rs1;        /* and reg, 3, reg */
 456 }
 457
 458 void __init sun4m_init_smp(void)
 459 {
 460         BTFIXUPSET_BLACKBOX(hard_smp_processor_id, smp4m_blackbox_id);
 461         BTFIXUPSET_BLACKBOX(load_current, smp4m_blackbox_current);
 462         BTFIXUPSET_CALL(smp_cross_call, smp4m_cross_call, BTFIXUPCALL_NORM);
 463         BTFIXUPSET_CALL(smp_message_pass, smp4m_message_pass, BTFIXUPCALL_NORM);
 464         BTFIXUPSET_CALL(__hard_smp_processor_id, __smp4m_processor_id, BTFIXUPCALL_NORM);
 465 }