1 /* $Id: pci_common.c,v 1.29 2002/02/01 00:56:03 davem Exp $
2 * pci_common.c: PCI controller common support.
4 * Copyright (C) 1999 David S. Miller (davem@redhat.com)
7 #include <linux/string.h>
8 #include <linux/slab.h>
9 #include <linux/init.h>
13 /* Fix self device of BUS and hook it into BUS->self.
14 * The pci_scan_bus does not do this for the host bridge.
16 void __init pci_fixup_host_bridge_self(struct pci_bus *pbus)
18 struct list_head *walk = &pbus->devices;
21 while (walk != &pbus->devices) {
22 struct pci_dev *pdev = pci_dev_b(walk);
24 if (pdev->class >> 8 == PCI_CLASS_BRIDGE_HOST) {
32 prom_printf("PCI: Critical error, cannot find host bridge PDEV.\n");
36 /* Find the OBP PROM device tree node for a PCI device.
37 * Return zero if not found.
39 static int __init find_device_prom_node(struct pci_pbm_info *pbm,
42 struct linux_prom_pci_registers *pregs,
48 * Return the PBM's PROM node in case we are it's PCI device,
49 * as the PBM's reg property is different to standard PCI reg
50 * properties. We would delete this device entry otherwise,
51 * which confuses XFree86's device probing...
53 if ((pdev->bus->number == pbm->pci_bus->number) && (pdev->devfn == 0) &&
54 (pdev->vendor == PCI_VENDOR_ID_SUN) &&
55 (pdev->device == PCI_DEVICE_ID_SUN_PBM ||
56 pdev->device == PCI_DEVICE_ID_SUN_SCHIZO ||
57 pdev->device == PCI_DEVICE_ID_SUN_TOMATILLO ||
58 pdev->device == PCI_DEVICE_ID_SUN_SABRE ||
59 pdev->device == PCI_DEVICE_ID_SUN_HUMMINGBIRD)) {
64 node = prom_getchild(bus_prom_node);
66 int err = prom_getproperty(node, "reg",
68 sizeof(*pregs) * PROMREG_MAX);
69 if (err == 0 || err == -1)
71 if (((pregs[0].phys_hi >> 8) & 0xff) == pdev->devfn) {
72 *nregs = err / sizeof(*pregs);
77 node = prom_getsibling(node);
82 /* Older versions of OBP on PCI systems encode 64-bit MEM
83 * space assignments incorrectly, this fixes them up. We also
84 * take the opportunity here to hide other kinds of bogus
87 static void __init fixup_obp_assignments(struct pci_dev *pdev,
88 struct pcidev_cookie *pcp)
92 if (pdev->vendor == PCI_VENDOR_ID_AL &&
93 (pdev->device == PCI_DEVICE_ID_AL_M7101 ||
94 pdev->device == PCI_DEVICE_ID_AL_M1533)) {
97 /* Zap all of the normal resources, they are
98 * meaningless and generate bogus resource collision
99 * messages. This is OpenBoot's ill-fated attempt to
100 * represent the implicit resources that these devices
103 pcp->num_prom_assignments = 0;
104 for (i = 0; i < 6; i++) {
105 pdev->resource[i].start =
106 pdev->resource[i].end =
107 pdev->resource[i].flags = 0;
109 pdev->resource[PCI_ROM_RESOURCE].start =
110 pdev->resource[PCI_ROM_RESOURCE].end =
111 pdev->resource[PCI_ROM_RESOURCE].flags = 0;
115 for (i = 0; i < pcp->num_prom_assignments; i++) {
116 struct linux_prom_pci_registers *ap;
119 ap = &pcp->prom_assignments[i];
120 space = ap->phys_hi >> 24;
121 if ((space & 0x3) == 2 &&
122 (space & 0x4) != 0) {
123 ap->phys_hi &= ~(0x7 << 24);
124 ap->phys_hi |= 0x3 << 24;
129 /* Fill in the PCI device cookie sysdata for the given
130 * PCI device. This cookie is the means by which one
131 * can get to OBP and PCI controller specific information
134 static void __init pdev_cookie_fillin(struct pci_pbm_info *pbm,
135 struct pci_dev *pdev,
138 struct linux_prom_pci_registers pregs[PROMREG_MAX];
139 struct pcidev_cookie *pcp;
140 int device_prom_node, nregs, err;
142 device_prom_node = find_device_prom_node(pbm, pdev, bus_prom_node,
144 if (device_prom_node == 0) {
145 /* If it is not in the OBP device tree then
146 * there must be a damn good reason for it.
148 * So what we do is delete the device from the
149 * PCI device tree completely. This scenario
150 * is seen, for example, on CP1500 for the
151 * second EBUS/HappyMeal pair if the external
152 * connector for it is not present.
154 pci_remove_bus_device(pdev);
158 pcp = kmalloc(sizeof(*pcp), GFP_ATOMIC);
160 prom_printf("PCI_COOKIE: Fatal malloc error, aborting...\n");
164 pcp->prom_node = device_prom_node;
165 memcpy(pcp->prom_regs, pregs, sizeof(pcp->prom_regs));
166 pcp->num_prom_regs = nregs;
167 err = prom_getproperty(device_prom_node, "name",
168 pcp->prom_name, sizeof(pcp->prom_name));
170 pcp->prom_name[err] = 0;
172 pcp->prom_name[0] = 0;
174 err = prom_getproperty(device_prom_node,
175 "assigned-addresses",
176 (char *)pcp->prom_assignments,
177 sizeof(pcp->prom_assignments));
178 if (err == 0 || err == -1)
179 pcp->num_prom_assignments = 0;
181 pcp->num_prom_assignments =
182 (err / sizeof(pcp->prom_assignments[0]));
184 if (strcmp(pcp->prom_name, "ebus") == 0) {
185 struct linux_prom_ebus_ranges erng[PROM_PCIRNG_MAX];
188 /* EBUS is special... */
189 err = prom_getproperty(device_prom_node, "ranges",
190 (char *)&erng[0], sizeof(erng));
191 if (err == 0 || err == -1) {
192 prom_printf("EBUS: Fatal error, no range property\n");
195 err = (err / sizeof(erng[0]));
196 for(iter = 0; iter < err; iter++) {
197 struct linux_prom_ebus_ranges *ep = &erng[iter];
198 struct linux_prom_pci_registers *ap;
200 ap = &pcp->prom_assignments[iter];
202 ap->phys_hi = ep->parent_phys_hi;
203 ap->phys_mid = ep->parent_phys_mid;
204 ap->phys_lo = ep->parent_phys_lo;
206 ap->size_lo = ep->size;
208 pcp->num_prom_assignments = err;
211 fixup_obp_assignments(pdev, pcp);
216 void __init pci_fill_in_pbm_cookies(struct pci_bus *pbus,
217 struct pci_pbm_info *pbm,
220 struct list_head *walk = &pbus->devices;
222 /* This loop is coded like this because the cookie
223 * fillin routine can delete devices from the tree.
226 while (walk != &pbus->devices) {
227 struct pci_dev *pdev = pci_dev_b(walk);
228 struct list_head *walk_next = walk->next;
230 pdev_cookie_fillin(pbm, pdev, prom_node);
235 walk = &pbus->children;
237 while (walk != &pbus->children) {
238 struct pci_bus *this_pbus = pci_bus_b(walk);
239 struct pcidev_cookie *pcp = this_pbus->self->sysdata;
240 struct list_head *walk_next = walk->next;
242 pci_fill_in_pbm_cookies(this_pbus, pbm, pcp->prom_node);
248 static void __init bad_assignment(struct pci_dev *pdev,
249 struct linux_prom_pci_registers *ap,
250 struct resource *res,
253 prom_printf("PCI: Bogus PROM assignment. BUS[%02x] DEVFN[%x]\n",
254 pdev->bus->number, pdev->devfn);
256 prom_printf("PCI: phys[%08x:%08x:%08x] size[%08x:%08x]\n",
257 ap->phys_hi, ap->phys_mid, ap->phys_lo,
258 ap->size_hi, ap->size_lo);
260 prom_printf("PCI: RES[%016lx-->%016lx:(%lx)]\n",
261 res->start, res->end, res->flags);
262 prom_printf("Please email this information to davem@redhat.com\n");
267 static struct resource *
268 __init get_root_resource(struct linux_prom_pci_registers *ap,
269 struct pci_pbm_info *pbm)
271 int space = (ap->phys_hi >> 24) & 3;
275 /* Configuration space, silently ignore it. */
279 /* 16-bit IO space */
280 return &pbm->io_space;
283 /* 32-bit MEM space */
284 return &pbm->mem_space;
287 /* 64-bit MEM space, these are allocated out of
288 * the 32-bit mem_space range for the PBM, ie.
289 * we just zero out the upper 32-bits.
291 return &pbm->mem_space;
294 printk("PCI: What is resource space %x? "
295 "Tell davem@redhat.com about it!\n", space);
300 static struct resource *
301 __init get_device_resource(struct linux_prom_pci_registers *ap,
302 struct pci_dev *pdev)
304 struct resource *res;
305 int breg = (ap->phys_hi & 0xff);
308 case PCI_ROM_ADDRESS:
309 /* Unfortunately I have seen several cases where
310 * buggy FCODE uses a space value of '1' (I/O space)
311 * in the register property for the ROM address
312 * so disable this sanity check for now.
316 int space = (ap->phys_hi >> 24) & 3;
318 /* It had better be MEM space. */
320 bad_assignment(pdev, ap, NULL, 0);
323 res = &pdev->resource[PCI_ROM_RESOURCE];
326 case PCI_BASE_ADDRESS_0:
327 case PCI_BASE_ADDRESS_1:
328 case PCI_BASE_ADDRESS_2:
329 case PCI_BASE_ADDRESS_3:
330 case PCI_BASE_ADDRESS_4:
331 case PCI_BASE_ADDRESS_5:
332 res = &pdev->resource[(breg - PCI_BASE_ADDRESS_0) / 4];
336 bad_assignment(pdev, ap, NULL, 0);
344 static int __init pdev_resource_collisions_expected(struct pci_dev *pdev)
346 if (pdev->vendor != PCI_VENDOR_ID_SUN)
349 if (pdev->device == PCI_DEVICE_ID_SUN_RIO_EBUS ||
350 pdev->device == PCI_DEVICE_ID_SUN_RIO_1394 ||
351 pdev->device == PCI_DEVICE_ID_SUN_RIO_USB)
357 static void __init pdev_record_assignments(struct pci_pbm_info *pbm,
358 struct pci_dev *pdev)
360 struct pcidev_cookie *pcp = pdev->sysdata;
363 for (i = 0; i < pcp->num_prom_assignments; i++) {
364 struct linux_prom_pci_registers *ap;
365 struct resource *root, *res;
367 /* The format of this property is specified in
368 * the PCI Bus Binding to IEEE1275-1994.
370 ap = &pcp->prom_assignments[i];
371 root = get_root_resource(ap, pbm);
372 res = get_device_resource(ap, pdev);
373 if (root == NULL || res == NULL ||
377 /* Ok we know which resource this PROM assignment is
378 * for, sanity check it.
380 if ((res->start & 0xffffffffUL) != ap->phys_lo)
381 bad_assignment(pdev, ap, res, 1);
383 /* If it is a 64-bit MEM space assignment, verify that
384 * the resource is too and that the upper 32-bits match.
386 if (((ap->phys_hi >> 24) & 3) == 3) {
387 if (((res->flags & IORESOURCE_MEM) == 0) ||
388 ((res->flags & PCI_BASE_ADDRESS_MEM_TYPE_MASK)
389 != PCI_BASE_ADDRESS_MEM_TYPE_64))
390 bad_assignment(pdev, ap, res, 1);
391 if ((res->start >> 32) != ap->phys_mid)
392 bad_assignment(pdev, ap, res, 1);
394 /* PBM cannot generate cpu initiated PIOs
395 * to the full 64-bit space. Therefore the
396 * upper 32-bits better be zero. If it is
397 * not, just skip it and we will assign it
398 * properly ourselves.
400 if ((res->start >> 32) != 0UL) {
401 printk(KERN_ERR "PCI: OBP assigns out of range MEM address "
402 "%016lx for region %ld on device %s\n",
403 res->start, (res - &pdev->resource[0]), pci_name(pdev));
408 /* Adjust the resource into the physical address space
411 pbm->parent->resource_adjust(pdev, res, root);
413 if (request_resource(root, res) < 0) {
414 /* OK, there is some conflict. But this is fine
415 * since we'll reassign it in the fixup pass.
417 * We notify the user that OBP made an error if it
418 * is a case we don't expect.
420 if (!pdev_resource_collisions_expected(pdev)) {
421 printk(KERN_ERR "PCI: Address space collision on region %ld "
422 "[%016lx:%016lx] of device %s\n",
423 (res - &pdev->resource[0]),
424 res->start, res->end,
431 void __init pci_record_assignments(struct pci_pbm_info *pbm,
432 struct pci_bus *pbus)
434 struct list_head *walk = &pbus->devices;
436 for (walk = walk->next; walk != &pbus->devices; walk = walk->next)
437 pdev_record_assignments(pbm, pci_dev_b(walk));
439 walk = &pbus->children;
440 for (walk = walk->next; walk != &pbus->children; walk = walk->next)
441 pci_record_assignments(pbm, pci_bus_b(walk));
444 /* Return non-zero if PDEV has implicit I/O resources even
445 * though it may not have an I/O base address register
448 static int __init has_implicit_io(struct pci_dev *pdev)
450 int class = pdev->class >> 8;
452 if (class == PCI_CLASS_NOT_DEFINED ||
453 class == PCI_CLASS_NOT_DEFINED_VGA ||
454 class == PCI_CLASS_STORAGE_IDE ||
455 (pdev->class >> 16) == PCI_BASE_CLASS_DISPLAY)
461 static void __init pdev_assign_unassigned(struct pci_pbm_info *pbm,
462 struct pci_dev *pdev)
466 int i, io_seen, mem_seen;
468 io_seen = mem_seen = 0;
469 for (i = 0; i < PCI_NUM_RESOURCES; i++) {
470 struct resource *root, *res;
471 unsigned long size, min, max, align;
473 res = &pdev->resource[i];
475 if (res->flags & IORESOURCE_IO)
477 else if (res->flags & IORESOURCE_MEM)
480 /* If it is already assigned or the resource does
481 * not exist, there is nothing to do.
483 if (res->parent != NULL || res->flags == 0UL)
486 /* Determine the root we allocate from. */
487 if (res->flags & IORESOURCE_IO) {
488 root = &pbm->io_space;
489 min = root->start + 0x400UL;
492 root = &pbm->mem_space;
494 max = min + 0x80000000UL;
497 size = res->end - res->start;
499 if (allocate_resource(root, res, size + 1, min, max, align, NULL, NULL) < 0) {
501 prom_printf("PCI: Failed to allocate resource %d for %s\n",
506 /* Update PCI config space. */
507 pbm->parent->base_address_update(pdev, i);
510 /* Special case, disable the ROM. Several devices
511 * act funny (ie. do not respond to memory space writes)
512 * when it is left enabled. A good example are Qlogic,ISP
515 pci_read_config_dword(pdev, PCI_ROM_ADDRESS, ®);
516 reg &= ~PCI_ROM_ADDRESS_ENABLE;
517 pci_write_config_dword(pdev, PCI_ROM_ADDRESS, reg);
519 /* If we saw I/O or MEM resources, enable appropriate
520 * bits in PCI command register.
522 if (io_seen || mem_seen) {
523 pci_read_config_word(pdev, PCI_COMMAND, &cmd);
524 if (io_seen || has_implicit_io(pdev))
525 cmd |= PCI_COMMAND_IO;
527 cmd |= PCI_COMMAND_MEMORY;
528 pci_write_config_word(pdev, PCI_COMMAND, cmd);
531 /* If this is a PCI bridge or an IDE controller,
532 * enable bus mastering. In the former case also
533 * set the cache line size correctly.
535 if (((pdev->class >> 8) == PCI_CLASS_BRIDGE_PCI) ||
536 (((pdev->class >> 8) == PCI_CLASS_STORAGE_IDE) &&
537 ((pdev->class & 0x80) != 0))) {
538 pci_read_config_word(pdev, PCI_COMMAND, &cmd);
539 cmd |= PCI_COMMAND_MASTER;
540 pci_write_config_word(pdev, PCI_COMMAND, cmd);
542 if ((pdev->class >> 8) == PCI_CLASS_BRIDGE_PCI)
543 pci_write_config_byte(pdev,
549 void __init pci_assign_unassigned(struct pci_pbm_info *pbm,
550 struct pci_bus *pbus)
552 struct list_head *walk = &pbus->devices;
554 for (walk = walk->next; walk != &pbus->devices; walk = walk->next)
555 pdev_assign_unassigned(pbm, pci_dev_b(walk));
557 walk = &pbus->children;
558 for (walk = walk->next; walk != &pbus->children; walk = walk->next)
559 pci_assign_unassigned(pbm, pci_bus_b(walk));
562 static int __init pci_intmap_match(struct pci_dev *pdev, unsigned int *interrupt)
564 struct linux_prom_pci_intmap bridge_local_intmap[PROM_PCIIMAP_MAX], *intmap;
565 struct linux_prom_pci_intmask bridge_local_intmask, *intmask;
566 struct pcidev_cookie *dev_pcp = pdev->sysdata;
567 struct pci_pbm_info *pbm = dev_pcp->pbm;
568 struct linux_prom_pci_registers *pregs = dev_pcp->prom_regs;
569 unsigned int hi, mid, lo, irq;
570 int i, num_intmap, map_slot;
572 intmap = &pbm->pbm_intmap[0];
573 intmask = &pbm->pbm_intmask;
574 num_intmap = pbm->num_pbm_intmap;
577 /* If we are underneath a PCI bridge, use PROM register
578 * property of the parent bridge which is closest to
581 * However if that parent bridge has interrupt map/mask
582 * properties of its own we use the PROM register property
583 * of the next child device on the path to PDEV.
585 * In detail the two cases are (note that the 'X' below is the
586 * 'next child on the path to PDEV' mentioned above):
588 * 1) PBM --> PCI bus lacking int{map,mask} --> X ... PDEV
590 * Here we use regs of 'PCI bus' device.
592 * 2) PBM --> PCI bus with int{map,mask} --> X ... PDEV
594 * Here we use regs of 'X'. Note that X can be PDEV.
596 if (pdev->bus->number != pbm->pci_first_busno) {
597 struct pcidev_cookie *bus_pcp, *regs_pcp;
598 struct pci_dev *bus_dev, *regs_dev;
601 bus_dev = pdev->bus->self;
604 while (bus_dev->bus &&
605 bus_dev->bus->number != pbm->pci_first_busno) {
607 bus_dev = bus_dev->bus->self;
610 regs_pcp = regs_dev->sysdata;
611 pregs = regs_pcp->prom_regs;
613 bus_pcp = bus_dev->sysdata;
615 /* But if the PCI bridge has it's own interrupt map
616 * and mask properties, use that and the regs of the
617 * PCI entity at the next level down on the path to the
620 plen = prom_getproperty(bus_pcp->prom_node, "interrupt-map",
621 (char *) &bridge_local_intmap[0],
622 sizeof(bridge_local_intmap));
624 intmap = &bridge_local_intmap[0];
625 num_intmap = plen / sizeof(struct linux_prom_pci_intmap);
626 plen = prom_getproperty(bus_pcp->prom_node,
627 "interrupt-map-mask",
628 (char *) &bridge_local_intmask,
629 sizeof(bridge_local_intmask));
631 printk("pci_intmap_match: Warning! Bridge has intmap "
632 "but no intmask.\n");
633 printk("pci_intmap_match: Trying to recover.\n");
637 if (pdev->bus->self != bus_dev)
640 pregs = bus_pcp->prom_regs;
646 *interrupt = ((*interrupt
648 + PCI_SLOT(pdev->devfn)) & 0x3) + 1;
651 hi = pregs->phys_hi & intmask->phys_hi;
652 mid = pregs->phys_mid & intmask->phys_mid;
653 lo = pregs->phys_lo & intmask->phys_lo;
654 irq = *interrupt & intmask->interrupt;
656 for (i = 0; i < num_intmap; i++) {
657 if (intmap[i].phys_hi == hi &&
658 intmap[i].phys_mid == mid &&
659 intmap[i].phys_lo == lo &&
660 intmap[i].interrupt == irq) {
661 *interrupt = intmap[i].cinterrupt;
662 printk("PCI-IRQ: Routing bus[%2x] slot[%2x] map[%d] to INO[%02x]\n",
663 pdev->bus->number, PCI_SLOT(pdev->devfn),
664 map_slot, *interrupt);
669 /* We will run this code even if pbm->num_pbm_intmap is zero, just so
670 * we can apply the slot mapping to the PROM interrupt property value.
671 * So do not spit out these warnings in that case.
673 if (num_intmap != 0) {
674 /* Print it both to OBP console and kernel one so that if bootup
675 * hangs here the user has the information to report.
677 prom_printf("pci_intmap_match: bus %02x, devfn %02x: ",
678 pdev->bus->number, pdev->devfn);
679 prom_printf("IRQ [%08x.%08x.%08x.%08x] not found in interrupt-map\n",
680 pregs->phys_hi, pregs->phys_mid, pregs->phys_lo, *interrupt);
681 prom_printf("Please email this information to davem@redhat.com\n");
683 printk("pci_intmap_match: bus %02x, devfn %02x: ",
684 pdev->bus->number, pdev->devfn);
685 printk("IRQ [%08x.%08x.%08x.%08x] not found in interrupt-map\n",
686 pregs->phys_hi, pregs->phys_mid, pregs->phys_lo, *interrupt);
687 printk("Please email this information to davem@redhat.com\n");
693 static void __init pdev_fixup_irq(struct pci_dev *pdev)
695 struct pcidev_cookie *pcp = pdev->sysdata;
696 struct pci_pbm_info *pbm = pcp->pbm;
697 struct pci_controller_info *p = pbm->parent;
698 unsigned int portid = pbm->portid;
699 unsigned int prom_irq;
700 int prom_node = pcp->prom_node;
703 /* If this is an empty EBUS device, sometimes OBP fails to
704 * give it a valid fully specified interrupts property.
705 * The EBUS hooked up to SunHME on PCI I/O boards of
706 * Ex000 systems is one such case.
708 * The interrupt is not important so just ignore it.
710 if (pdev->vendor == PCI_VENDOR_ID_SUN &&
711 pdev->device == PCI_DEVICE_ID_SUN_EBUS &&
712 !prom_getchild(prom_node)) {
717 err = prom_getproperty(prom_node, "interrupts",
718 (char *)&prom_irq, sizeof(prom_irq));
719 if (err == 0 || err == -1) {
724 /* Fully specified already? */
725 if (((prom_irq & PCI_IRQ_IGN) >> 6) == portid) {
726 pdev->irq = p->irq_build(pbm, pdev, prom_irq);
730 /* An onboard device? (bit 5 set) */
731 if ((prom_irq & PCI_IRQ_INO) & 0x20) {
732 pdev->irq = p->irq_build(pbm, pdev, (portid << 6 | prom_irq));
736 /* Can we find a matching entry in the interrupt-map? */
737 if (pci_intmap_match(pdev, &prom_irq)) {
738 pdev->irq = p->irq_build(pbm, pdev, (portid << 6) | prom_irq);
742 /* Ok, we have to do it the hard way. */
744 unsigned int bus, slot, line;
746 bus = (pbm == &pbm->parent->pbm_B) ? (1 << 4) : 0;
748 /* If we have a legal interrupt property, use it as
751 if (prom_irq > 0 && prom_irq < 5) {
752 line = ((prom_irq - 1) & 3);
756 /* Else just directly consult PCI config space. */
757 pci_read_config_byte(pdev, PCI_INTERRUPT_PIN, &pci_irq_line);
758 line = ((pci_irq_line - 1) & 3);
761 /* Now figure out the slot.
763 * Basically, device number zero on the top-level bus is
764 * always the PCI host controller. Slot 0 is then device 1.
765 * PBM A supports two external slots (0 and 1), and PBM B
766 * supports 4 external slots (0, 1, 2, and 3). On-board PCI
767 * devices are wired to device numbers outside of these
770 if (pdev->bus->number == pbm->pci_first_busno) {
771 slot = PCI_SLOT(pdev->devfn) - pbm->pci_first_slot;
773 struct pci_dev *bus_dev;
775 /* Underneath a bridge, use slot number of parent
776 * bridge which is closest to the PBM.
778 bus_dev = pdev->bus->self;
779 while (bus_dev->bus &&
780 bus_dev->bus->number != pbm->pci_first_busno)
781 bus_dev = bus_dev->bus->self;
783 slot = PCI_SLOT(bus_dev->devfn) - pbm->pci_first_slot;
787 pdev->irq = p->irq_build(pbm, pdev,
788 ((portid << 6) & PCI_IRQ_IGN) |
789 (bus | slot | line));
793 pci_write_config_byte(pdev, PCI_INTERRUPT_LINE,
794 pdev->irq & PCI_IRQ_INO);
797 void __init pci_fixup_irq(struct pci_pbm_info *pbm,
798 struct pci_bus *pbus)
800 struct list_head *walk = &pbus->devices;
802 for (walk = walk->next; walk != &pbus->devices; walk = walk->next)
803 pdev_fixup_irq(pci_dev_b(walk));
805 walk = &pbus->children;
806 for (walk = walk->next; walk != &pbus->children; walk = walk->next)
807 pci_fixup_irq(pbm, pci_bus_b(walk));
810 static void pdev_setup_busmastering(struct pci_dev *pdev, int is_66mhz)
813 u8 hdr_type, min_gnt, ltimer;
815 pci_read_config_word(pdev, PCI_COMMAND, &cmd);
816 cmd |= PCI_COMMAND_MASTER;
817 pci_write_config_word(pdev, PCI_COMMAND, cmd);
819 /* Read it back, if the mastering bit did not
820 * get set, the device does not support bus
821 * mastering so we have nothing to do here.
823 pci_read_config_word(pdev, PCI_COMMAND, &cmd);
824 if ((cmd & PCI_COMMAND_MASTER) == 0)
827 /* Set correct cache line size, 64-byte on all
828 * Sparc64 PCI systems. Note that the value is
829 * measured in 32-bit words.
831 pci_write_config_byte(pdev, PCI_CACHE_LINE_SIZE,
834 pci_read_config_byte(pdev, PCI_HEADER_TYPE, &hdr_type);
836 if (hdr_type != PCI_HEADER_TYPE_NORMAL)
839 /* If the latency timer is already programmed with a non-zero
840 * value, assume whoever set it (OBP or whoever) knows what
843 pci_read_config_byte(pdev, PCI_LATENCY_TIMER, <imer);
847 /* XXX Since I'm tipping off the min grant value to
848 * XXX choose a suitable latency timer value, I also
849 * XXX considered making use of the max latency value
850 * XXX as well. Unfortunately I've seen too many bogusly
851 * XXX low settings for it to the point where it lacks
852 * XXX any usefulness. In one case, an ethernet card
853 * XXX claimed a min grant of 10 and a max latency of 5.
854 * XXX Now, if I had two such cards on the same bus I
855 * XXX could not set the desired burst period (calculated
856 * XXX from min grant) without violating the max latency
859 * XXX I blame dumb PC bios implementors for stuff like
860 * XXX this, most of them don't even try to do something
861 * XXX sensible with latency timer values and just set some
862 * XXX default value (usually 32) into every device.
865 pci_read_config_byte(pdev, PCI_MIN_GNT, &min_gnt);
868 /* If no min_gnt setting then use a default
883 /* Use a default value when the min_gnt value
884 * is erroneously high.
886 if (((unsigned int) min_gnt << shift_factor) > 512 ||
887 ((min_gnt << shift_factor) & 0xff) == 0) {
888 ltimer = 8 << shift_factor;
890 ltimer = min_gnt << shift_factor;
894 pci_write_config_byte(pdev, PCI_LATENCY_TIMER, ltimer);
897 void pci_determine_66mhz_disposition(struct pci_pbm_info *pbm,
898 struct pci_bus *pbus)
900 struct list_head *walk;
904 if (pbm->is_66mhz_capable == 0) {
909 walk = &pbus->devices;
911 for (walk = walk->next; walk != &pbus->devices; walk = walk->next) {
912 struct pci_dev *pdev = pci_dev_b(walk);
914 pci_read_config_word(pdev, PCI_STATUS, &status);
915 if (!(status & PCI_STATUS_66MHZ)) {
921 pbm->all_devs_66mhz = all_are_66mhz;
923 printk("PCI%d(PBM%c): Bus running at %dMHz\n",
925 (pbm == &pbm->parent->pbm_A) ? 'A' : 'B',
926 (all_are_66mhz ? 66 : 33));
929 void pci_setup_busmastering(struct pci_pbm_info *pbm,
930 struct pci_bus *pbus)
932 struct list_head *walk = &pbus->devices;
935 is_66mhz = pbm->is_66mhz_capable && pbm->all_devs_66mhz;
937 for (walk = walk->next; walk != &pbus->devices; walk = walk->next)
938 pdev_setup_busmastering(pci_dev_b(walk), is_66mhz);
940 walk = &pbus->children;
941 for (walk = walk->next; walk != &pbus->children; walk = walk->next)
942 pci_setup_busmastering(pbm, pci_bus_b(walk));
945 void pci_register_legacy_regions(struct resource *io_res,
946 struct resource *mem_res)
951 p = kmalloc(sizeof(*p), GFP_KERNEL);
955 memset(p, 0, sizeof(*p));
956 p->name = "Video RAM area";
957 p->start = mem_res->start + 0xa0000UL;
958 p->end = p->start + 0x1ffffUL;
959 p->flags = IORESOURCE_BUSY;
960 request_resource(mem_res, p);
962 p = kmalloc(sizeof(*p), GFP_KERNEL);
966 memset(p, 0, sizeof(*p));
967 p->name = "System ROM";
968 p->start = mem_res->start + 0xf0000UL;
969 p->end = p->start + 0xffffUL;
970 p->flags = IORESOURCE_BUSY;
971 request_resource(mem_res, p);
973 p = kmalloc(sizeof(*p), GFP_KERNEL);
977 memset(p, 0, sizeof(*p));
978 p->name = "Video ROM";
979 p->start = mem_res->start + 0xc0000UL;
980 p->end = p->start + 0x7fffUL;
981 p->flags = IORESOURCE_BUSY;
982 request_resource(mem_res, p);
985 /* Generic helper routines for PCI error reporting. */
986 void pci_scan_for_target_abort(struct pci_controller_info *p,
987 struct pci_pbm_info *pbm,
988 struct pci_bus *pbus)
990 struct list_head *walk = &pbus->devices;
992 for (walk = walk->next; walk != &pbus->devices; walk = walk->next) {
993 struct pci_dev *pdev = pci_dev_b(walk);
994 u16 status, error_bits;
996 pci_read_config_word(pdev, PCI_STATUS, &status);
998 (status & (PCI_STATUS_SIG_TARGET_ABORT |
999 PCI_STATUS_REC_TARGET_ABORT));
1001 pci_write_config_word(pdev, PCI_STATUS, error_bits);
1002 printk("PCI%d(PBM%c): Device [%s] saw Target Abort [%016x]\n",
1003 p->index, ((pbm == &p->pbm_A) ? 'A' : 'B'),
1004 pci_name(pdev), status);
1008 walk = &pbus->children;
1009 for (walk = walk->next; walk != &pbus->children; walk = walk->next)
1010 pci_scan_for_target_abort(p, pbm, pci_bus_b(walk));
1013 void pci_scan_for_master_abort(struct pci_controller_info *p,
1014 struct pci_pbm_info *pbm,
1015 struct pci_bus *pbus)
1017 struct list_head *walk = &pbus->devices;
1019 for (walk = walk->next; walk != &pbus->devices; walk = walk->next) {
1020 struct pci_dev *pdev = pci_dev_b(walk);
1021 u16 status, error_bits;
1023 pci_read_config_word(pdev, PCI_STATUS, &status);
1025 (status & (PCI_STATUS_REC_MASTER_ABORT));
1027 pci_write_config_word(pdev, PCI_STATUS, error_bits);
1028 printk("PCI%d(PBM%c): Device [%s] received Master Abort [%016x]\n",
1029 p->index, ((pbm == &p->pbm_A) ? 'A' : 'B'),
1030 pci_name(pdev), status);
1034 walk = &pbus->children;
1035 for (walk = walk->next; walk != &pbus->children; walk = walk->next)
1036 pci_scan_for_master_abort(p, pbm, pci_bus_b(walk));
1039 void pci_scan_for_parity_error(struct pci_controller_info *p,
1040 struct pci_pbm_info *pbm,
1041 struct pci_bus *pbus)
1043 struct list_head *walk = &pbus->devices;
1045 for (walk = walk->next; walk != &pbus->devices; walk = walk->next) {
1046 struct pci_dev *pdev = pci_dev_b(walk);
1047 u16 status, error_bits;
1049 pci_read_config_word(pdev, PCI_STATUS, &status);
1051 (status & (PCI_STATUS_PARITY |
1052 PCI_STATUS_DETECTED_PARITY));
1054 pci_write_config_word(pdev, PCI_STATUS, error_bits);
1055 printk("PCI%d(PBM%c): Device [%s] saw Parity Error [%016x]\n",
1056 p->index, ((pbm == &p->pbm_A) ? 'A' : 'B'),
1057 pci_name(pdev), status);
1061 walk = &pbus->children;
1062 for (walk = walk->next; walk != &pbus->children; walk = walk->next)
1063 pci_scan_for_parity_error(p, pbm, pci_bus_b(walk));