1 /* $Id: time.c,v 1.42 2002/01/23 14:33:55 davem Exp $
2 * time.c: UltraSparc timer and TOD clock support.
4 * Copyright (C) 1997 David S. Miller (davem@caip.rutgers.edu)
5 * Copyright (C) 1998 Eddie C. Dost (ecd@skynet.be)
7 * Based largely on code which is:
9 * Copyright (C) 1996 Thomas K. Dyas (tdyas@eden.rutgers.edu)
12 #include <linux/config.h>
13 #include <linux/errno.h>
14 #include <linux/module.h>
15 #include <linux/sched.h>
16 #include <linux/kernel.h>
17 #include <linux/param.h>
18 #include <linux/string.h>
20 #include <linux/interrupt.h>
21 #include <linux/time.h>
22 #include <linux/timex.h>
23 #include <linux/init.h>
24 #include <linux/ioport.h>
25 #include <linux/mc146818rtc.h>
26 #include <linux/delay.h>
27 #include <linux/profile.h>
28 #include <linux/bcd.h>
29 #include <linux/jiffies.h>
30 #include <linux/cpufreq.h>
31 #include <linux/percpu.h>
33 #include <asm/oplib.h>
34 #include <asm/mostek.h>
35 #include <asm/timer.h>
43 #include <asm/starfire.h>
45 #include <asm/sections.h>
46 #include <asm/cpudata.h>
48 spinlock_t mostek_lock = SPIN_LOCK_UNLOCKED;
49 spinlock_t rtc_lock = SPIN_LOCK_UNLOCKED;
50 unsigned long mstk48t02_regs = 0UL;
52 unsigned long ds1287_regs = 0UL;
55 extern unsigned long wall_jiffies;
57 u64 jiffies_64 = INITIAL_JIFFIES;
59 EXPORT_SYMBOL(jiffies_64);
61 static unsigned long mstk48t08_regs = 0UL;
62 static unsigned long mstk48t59_regs = 0UL;
64 static int set_rtc_mmss(unsigned long);
66 struct sparc64_tick_ops *tick_ops;
68 #define TICK_PRIV_BIT (1UL << 63)
70 static void tick_disable_protection(void)
72 /* Set things up so user can access tick register for profiling
73 * purposes. Also workaround BB_ERRATA_1 by doing a dummy
74 * read back of %tick after writing it.
80 "1: rd %%tick, %%g2\n"
81 " add %%g2, 6, %%g2\n"
82 " andn %%g2, %0, %%g2\n"
83 " wrpr %%g2, 0, %%tick\n"
90 static void tick_init_tick(unsigned long offset)
92 tick_disable_protection();
96 " andn %%g1, %1, %%g1\n"
98 " add %%g1, %0, %%g1\n"
100 "1: wr %%g1, 0x0, %%tick_cmpr\n"
101 " rd %%tick_cmpr, %%g0"
103 : "r" (offset), "r" (TICK_PRIV_BIT)
107 static unsigned long tick_get_tick(void)
111 __asm__ __volatile__("rd %%tick, %0\n\t"
115 return ret & ~TICK_PRIV_BIT;
118 static unsigned long tick_get_compare(void)
122 __asm__ __volatile__("rd %%tick_cmpr, %0\n\t"
129 static unsigned long tick_add_compare(unsigned long adj)
131 unsigned long new_compare;
133 /* Workaround for Spitfire Errata (#54 I think??), I discovered
134 * this via Sun BugID 4008234, mentioned in Solaris-2.5.1 patch
137 * On Blackbird writes to %tick_cmpr can fail, the
138 * workaround seems to be to execute the wr instruction
139 * at the start of an I-cache line, and perform a dummy
140 * read back from %tick_cmpr right after writing to it. -DaveM
142 __asm__ __volatile__("rd %%tick_cmpr, %0\n\t"
143 "ba,pt %%xcc, 1f\n\t"
144 " add %0, %1, %0\n\t"
147 "wr %0, 0, %%tick_cmpr\n\t"
148 "rd %%tick_cmpr, %%g0"
149 : "=&r" (new_compare)
155 static unsigned long tick_add_tick(unsigned long adj, unsigned long offset)
157 unsigned long new_tick, tmp;
159 /* Also need to handle Blackbird bug here too. */
160 __asm__ __volatile__("rd %%tick, %0\n\t"
162 "wrpr %0, 0, %%tick\n\t"
163 "andn %0, %4, %1\n\t"
164 "ba,pt %%xcc, 1f\n\t"
165 " add %1, %3, %1\n\t"
168 "wr %1, 0, %%tick_cmpr\n\t"
169 "rd %%tick_cmpr, %%g0"
170 : "=&r" (new_tick), "=&r" (tmp)
171 : "r" (adj), "r" (offset), "r" (TICK_PRIV_BIT));
176 static struct sparc64_tick_ops tick_operations = {
177 .init_tick = tick_init_tick,
178 .get_tick = tick_get_tick,
179 .get_compare = tick_get_compare,
180 .add_tick = tick_add_tick,
181 .add_compare = tick_add_compare,
182 .softint_mask = 1UL << 0,
185 static void stick_init_tick(unsigned long offset)
187 tick_disable_protection();
189 /* Let the user get at STICK too. */
190 __asm__ __volatile__(
191 " rd %%asr24, %%g2\n"
192 " andn %%g2, %0, %%g2\n"
193 " wr %%g2, 0, %%asr24"
195 : "r" (TICK_PRIV_BIT)
198 __asm__ __volatile__(
199 " rd %%asr24, %%g1\n"
200 " andn %%g1, %1, %%g1\n"
201 " add %%g1, %0, %%g1\n"
202 " wr %%g1, 0x0, %%asr25"
204 : "r" (offset), "r" (TICK_PRIV_BIT)
208 static unsigned long stick_get_tick(void)
212 __asm__ __volatile__("rd %%asr24, %0"
215 return ret & ~TICK_PRIV_BIT;
218 static unsigned long stick_get_compare(void)
222 __asm__ __volatile__("rd %%asr25, %0"
228 static unsigned long stick_add_tick(unsigned long adj, unsigned long offset)
230 unsigned long new_tick, tmp;
232 __asm__ __volatile__("rd %%asr24, %0\n\t"
234 "wr %0, 0, %%asr24\n\t"
235 "andn %0, %4, %1\n\t"
238 : "=&r" (new_tick), "=&r" (tmp)
239 : "r" (adj), "r" (offset), "r" (TICK_PRIV_BIT));
244 static unsigned long stick_add_compare(unsigned long adj)
246 unsigned long new_compare;
248 __asm__ __volatile__("rd %%asr25, %0\n\t"
251 : "=&r" (new_compare)
257 static struct sparc64_tick_ops stick_operations = {
258 .init_tick = stick_init_tick,
259 .get_tick = stick_get_tick,
260 .get_compare = stick_get_compare,
261 .add_tick = stick_add_tick,
262 .add_compare = stick_add_compare,
263 .softint_mask = 1UL << 16,
266 /* On Hummingbird the STICK/STICK_CMPR register is implemented
267 * in I/O space. There are two 64-bit registers each, the
268 * first holds the low 32-bits of the value and the second holds
271 * Since STICK is constantly updating, we have to access it carefully.
273 * The sequence we use to read is:
276 * 3) read low again, if it rolled over increment high by 1
278 * Writing STICK safely is also tricky:
279 * 1) write low to zero
283 #define HBIRD_STICKCMP_ADDR 0x1fe0000f060UL
284 #define HBIRD_STICK_ADDR 0x1fe0000f070UL
286 static unsigned long __hbird_read_stick(void)
288 unsigned long ret, tmp1, tmp2, tmp3;
289 unsigned long addr = HBIRD_STICK_ADDR;
291 __asm__ __volatile__("ldxa [%1] %5, %2\n\t"
292 "add %1, 0x8, %1\n\t"
293 "ldxa [%1] %5, %3\n\t"
294 "sub %1, 0x8, %1\n\t"
295 "ldxa [%1] %5, %4\n\t"
297 "blu,a,pn %%xcc, 1f\n\t"
300 "sllx %3, 32, %3\n\t"
302 : "=&r" (ret), "=&r" (addr),
303 "=&r" (tmp1), "=&r" (tmp2), "=&r" (tmp3)
304 : "i" (ASI_PHYS_BYPASS_EC_E), "1" (addr));
309 static unsigned long __hbird_read_compare(void)
311 unsigned long low, high;
312 unsigned long addr = HBIRD_STICKCMP_ADDR;
314 __asm__ __volatile__("ldxa [%2] %3, %0\n\t"
315 "add %2, 0x8, %2\n\t"
317 : "=&r" (low), "=&r" (high), "=&r" (addr)
318 : "i" (ASI_PHYS_BYPASS_EC_E), "2" (addr));
320 return (high << 32UL) | low;
323 static void __hbird_write_stick(unsigned long val)
325 unsigned long low = (val & 0xffffffffUL);
326 unsigned long high = (val >> 32UL);
327 unsigned long addr = HBIRD_STICK_ADDR;
329 __asm__ __volatile__("stxa %%g0, [%0] %4\n\t"
330 "add %0, 0x8, %0\n\t"
331 "stxa %3, [%0] %4\n\t"
332 "sub %0, 0x8, %0\n\t"
335 : "0" (addr), "r" (low), "r" (high),
336 "i" (ASI_PHYS_BYPASS_EC_E));
339 static void __hbird_write_compare(unsigned long val)
341 unsigned long low = (val & 0xffffffffUL);
342 unsigned long high = (val >> 32UL);
343 unsigned long addr = HBIRD_STICKCMP_ADDR + 0x8UL;
345 __asm__ __volatile__("stxa %3, [%0] %4\n\t"
346 "sub %0, 0x8, %0\n\t"
349 : "0" (addr), "r" (low), "r" (high),
350 "i" (ASI_PHYS_BYPASS_EC_E));
353 static void hbtick_init_tick(unsigned long offset)
357 tick_disable_protection();
359 /* XXX This seems to be necessary to 'jumpstart' Hummingbird
360 * XXX into actually sending STICK interrupts. I think because
361 * XXX of how we store %tick_cmpr in head.S this somehow resets the
362 * XXX {TICK + STICK} interrupt mux. -DaveM
364 __hbird_write_stick(__hbird_read_stick());
366 val = __hbird_read_stick() & ~TICK_PRIV_BIT;
367 __hbird_write_compare(val + offset);
370 static unsigned long hbtick_get_tick(void)
372 return __hbird_read_stick() & ~TICK_PRIV_BIT;
375 static unsigned long hbtick_get_compare(void)
377 return __hbird_read_compare();
380 static unsigned long hbtick_add_tick(unsigned long adj, unsigned long offset)
384 val = __hbird_read_stick() + adj;
385 __hbird_write_stick(val);
387 val &= ~TICK_PRIV_BIT;
388 __hbird_write_compare(val + offset);
393 static unsigned long hbtick_add_compare(unsigned long adj)
395 unsigned long val = __hbird_read_compare() + adj;
397 val &= ~TICK_PRIV_BIT;
398 __hbird_write_compare(val);
403 static struct sparc64_tick_ops hbtick_operations = {
404 .init_tick = hbtick_init_tick,
405 .get_tick = hbtick_get_tick,
406 .get_compare = hbtick_get_compare,
407 .add_tick = hbtick_add_tick,
408 .add_compare = hbtick_add_compare,
409 .softint_mask = 1UL << 0,
412 /* timer_interrupt() needs to keep up the real-time clock,
413 * as well as call the "do_timer()" routine every clocktick
415 * NOTE: On SUN5 systems the ticker interrupt comes in using 2
416 * interrupts, one at level14 and one with softint bit 0.
418 unsigned long timer_tick_offset;
419 unsigned long timer_tick_compare;
421 static unsigned long timer_ticks_per_usec_quotient;
422 static unsigned long timer_ticks_per_nsec_quotient;
424 #define TICK_SIZE (tick_nsec / 1000)
426 static inline void timer_check_rtc(void)
428 /* last time the cmos clock got updated */
429 static long last_rtc_update;
431 /* Determine when to update the Mostek clock. */
432 if ((time_status & STA_UNSYNC) == 0 &&
433 xtime.tv_sec > last_rtc_update + 660 &&
434 (xtime.tv_nsec / 1000) >= 500000 - ((unsigned) TICK_SIZE) / 2 &&
435 (xtime.tv_nsec / 1000) <= 500000 + ((unsigned) TICK_SIZE) / 2) {
436 if (set_rtc_mmss(xtime.tv_sec) == 0)
437 last_rtc_update = xtime.tv_sec;
439 last_rtc_update = xtime.tv_sec - 600;
440 /* do it again in 60 s */
444 void sparc64_do_profile(struct pt_regs *regs)
458 pc -= (unsigned long) _stext;
463 atomic_inc((atomic_t *)&prof_buffer[pc]);
466 static irqreturn_t timer_interrupt(int irq, void *dev_id, struct pt_regs * regs)
468 unsigned long ticks, pstate;
470 write_seqlock(&xtime_lock);
474 sparc64_do_profile(regs);
478 /* Guarantee that the following sequences execute
481 __asm__ __volatile__("rdpr %%pstate, %0\n\t"
482 "wrpr %0, %1, %%pstate"
486 timer_tick_compare = tick_ops->add_compare(timer_tick_offset);
487 ticks = tick_ops->get_tick();
489 /* Restore PSTATE_IE. */
490 __asm__ __volatile__("wrpr %0, 0x0, %%pstate"
493 } while (time_after_eq(ticks, timer_tick_compare));
497 write_sequnlock(&xtime_lock);
503 void timer_tick_interrupt(struct pt_regs *regs)
505 write_seqlock(&xtime_lock);
510 * Only keep timer_tick_offset uptodate, but don't set TICK_CMPR.
512 timer_tick_compare = tick_ops->get_compare() + timer_tick_offset;
516 write_sequnlock(&xtime_lock);
520 /* Kick start a stopped clock (procedure from the Sun NVRAM/hostid FAQ). */
521 static void __init kick_start_clock(void)
523 unsigned long regs = mstk48t02_regs;
527 prom_printf("CLOCK: Clock was stopped. Kick start ");
529 spin_lock_irq(&mostek_lock);
531 /* Turn on the kick start bit to start the oscillator. */
532 tmp = mostek_read(regs + MOSTEK_CREG);
533 tmp |= MSTK_CREG_WRITE;
534 mostek_write(regs + MOSTEK_CREG, tmp);
535 tmp = mostek_read(regs + MOSTEK_SEC);
537 mostek_write(regs + MOSTEK_SEC, tmp);
538 tmp = mostek_read(regs + MOSTEK_HOUR);
539 tmp |= MSTK_KICK_START;
540 mostek_write(regs + MOSTEK_HOUR, tmp);
541 tmp = mostek_read(regs + MOSTEK_CREG);
542 tmp &= ~MSTK_CREG_WRITE;
543 mostek_write(regs + MOSTEK_CREG, tmp);
545 spin_unlock_irq(&mostek_lock);
547 /* Delay to allow the clock oscillator to start. */
548 sec = MSTK_REG_SEC(regs);
549 for (i = 0; i < 3; i++) {
550 while (sec == MSTK_REG_SEC(regs))
551 for (count = 0; count < 100000; count++)
554 sec = MSTK_REG_SEC(regs);
558 spin_lock_irq(&mostek_lock);
560 /* Turn off kick start and set a "valid" time and date. */
561 tmp = mostek_read(regs + MOSTEK_CREG);
562 tmp |= MSTK_CREG_WRITE;
563 mostek_write(regs + MOSTEK_CREG, tmp);
564 tmp = mostek_read(regs + MOSTEK_HOUR);
565 tmp &= ~MSTK_KICK_START;
566 mostek_write(regs + MOSTEK_HOUR, tmp);
567 MSTK_SET_REG_SEC(regs,0);
568 MSTK_SET_REG_MIN(regs,0);
569 MSTK_SET_REG_HOUR(regs,0);
570 MSTK_SET_REG_DOW(regs,5);
571 MSTK_SET_REG_DOM(regs,1);
572 MSTK_SET_REG_MONTH(regs,8);
573 MSTK_SET_REG_YEAR(regs,1996 - MSTK_YEAR_ZERO);
574 tmp = mostek_read(regs + MOSTEK_CREG);
575 tmp &= ~MSTK_CREG_WRITE;
576 mostek_write(regs + MOSTEK_CREG, tmp);
578 spin_unlock_irq(&mostek_lock);
580 /* Ensure the kick start bit is off. If it isn't, turn it off. */
581 while (mostek_read(regs + MOSTEK_HOUR) & MSTK_KICK_START) {
582 prom_printf("CLOCK: Kick start still on!\n");
584 spin_lock_irq(&mostek_lock);
586 tmp = mostek_read(regs + MOSTEK_CREG);
587 tmp |= MSTK_CREG_WRITE;
588 mostek_write(regs + MOSTEK_CREG, tmp);
590 tmp = mostek_read(regs + MOSTEK_HOUR);
591 tmp &= ~MSTK_KICK_START;
592 mostek_write(regs + MOSTEK_HOUR, tmp);
594 tmp = mostek_read(regs + MOSTEK_CREG);
595 tmp &= ~MSTK_CREG_WRITE;
596 mostek_write(regs + MOSTEK_CREG, tmp);
598 spin_unlock_irq(&mostek_lock);
601 prom_printf("CLOCK: Kick start procedure successful.\n");
604 /* Return nonzero if the clock chip battery is low. */
605 static int __init has_low_battery(void)
607 unsigned long regs = mstk48t02_regs;
610 spin_lock_irq(&mostek_lock);
612 data1 = mostek_read(regs + MOSTEK_EEPROM); /* Read some data. */
613 mostek_write(regs + MOSTEK_EEPROM, ~data1); /* Write back the complement. */
614 data2 = mostek_read(regs + MOSTEK_EEPROM); /* Read back the complement. */
615 mostek_write(regs + MOSTEK_EEPROM, data1); /* Restore original value. */
617 spin_unlock_irq(&mostek_lock);
619 return (data1 == data2); /* Was the write blocked? */
622 /* Probe for the real time clock chip. */
623 static void __init set_system_time(void)
625 unsigned int year, mon, day, hour, min, sec;
626 unsigned long mregs = mstk48t02_regs;
628 unsigned long dregs = ds1287_regs;
630 unsigned long dregs = 0UL;
634 if (!mregs && !dregs) {
635 prom_printf("Something wrong, clock regs not mapped yet.\n");
640 spin_lock_irq(&mostek_lock);
642 /* Traditional Mostek chip. */
643 tmp = mostek_read(mregs + MOSTEK_CREG);
644 tmp |= MSTK_CREG_READ;
645 mostek_write(mregs + MOSTEK_CREG, tmp);
647 sec = MSTK_REG_SEC(mregs);
648 min = MSTK_REG_MIN(mregs);
649 hour = MSTK_REG_HOUR(mregs);
650 day = MSTK_REG_DOM(mregs);
651 mon = MSTK_REG_MONTH(mregs);
652 year = MSTK_CVT_YEAR( MSTK_REG_YEAR(mregs) );
656 /* Dallas 12887 RTC chip. */
658 /* Stolen from arch/i386/kernel/time.c, see there for
659 * credits and descriptive comments.
661 for (i = 0; i < 1000000; i++) {
662 if (CMOS_READ(RTC_FREQ_SELECT) & RTC_UIP)
666 for (i = 0; i < 1000000; i++) {
667 if (!(CMOS_READ(RTC_FREQ_SELECT) & RTC_UIP))
672 sec = CMOS_READ(RTC_SECONDS);
673 min = CMOS_READ(RTC_MINUTES);
674 hour = CMOS_READ(RTC_HOURS);
675 day = CMOS_READ(RTC_DAY_OF_MONTH);
676 mon = CMOS_READ(RTC_MONTH);
677 year = CMOS_READ(RTC_YEAR);
678 } while (sec != CMOS_READ(RTC_SECONDS));
679 if (!(CMOS_READ(RTC_CONTROL) & RTC_DM_BINARY) || RTC_ALWAYS_BCD) {
687 if ((year += 1900) < 1970)
691 xtime.tv_sec = mktime(year, mon, day, hour, min, sec);
692 xtime.tv_nsec = (INITIAL_JIFFIES % HZ) * (NSEC_PER_SEC / HZ);
693 set_normalized_timespec(&wall_to_monotonic,
694 -xtime.tv_sec, -xtime.tv_nsec);
697 tmp = mostek_read(mregs + MOSTEK_CREG);
698 tmp &= ~MSTK_CREG_READ;
699 mostek_write(mregs + MOSTEK_CREG, tmp);
701 spin_unlock_irq(&mostek_lock);
705 void __init clock_probe(void)
707 struct linux_prom_registers clk_reg[2];
709 int node, busnd = -1, err;
711 struct linux_central *cbus;
713 struct linux_ebus *ebus = NULL;
714 struct sparc_isa_bridge *isa_br = NULL;
723 if (this_is_starfire) {
724 /* davem suggests we keep this within the 4M locked kernel image */
725 static char obp_gettod[256];
728 sprintf(obp_gettod, "h# %08x unix-gettod",
729 (unsigned int) (long) &unix_tod);
730 prom_feval(obp_gettod);
731 xtime.tv_sec = unix_tod;
732 xtime.tv_nsec = (INITIAL_JIFFIES % HZ) * (NSEC_PER_SEC / HZ);
733 set_normalized_timespec(&wall_to_monotonic,
734 -xtime.tv_sec, -xtime.tv_nsec);
738 local_irq_save(flags);
742 busnd = central_bus->child->prom_node;
744 /* Check FHC Central then EBUSs then ISA bridges then SBUSs.
745 * That way we handle the presence of multiple properly.
747 * As a special case, machines with Central must provide the
751 if (ebus_chain != NULL) {
754 busnd = ebus->prom_node;
756 if (isa_chain != NULL) {
759 busnd = isa_br->prom_node;
762 if (sbus_root != NULL && busnd == -1)
763 busnd = sbus_root->prom_node;
766 prom_printf("clock_probe: problem, cannot find bus to search.\n");
770 node = prom_getchild(busnd);
776 prom_getstring(node, "model", model, sizeof(model));
777 if (strcmp(model, "mk48t02") &&
778 strcmp(model, "mk48t08") &&
779 strcmp(model, "mk48t59") &&
780 strcmp(model, "m5819") &&
781 strcmp(model, "m5819p") &&
782 strcmp(model, "ds1287")) {
784 prom_printf("clock_probe: Central bus lacks timer chip.\n");
789 node = prom_getsibling(node);
791 while ((node == 0) && ebus != NULL) {
794 busnd = ebus->prom_node;
795 node = prom_getchild(busnd);
798 while ((node == 0) && isa_br != NULL) {
799 isa_br = isa_br->next;
800 if (isa_br != NULL) {
801 busnd = isa_br->prom_node;
802 node = prom_getchild(busnd);
807 prom_printf("clock_probe: Cannot find timer chip\n");
813 err = prom_getproperty(node, "reg", (char *)clk_reg,
816 prom_printf("clock_probe: Cannot get Mostek reg property\n");
821 apply_fhc_ranges(central_bus->child, clk_reg, 1);
822 apply_central_ranges(central_bus, clk_reg, 1);
825 else if (ebus != NULL) {
826 struct linux_ebus_device *edev;
828 for_each_ebusdev(edev, ebus)
829 if (edev->prom_node == node)
832 if (isa_chain != NULL)
834 prom_printf("%s: Mostek not probed by EBUS\n",
839 if (!strcmp(model, "ds1287") ||
840 !strcmp(model, "m5819") ||
841 !strcmp(model, "m5819p")) {
842 ds1287_regs = edev->resource[0].start;
844 mstk48t59_regs = edev->resource[0].start;
845 mstk48t02_regs = mstk48t59_regs + MOSTEK_48T59_48T02;
849 else if (isa_br != NULL) {
850 struct sparc_isa_device *isadev;
853 for_each_isadev(isadev, isa_br)
854 if (isadev->prom_node == node)
856 if (isadev == NULL) {
857 prom_printf("%s: Mostek not probed by ISA\n");
860 if (!strcmp(model, "ds1287") ||
861 !strcmp(model, "m5819") ||
862 !strcmp(model, "m5819p")) {
863 ds1287_regs = isadev->resource.start;
865 mstk48t59_regs = isadev->resource.start;
866 mstk48t02_regs = mstk48t59_regs + MOSTEK_48T59_48T02;
872 if (sbus_root->num_sbus_ranges) {
873 int nranges = sbus_root->num_sbus_ranges;
876 for (rngc = 0; rngc < nranges; rngc++)
877 if (clk_reg[0].which_io ==
878 sbus_root->sbus_ranges[rngc].ot_child_space)
880 if (rngc == nranges) {
881 prom_printf("clock_probe: Cannot find ranges for "
885 clk_reg[0].which_io =
886 sbus_root->sbus_ranges[rngc].ot_parent_space;
887 clk_reg[0].phys_addr +=
888 sbus_root->sbus_ranges[rngc].ot_parent_base;
892 if(model[5] == '0' && model[6] == '2') {
893 mstk48t02_regs = (((u64)clk_reg[0].phys_addr) |
894 (((u64)clk_reg[0].which_io)<<32UL));
895 } else if(model[5] == '0' && model[6] == '8') {
896 mstk48t08_regs = (((u64)clk_reg[0].phys_addr) |
897 (((u64)clk_reg[0].which_io)<<32UL));
898 mstk48t02_regs = mstk48t08_regs + MOSTEK_48T08_48T02;
900 mstk48t59_regs = (((u64)clk_reg[0].phys_addr) |
901 (((u64)clk_reg[0].which_io)<<32UL));
902 mstk48t02_regs = mstk48t59_regs + MOSTEK_48T59_48T02;
907 if (mstk48t02_regs != 0UL) {
908 /* Report a low battery voltage condition. */
909 if (has_low_battery())
910 prom_printf("NVRAM: Low battery voltage!\n");
912 /* Kick start the clock if it is completely stopped. */
913 if (mostek_read(mstk48t02_regs + MOSTEK_SEC) & MSTK_STOP)
919 local_irq_restore(flags);
922 /* This is gets the master TICK_INT timer going. */
923 static unsigned long sparc64_init_timers(irqreturn_t (*cfunc)(int, void *, struct pt_regs *))
925 unsigned long pstate, clock;
928 extern void smp_tick_init(void);
931 if (tlb_type == spitfire) {
932 unsigned long ver, manuf, impl;
934 __asm__ __volatile__ ("rdpr %%ver, %0"
936 manuf = ((ver >> 48) & 0xffff);
937 impl = ((ver >> 32) & 0xffff);
938 if (manuf == 0x17 && impl == 0x13) {
939 /* Hummingbird, aka Ultra-IIe */
940 tick_ops = &hbtick_operations;
941 node = prom_root_node;
942 clock = prom_getint(node, "stick-frequency");
944 tick_ops = &tick_operations;
945 cpu_find_by_instance(0, &node, NULL);
946 clock = prom_getint(node, "clock-frequency");
949 tick_ops = &stick_operations;
950 node = prom_root_node;
951 clock = prom_getint(node, "stick-frequency");
953 timer_tick_offset = clock / HZ;
959 /* Register IRQ handler. */
960 err = request_irq(build_irq(0, 0, 0UL, 0UL), cfunc, SA_STATIC_ALLOC,
964 prom_printf("Serious problem, cannot register TICK_INT\n");
968 /* Guarantee that the following sequences execute
971 __asm__ __volatile__("rdpr %%pstate, %0\n\t"
972 "wrpr %0, %1, %%pstate"
976 tick_ops->init_tick(timer_tick_offset);
978 /* Restore PSTATE_IE. */
979 __asm__ __volatile__("wrpr %0, 0x0, %%pstate"
989 unsigned long udelay_val_ref;
990 unsigned long clock_tick_ref;
991 unsigned int ref_freq;
993 static DEFINE_PER_CPU(struct freq_table, sparc64_freq_table) = { 0, 0, 0 };
995 unsigned long sparc64_get_clock_tick(unsigned int cpu)
997 struct freq_table *ft = &per_cpu(sparc64_freq_table, cpu);
999 if (ft->clock_tick_ref)
1000 return ft->clock_tick_ref;
1001 return cpu_data(cpu).clock_tick;
1004 #ifdef CONFIG_CPU_FREQ
1006 static int sparc64_cpufreq_notifier(struct notifier_block *nb, unsigned long val,
1009 struct cpufreq_freqs *freq = data;
1010 unsigned int cpu = freq->cpu;
1011 struct freq_table *ft = &per_cpu(sparc64_freq_table, cpu);
1013 if (!ft->ref_freq) {
1014 ft->ref_freq = freq->old;
1015 ft->udelay_val_ref = cpu_data(cpu).udelay_val;
1016 ft->clock_tick_ref = cpu_data(cpu).clock_tick;
1018 if ((val == CPUFREQ_PRECHANGE && freq->old < freq->new) ||
1019 (val == CPUFREQ_POSTCHANGE && freq->old > freq->new) ||
1020 (val == CPUFREQ_RESUMECHANGE)) {
1021 cpu_data(cpu).udelay_val =
1022 cpufreq_scale(ft->udelay_val_ref,
1025 cpu_data(cpu).clock_tick =
1026 cpufreq_scale(ft->clock_tick_ref,
1034 static struct notifier_block sparc64_cpufreq_notifier_block = {
1035 .notifier_call = sparc64_cpufreq_notifier
1039 /* The quotient formula is taken from the IA64 port. */
1040 #define SPARC64_USEC_PER_CYC_SHIFT 30UL
1041 #define SPARC64_NSEC_PER_CYC_SHIFT 30UL
1042 void __init time_init(void)
1044 unsigned long clock = sparc64_init_timers(timer_interrupt);
1046 timer_ticks_per_usec_quotient =
1047 (((1000000UL << SPARC64_USEC_PER_CYC_SHIFT) +
1048 (clock / 2)) / clock);
1050 timer_ticks_per_nsec_quotient =
1051 (((NSEC_PER_SEC << SPARC64_NSEC_PER_CYC_SHIFT) +
1052 (clock / 2)) / clock);
1054 #ifdef CONFIG_CPU_FREQ
1055 cpufreq_register_notifier(&sparc64_cpufreq_notifier_block,
1056 CPUFREQ_TRANSITION_NOTIFIER);
1060 static __inline__ unsigned long do_gettimeoffset(void)
1062 unsigned long ticks = tick_ops->get_tick();
1064 ticks += timer_tick_offset;
1065 ticks -= timer_tick_compare;
1067 return (ticks * timer_ticks_per_usec_quotient)
1068 >> SPARC64_USEC_PER_CYC_SHIFT;
1071 unsigned long long sched_clock(void)
1073 unsigned long ticks = tick_ops->get_tick();
1075 return (ticks * timer_ticks_per_nsec_quotient)
1076 >> SPARC64_NSEC_PER_CYC_SHIFT;
1079 int do_settimeofday(struct timespec *tv)
1081 time_t wtm_sec, sec = tv->tv_sec;
1082 long wtm_nsec, nsec = tv->tv_nsec;
1084 if ((unsigned long)tv->tv_nsec >= NSEC_PER_SEC)
1087 if (this_is_starfire)
1090 write_seqlock_irq(&xtime_lock);
1092 * This is revolting. We need to set "xtime" correctly. However, the
1093 * value in this location is the value at the most recent update of
1094 * wall time. Discover what correction gettimeofday() would have
1095 * made, and then undo it!
1097 nsec -= do_gettimeoffset() * 1000;
1098 nsec -= (jiffies - wall_jiffies) * (NSEC_PER_SEC / HZ);
1100 wtm_sec = wall_to_monotonic.tv_sec + (xtime.tv_sec - sec);
1101 wtm_nsec = wall_to_monotonic.tv_nsec + (xtime.tv_nsec - nsec);
1103 set_normalized_timespec(&xtime, sec, nsec);
1104 set_normalized_timespec(&wall_to_monotonic, wtm_sec, wtm_nsec);
1106 time_adjust = 0; /* stop active adjtime() */
1107 time_status |= STA_UNSYNC;
1108 time_maxerror = NTP_PHASE_LIMIT;
1109 time_esterror = NTP_PHASE_LIMIT;
1110 write_sequnlock_irq(&xtime_lock);
1115 EXPORT_SYMBOL(do_settimeofday);
1117 /* Ok, my cute asm atomicity trick doesn't work anymore.
1118 * There are just too many variables that need to be protected
1119 * now (both members of xtime, wall_jiffies, et al.)
1121 void do_gettimeofday(struct timeval *tv)
1124 unsigned long usec, sec;
1125 unsigned long max_ntp_tick = tick_usec - tickadj;
1130 seq = read_seqbegin(&xtime_lock);
1131 usec = do_gettimeoffset();
1132 lost = jiffies - wall_jiffies;
1135 * If time_adjust is negative then NTP is slowing the clock
1136 * so make sure not to go into next possible interval.
1137 * Better to lose some accuracy than have time go backwards..
1139 if (unlikely(time_adjust < 0)) {
1140 usec = min(usec, max_ntp_tick);
1143 usec += lost * max_ntp_tick;
1145 else if (unlikely(lost))
1146 usec += lost * tick_usec;
1150 /* Believe it or not, this divide shows up on
1151 * kernel profiles. The problem is that it is
1152 * both 64-bit and signed. Happily, 32-bits
1153 * of precision is all we really need and in
1154 * doing so gcc ends up emitting a cheap multiply.
1156 * XXX Why is tv_nsec 'long' and 'signed' in
1157 * XXX the first place, can it even be negative?
1159 usec += ((unsigned int) xtime.tv_nsec / 1000U);
1160 } while (read_seqretry(&xtime_lock, seq));
1162 while (usec >= 1000000) {
1171 EXPORT_SYMBOL(do_gettimeofday);
1173 static int set_rtc_mmss(unsigned long nowtime)
1175 int real_seconds, real_minutes, chip_minutes;
1176 unsigned long mregs = mstk48t02_regs;
1178 unsigned long dregs = ds1287_regs;
1180 unsigned long dregs = 0UL;
1182 unsigned long flags;
1186 * Not having a register set can lead to trouble.
1187 * Also starfire doesn't have a tod clock.
1189 if (!mregs && !dregs)
1193 spin_lock_irqsave(&mostek_lock, flags);
1195 /* Read the current RTC minutes. */
1196 tmp = mostek_read(mregs + MOSTEK_CREG);
1197 tmp |= MSTK_CREG_READ;
1198 mostek_write(mregs + MOSTEK_CREG, tmp);
1200 chip_minutes = MSTK_REG_MIN(mregs);
1202 tmp = mostek_read(mregs + MOSTEK_CREG);
1203 tmp &= ~MSTK_CREG_READ;
1204 mostek_write(mregs + MOSTEK_CREG, tmp);
1207 * since we're only adjusting minutes and seconds,
1208 * don't interfere with hour overflow. This avoids
1209 * messing with unknown time zones but requires your
1210 * RTC not to be off by more than 15 minutes
1212 real_seconds = nowtime % 60;
1213 real_minutes = nowtime / 60;
1214 if (((abs(real_minutes - chip_minutes) + 15)/30) & 1)
1215 real_minutes += 30; /* correct for half hour time zone */
1218 if (abs(real_minutes - chip_minutes) < 30) {
1219 tmp = mostek_read(mregs + MOSTEK_CREG);
1220 tmp |= MSTK_CREG_WRITE;
1221 mostek_write(mregs + MOSTEK_CREG, tmp);
1223 MSTK_SET_REG_SEC(mregs,real_seconds);
1224 MSTK_SET_REG_MIN(mregs,real_minutes);
1226 tmp = mostek_read(mregs + MOSTEK_CREG);
1227 tmp &= ~MSTK_CREG_WRITE;
1228 mostek_write(mregs + MOSTEK_CREG, tmp);
1230 spin_unlock_irqrestore(&mostek_lock, flags);
1234 spin_unlock_irqrestore(&mostek_lock, flags);
1240 unsigned char save_control, save_freq_select;
1242 /* Stolen from arch/i386/kernel/time.c, see there for
1243 * credits and descriptive comments.
1245 spin_lock_irqsave(&rtc_lock, flags);
1246 save_control = CMOS_READ(RTC_CONTROL); /* tell the clock it's being set */
1247 CMOS_WRITE((save_control|RTC_SET), RTC_CONTROL);
1249 save_freq_select = CMOS_READ(RTC_FREQ_SELECT); /* stop and reset prescaler */
1250 CMOS_WRITE((save_freq_select|RTC_DIV_RESET2), RTC_FREQ_SELECT);
1252 chip_minutes = CMOS_READ(RTC_MINUTES);
1253 if (!(save_control & RTC_DM_BINARY) || RTC_ALWAYS_BCD)
1254 BCD_TO_BIN(chip_minutes);
1255 real_seconds = nowtime % 60;
1256 real_minutes = nowtime / 60;
1257 if (((abs(real_minutes - chip_minutes) + 15)/30) & 1)
1261 if (abs(real_minutes - chip_minutes) < 30) {
1262 if (!(save_control & RTC_DM_BINARY) || RTC_ALWAYS_BCD) {
1263 BIN_TO_BCD(real_seconds);
1264 BIN_TO_BCD(real_minutes);
1266 CMOS_WRITE(real_seconds,RTC_SECONDS);
1267 CMOS_WRITE(real_minutes,RTC_MINUTES);
1270 "set_rtc_mmss: can't update from %d to %d\n",
1271 chip_minutes, real_minutes);
1275 CMOS_WRITE(save_control, RTC_CONTROL);
1276 CMOS_WRITE(save_freq_select, RTC_FREQ_SELECT);
1277 spin_unlock_irqrestore(&rtc_lock, flags);