2 * X86-64 specific CPU setup.
3 * Copyright (C) 1995 Linus Torvalds
4 * Copyright 2001, 2002, 2003 SuSE Labs / Andi Kleen.
5 * See setup.c for older changelog.
6 * $Id: setup64.c,v 1.12 2002/03/21 10:09:17 ak Exp $
8 #include <linux/config.h>
9 #include <linux/init.h>
10 #include <linux/kernel.h>
11 #include <linux/sched.h>
12 #include <linux/string.h>
13 #include <linux/bootmem.h>
14 #include <linux/bitops.h>
16 #include <asm/pgtable.h>
17 #include <asm/processor.h>
19 #include <asm/atomic.h>
20 #include <asm/mmu_context.h>
23 #include <asm/percpu.h>
25 #include <asm/proto.h>
29 char x86_boot_params[2048] __initdata = {0,};
31 unsigned long cpu_initialized __initdata = 0;
33 struct x8664_pda cpu_pda[NR_CPUS] __cacheline_aligned;
35 extern struct task_struct init_task;
37 extern unsigned char __per_cpu_start[], __per_cpu_end[];
39 extern struct desc_ptr cpu_gdt_descr[];
40 struct desc_ptr idt_descr = { 256 * 16, (unsigned long) idt_table };
42 char boot_cpu_stack[IRQSTACKSIZE] __attribute__((section(".bss.page_aligned")));
44 unsigned long __supported_pte_mask = ~0UL;
45 static int do_not_nx __initdata = 0;
48 Control non executable mappings for 64bit processes.
53 static int __init nonx_setup(char *str)
55 if (!strcmp(str, "on")) {
56 __supported_pte_mask |= _PAGE_NX;
58 } else if (!strcmp(str, "off")) {
60 __supported_pte_mask &= ~_PAGE_NX;
65 __setup("noexec=", nonx_setup);
69 * Declare PDA itself and support (irqstack,tss,pml4) as per cpu data.
70 * Always point %gs to its beginning
72 void __init setup_per_cpu_areas(void)
77 /* Copy section for each CPU (we discard the original) */
78 size = ALIGN(__per_cpu_end - __per_cpu_start, SMP_CACHE_BYTES);
80 if (size < PERCPU_ENOUGH_ROOM)
81 size = PERCPU_ENOUGH_ROOM;
84 for (i = 0; i < NR_CPUS; i++) {
86 /* If possible allocate on the node of the CPU.
87 In case it doesn't exist round-robin nodes. */
88 if (!NODE_DATA(i % numnodes)) {
89 printk("cpu with no node %d, numnodes %d\n", i, numnodes);
90 ptr = alloc_bootmem(size);
92 ptr = alloc_bootmem_node(NODE_DATA(i % numnodes), size);
95 panic("Cannot allocate cpu data for CPU %d\n", i);
96 cpu_pda[i].data_offset = ptr - __per_cpu_start;
97 memcpy(ptr, __per_cpu_start, __per_cpu_end - __per_cpu_start);
101 void pda_init(int cpu)
104 struct x8664_pda *pda = &cpu_pda[cpu];
106 /* Setup up data that may be needed in __get_free_pages early */
107 asm volatile("movl %0,%%fs ; movl %0,%%gs" :: "r" (0));
108 wrmsrl(MSR_GS_BASE, cpu_pda + cpu);
111 pda->cpunumber = cpu;
114 (unsigned long)stack_thread_info() - PDA_STACKOFFSET + THREAD_SIZE;
115 pda->active_mm = &init_mm;
119 /* others are initialized in smpboot.c */
120 pda->pcurrent = &init_task;
121 pda->irqstackptr = boot_cpu_stack;
122 level4 = init_level4_pgt;
124 level4 = (pml4_t *)__get_free_pages(GFP_ATOMIC, 0);
126 panic("Cannot allocate top level page for cpu %d", cpu);
127 pda->irqstackptr = (char *)
128 __get_free_pages(GFP_ATOMIC, IRQSTACK_ORDER);
129 if (!pda->irqstackptr)
130 panic("cannot allocate irqstack for cpu %d", cpu);
133 pda->level4_pgt = (unsigned long *)level4;
134 if (level4 != init_level4_pgt)
135 memcpy(level4, &init_level4_pgt, PAGE_SIZE);
136 set_pml4(level4 + 510, mk_kernel_pml4(__pa_symbol(boot_vmalloc_pgt)));
137 asm volatile("movq %0,%%cr3" :: "r" (__pa(level4)));
139 pda->irqstackptr += IRQSTACKSIZE-64;
142 char boot_exception_stacks[N_EXCEPTION_STACKS * EXCEPTION_STKSZ]
143 __attribute__((section(".bss.page_aligned")));
145 /* May not be marked __init: used by software suspend */
146 void syscall_init(void)
149 * LSTAR and STAR live in a bit strange symbiosis.
150 * They both write to the same internal register. STAR allows to set CS/DS
151 * but only a 32bit target. LSTAR sets the 64bit rip.
153 wrmsrl(MSR_STAR, ((u64)__USER32_CS)<<48 | ((u64)__KERNEL_CS)<<32);
154 wrmsrl(MSR_LSTAR, system_call);
156 #ifdef CONFIG_IA32_EMULATION
157 syscall32_cpu_init ();
160 /* Flags to clear on syscall */
161 wrmsrl(MSR_SYSCALL_MASK, EF_TF|EF_DF|EF_IE|0x3000);
164 void __init check_efer(void)
168 rdmsrl(MSR_EFER, efer);
169 if (!(efer & EFER_NX) || do_not_nx) {
170 __supported_pte_mask &= ~_PAGE_NX;
175 * cpu_init() initializes state that is per-CPU. Some data is already
176 * initialized (naturally) in the bootstrap process, such as the GDT
177 * and IDT. We reload them nevertheless, this function acts as a
178 * 'CPU state barrier', nothing should get across.
179 * A lot of state is already set up in PDA init.
181 void __init cpu_init (void)
184 int cpu = stack_smp_processor_id();
186 int cpu = smp_processor_id();
188 struct tss_struct *t = &per_cpu(init_tss, cpu);
190 char *estacks = NULL;
191 struct task_struct *me;
194 /* CPU 0 is initialised in head64.c */
198 estacks = boot_exception_stacks;
202 if (test_and_set_bit(cpu, &cpu_initialized))
203 panic("CPU#%d already initialized!\n", cpu);
205 printk("Initializing CPU#%d\n", cpu);
207 clear_in_cr4(X86_CR4_VME|X86_CR4_PVI|X86_CR4_TSD|X86_CR4_DE);
210 * Initialize the per-CPU GDT with the boot GDT,
211 * and set up the GDT descriptor:
214 memcpy(cpu_gdt_table[cpu], cpu_gdt_table[0], GDT_SIZE);
217 cpu_gdt_descr[cpu].size = GDT_SIZE;
218 cpu_gdt_descr[cpu].address = (unsigned long)cpu_gdt_table[cpu];
219 asm volatile("lgdt %0" :: "m" (cpu_gdt_descr[cpu]));
220 asm volatile("lidt %0" :: "m" (idt_descr));
222 memcpy(me->thread.tls_array, cpu_gdt_table[cpu], GDT_ENTRY_TLS_ENTRIES * 8);
228 asm volatile("pushfq ; popq %%rax ; btr $14,%%rax ; pushq %%rax ; popfq" ::: "eax");
231 early_identify_cpu(&boot_cpu_data);
235 wrmsrl(MSR_FS_BASE, 0);
236 wrmsrl(MSR_KERNEL_GS_BASE, 0);
242 * set up and load the per-CPU TSS
244 for (v = 0; v < N_EXCEPTION_STACKS; v++) {
246 estacks = (char *)__get_free_pages(GFP_ATOMIC,
247 EXCEPTION_STACK_ORDER);
249 panic("Cannot allocate exception stack %ld %d\n",
252 estacks += EXCEPTION_STKSZ;
253 t->ist[v] = (unsigned long)estacks;
256 t->io_bitmap_base = offsetof(struct tss_struct, io_bitmap);
258 * <= is required because the CPU will access up to
259 * 8 bits beyond the end of the IO permission bitmap.
261 for (i = 0; i <= IO_BITMAP_LONGS; i++)
262 t->io_bitmap[i] = ~0UL;
264 atomic_inc(&init_mm.mm_count);
265 me->active_mm = &init_mm;
268 enter_lazy_tlb(&init_mm, me);
270 set_tss_desc(cpu, t);
272 load_LDT(&init_mm.context);
275 * Clear all 6 debug registers: