2 * X86-64 specific CPU setup.
3 * Copyright (C) 1995 Linus Torvalds
4 * Copyright 2001, 2002, 2003 SuSE Labs / Andi Kleen.
5 * See setup.c for older changelog.
6 * $Id: setup64.c,v 1.12 2002/03/21 10:09:17 ak Exp $
8 #include <linux/config.h>
9 #include <linux/init.h>
10 #include <linux/kernel.h>
11 #include <linux/sched.h>
12 #include <linux/string.h>
13 #include <linux/bootmem.h>
14 #include <linux/bitops.h>
15 #include <linux/module.h>
16 #include <asm/bootsetup.h>
18 #include <asm/pgtable.h>
19 #include <asm/processor.h>
21 #include <asm/atomic.h>
22 #include <asm/mmu_context.h>
25 #include <asm/percpu.h>
26 #include <asm/proto.h>
27 #include <asm/sections.h>
29 char x86_boot_params[BOOT_PARAM_SIZE] __initdata = {0,};
31 cpumask_t cpu_initialized __cpuinitdata = CPU_MASK_NONE;
33 struct x8664_pda *_cpu_pda[NR_CPUS] __read_mostly;
34 struct x8664_pda boot_cpu_pda[NR_CPUS] __cacheline_aligned;
36 struct desc_ptr idt_descr = { 256 * 16 - 1, (unsigned long) idt_table };
38 char boot_cpu_stack[IRQSTACKSIZE] __attribute__((section(".bss.page_aligned")));
40 unsigned long __supported_pte_mask __read_mostly = ~0UL;
41 static int do_not_nx __cpuinitdata = 0;
44 Control non executable mappings for 64bit processes.
49 void __init nonx_setup(const char *str)
51 if (!strncmp(str, "on", 2)) {
52 __supported_pte_mask |= _PAGE_NX;
54 } else if (!strncmp(str, "off", 3)) {
56 __supported_pte_mask &= ~_PAGE_NX;
62 * Declare PDA itself and support (irqstack,tss,pgd) as per cpu data.
63 * Always point %gs to its beginning
65 void __init setup_per_cpu_areas(void)
70 #ifdef CONFIG_HOTPLUG_CPU
71 prefill_possible_map();
74 /* Copy section for each CPU (we discard the original) */
75 size = ALIGN(__per_cpu_end - __per_cpu_start, SMP_CACHE_BYTES);
77 if (size < PERCPU_ENOUGH_ROOM)
78 size = PERCPU_ENOUGH_ROOM;
81 for_each_cpu_mask (i, cpu_possible_map) {
84 if (!NODE_DATA(cpu_to_node(i))) {
85 printk("cpu with no node %d, num_online_nodes %d\n",
86 i, num_online_nodes());
87 ptr = alloc_bootmem(size);
89 ptr = alloc_bootmem_node(NODE_DATA(cpu_to_node(i)), size);
92 panic("Cannot allocate cpu data for CPU %d\n", i);
93 cpu_pda(i)->data_offset = ptr - __per_cpu_start;
94 memcpy(ptr, __per_cpu_start, __per_cpu_end - __per_cpu_start);
98 void pda_init(int cpu)
100 struct x8664_pda *pda = cpu_pda(cpu);
102 /* Setup up data that may be needed in __get_free_pages early */
103 asm volatile("movl %0,%%fs ; movl %0,%%gs" :: "r" (0));
104 wrmsrl(MSR_GS_BASE, pda);
106 pda->cpunumber = cpu;
109 (unsigned long)stack_thread_info() - PDA_STACKOFFSET + THREAD_SIZE;
110 pda->active_mm = &init_mm;
114 /* others are initialized in smpboot.c */
115 pda->pcurrent = &init_task;
116 pda->irqstackptr = boot_cpu_stack;
118 pda->irqstackptr = (char *)
119 __get_free_pages(GFP_ATOMIC, IRQSTACK_ORDER);
120 if (!pda->irqstackptr)
121 panic("cannot allocate irqstack for cpu %d", cpu);
125 pda->irqstackptr += IRQSTACKSIZE-64;
128 char boot_exception_stacks[(N_EXCEPTION_STACKS - 1) * EXCEPTION_STKSZ + DEBUG_STKSZ]
129 __attribute__((section(".bss.page_aligned")));
131 /* May not be marked __init: used by software suspend */
132 void syscall_init(void)
135 * LSTAR and STAR live in a bit strange symbiosis.
136 * They both write to the same internal register. STAR allows to set CS/DS
137 * but only a 32bit target. LSTAR sets the 64bit rip.
139 wrmsrl(MSR_STAR, ((u64)__USER32_CS)<<48 | ((u64)__KERNEL_CS)<<32);
140 wrmsrl(MSR_LSTAR, system_call);
142 #ifdef CONFIG_IA32_EMULATION
143 syscall32_cpu_init ();
146 /* Flags to clear on syscall */
147 wrmsrl(MSR_SYSCALL_MASK, EF_TF|EF_DF|EF_IE|0x3000);
150 void __cpuinit check_efer(void)
154 rdmsrl(MSR_EFER, efer);
155 if (!(efer & EFER_NX) || do_not_nx) {
156 __supported_pte_mask &= ~_PAGE_NX;
161 * cpu_init() initializes state that is per-CPU. Some data is already
162 * initialized (naturally) in the bootstrap process, such as the GDT
163 * and IDT. We reload them nevertheless, this function acts as a
164 * 'CPU state barrier', nothing should get across.
165 * A lot of state is already set up in PDA init.
167 void __cpuinit cpu_init (void)
169 int cpu = stack_smp_processor_id();
170 struct tss_struct *t = &per_cpu(init_tss, cpu);
172 char *estacks = NULL;
173 struct task_struct *me;
176 /* CPU 0 is initialised in head64.c */
179 zap_low_mappings(cpu);
181 estacks = boot_exception_stacks;
185 if (cpu_test_and_set(cpu, cpu_initialized))
186 panic("CPU#%d already initialized!\n", cpu);
188 printk("Initializing CPU#%d\n", cpu);
190 clear_in_cr4(X86_CR4_VME|X86_CR4_PVI|X86_CR4_TSD|X86_CR4_DE);
193 * Initialize the per-CPU GDT with the boot GDT,
194 * and set up the GDT descriptor:
197 memcpy(cpu_gdt(cpu), cpu_gdt_table, GDT_SIZE);
199 cpu_gdt_descr[cpu].size = GDT_SIZE;
200 asm volatile("lgdt %0" :: "m" (cpu_gdt_descr[cpu]));
201 asm volatile("lidt %0" :: "m" (idt_descr));
203 memset(me->thread.tls_array, 0, GDT_ENTRY_TLS_ENTRIES * 8);
206 wrmsrl(MSR_FS_BASE, 0);
207 wrmsrl(MSR_KERNEL_GS_BASE, 0);
213 * set up and load the per-CPU TSS
215 for (v = 0; v < N_EXCEPTION_STACKS; v++) {
217 static const unsigned int order[N_EXCEPTION_STACKS] = {
218 [0 ... N_EXCEPTION_STACKS - 1] = EXCEPTION_STACK_ORDER,
219 [DEBUG_STACK - 1] = DEBUG_STACK_ORDER
222 estacks = (char *)__get_free_pages(GFP_ATOMIC, order[v]);
224 panic("Cannot allocate exception stack %ld %d\n",
228 #if DEBUG_STKSZ > EXCEPTION_STKSZ
230 cpu_pda(cpu)->debugstack = (unsigned long)estacks;
231 estacks += DEBUG_STKSZ;
235 estacks += EXCEPTION_STKSZ;
238 t->ist[v] = (unsigned long)estacks;
241 t->io_bitmap_base = offsetof(struct tss_struct, io_bitmap);
243 * <= is required because the CPU will access up to
244 * 8 bits beyond the end of the IO permission bitmap.
246 for (i = 0; i <= IO_BITMAP_LONGS; i++)
247 t->io_bitmap[i] = ~0UL;
249 atomic_inc(&init_mm.mm_count);
250 me->active_mm = &init_mm;
253 enter_lazy_tlb(&init_mm, me);
255 set_tss_desc(cpu, t);
257 load_LDT(&init_mm.context);
260 * Clear all 6 debug registers:
263 set_debugreg(0UL, 0);
264 set_debugreg(0UL, 1);
265 set_debugreg(0UL, 2);
266 set_debugreg(0UL, 3);
267 set_debugreg(0UL, 6);
268 set_debugreg(0UL, 7);