2 * X86-64 specific CPU setup.
3 * Copyright (C) 1995 Linus Torvalds
4 * Copyright 2001, 2002, 2003 SuSE Labs / Andi Kleen.
5 * See setup.c for older changelog.
6 * $Id: setup64.c,v 1.12 2002/03/21 10:09:17 ak Exp $
8 * Jun Nakajima <jun.nakajima@intel.com>
12 #include <linux/config.h>
13 #include <linux/init.h>
14 #include <linux/kernel.h>
15 #include <linux/sched.h>
16 #include <linux/string.h>
17 #include <linux/bootmem.h>
18 #include <linux/bitops.h>
20 #include <asm/pgtable.h>
21 #include <asm/processor.h>
23 #include <asm/atomic.h>
24 #include <asm/mmu_context.h>
27 #include <asm/percpu.h>
29 #include <asm/proto.h>
33 #include <asm-xen/hypervisor.h>
35 char x86_boot_params[2048] __initdata = {0,};
37 cpumask_t cpu_initialized __initdata = CPU_MASK_NONE;
39 struct x8664_pda cpu_pda[NR_CPUS] __cacheline_aligned;
41 extern struct task_struct init_task;
43 extern unsigned char __per_cpu_start[], __per_cpu_end[];
45 extern struct desc_ptr cpu_gdt_descr[];
46 struct desc_ptr idt_descr = { 256 * 16, (unsigned long) idt_table };
48 char boot_cpu_stack[IRQSTACKSIZE] __attribute__((section(".bss.page_aligned")));
50 unsigned long __supported_pte_mask = ~0UL;
51 static int do_not_nx __initdata = 0;
54 Control non executable mappings for 64bit processes.
59 int __init nonx_setup(char *str)
61 if (!strncmp(str, "on", 2)) {
62 __supported_pte_mask |= _PAGE_NX;
64 } else if (!strncmp(str, "off", 3)) {
66 __supported_pte_mask &= ~_PAGE_NX;
70 __setup("noexec=", nonx_setup); /* parsed early actually */
72 int force_personality32 = READ_IMPLIES_EXEC;
75 Control non executable heap for 32bit processes.
76 To control the stack too use noexec=off
78 on PROT_READ does not imply PROT_EXEC for 32bit processes
79 off PROT_READ implies PROT_EXEC (default)
81 static int __init nonx32_setup(char *str)
83 if (!strcmp(str, "on"))
84 force_personality32 &= ~READ_IMPLIES_EXEC;
85 else if (!strcmp(str, "off"))
86 force_personality32 |= READ_IMPLIES_EXEC;
89 __setup("noexec32=", nonx32_setup);
93 * Declare PDA itself and support (irqstack,tss,pgd) as per cpu data.
94 * Always point %gs to its beginning
96 void __init setup_per_cpu_areas(void)
101 /* Copy section for each CPU (we discard the original) */
102 size = ALIGN(__per_cpu_end - __per_cpu_start, SMP_CACHE_BYTES);
103 #ifdef CONFIG_MODULES
104 if (size < PERCPU_ENOUGH_ROOM)
105 size = PERCPU_ENOUGH_ROOM;
108 for (i = 0; i < NR_CPUS; i++) {
111 if (!NODE_DATA(cpu_to_node(i))) {
112 printk("cpu with no node %d, num_online_nodes %d\n",
113 i, num_online_nodes());
114 ptr = alloc_bootmem(size);
116 ptr = alloc_bootmem_node(NODE_DATA(cpu_to_node(i)), size);
119 panic("Cannot allocate cpu data for CPU %d\n", i);
120 cpu_pda[i].data_offset = ptr - __per_cpu_start;
121 memcpy(ptr, __per_cpu_start, __per_cpu_end - __per_cpu_start);
125 void pda_init(int cpu)
127 pgd_t *old_level4 = (pgd_t *)xen_start_info.pt_base;
128 struct x8664_pda *pda = &cpu_pda[cpu];
130 /* Setup up data that may be needed in __get_free_pages early */
131 asm volatile("movl %0,%%fs ; movl %0,%%gs" :: "r" (0));
132 HYPERVISOR_set_segment_base(SEGBASE_GS_KERNEL,
133 (unsigned long)(cpu_pda + cpu));
136 pda->cpunumber = cpu;
139 (unsigned long)stack_thread_info() - PDA_STACKOFFSET + THREAD_SIZE;
140 pda->active_mm = &init_mm;
142 pda->kernel_mode = 1;
145 memcpy((void *)init_level4_pgt,
146 (void *) xen_start_info.pt_base, PAGE_SIZE);
147 /* others are initialized in smpboot.c */
148 pda->pcurrent = &init_task;
149 pda->irqstackptr = boot_cpu_stack;
150 make_page_readonly(init_level4_pgt);
151 make_page_readonly(init_level4_user_pgt);
152 make_page_readonly(level3_user_pgt); /* for vsyscall stuff */
153 xen_pgd_pin(__pa_symbol(init_level4_user_pgt));
154 xen_pud_pin(__pa_symbol(level3_user_pgt));
155 set_pgd((pgd_t *)(init_level4_user_pgt + 511),
156 mk_kernel_pgd(__pa_symbol(level3_user_pgt)));
158 pda->irqstackptr = (char *)
159 __get_free_pages(GFP_ATOMIC, IRQSTACK_ORDER);
160 if (!pda->irqstackptr)
161 panic("cannot allocate irqstack for cpu %d", cpu);
164 xen_pt_switch(__pa(init_level4_pgt));
165 xen_new_user_pt(__pa(init_level4_user_pgt));
168 xen_pgd_unpin(__pa(old_level4));
170 early_printk("__pa: %x, <machine_phys> old_level 4 %x\n",
171 __pa(xen_start_info.pt_base),
172 pfn_to_mfn(__pa(old_level4) >> PAGE_SHIFT));
174 // make_page_writable(old_level4);
175 // free_bootmem(__pa(old_level4), PAGE_SIZE);
178 pda->irqstackptr += IRQSTACKSIZE-64;
181 char boot_exception_stacks[N_EXCEPTION_STACKS * EXCEPTION_STKSZ]
182 __attribute__((section(".bss.page_aligned")));
184 /* May not be marked __init: used by software suspend */
185 void syscall_init(void)
187 #ifdef CONFIG_IA32_EMULATION
188 syscall32_cpu_init ();
192 void __init check_efer(void)
196 /* rdmsrl(MSR_EFER, efer); */
199 * At this point, Xen does not like the bit 63.
200 * So NX is not supported. Come back later.
204 if (!(efer & EFER_NX) || do_not_nx) {
205 __supported_pte_mask &= ~_PAGE_NX;
209 void __init cpu_gdt_init(struct desc_ptr *gdt_descr)
211 unsigned long frames[gdt_descr->size >> PAGE_SHIFT];
215 for (va = gdt_descr->address, f = 0;
216 va < gdt_descr->address + gdt_descr->size;
217 va += PAGE_SIZE, f++) {
218 frames[f] = virt_to_machine(va) >> PAGE_SHIFT;
219 make_page_readonly((void *)va);
221 if (HYPERVISOR_set_gdt(frames, gdt_descr->size /
222 sizeof (struct desc_struct)))
228 * cpu_init() initializes state that is per-CPU. Some data is already
229 * initialized (naturally) in the bootstrap process, such as the GDT
230 * and IDT. We reload them nevertheless, this function acts as a
231 * 'CPU state barrier', nothing should get across.
232 * A lot of state is already set up in PDA init.
234 void __init cpu_init (void)
237 int cpu = stack_smp_processor_id();
239 int cpu = smp_processor_id();
241 struct tss_struct *t = &per_cpu(init_tss, cpu);
243 char *estacks = NULL;
244 struct task_struct *me;
247 /* CPU 0 is initialised in head64.c */
251 estacks = boot_exception_stacks;
255 if (test_and_set_bit(cpu, &cpu_initialized))
256 panic("CPU#%d already initialized!\n", cpu);
258 printk("Initializing CPU#%d\n", cpu);
261 clear_in_cr4(X86_CR4_VME|X86_CR4_PVI|X86_CR4_TSD|X86_CR4_DE);
264 * Initialize the per-CPU GDT with the boot GDT,
265 * and set up the GDT descriptor:
268 memcpy(cpu_gdt_table[cpu], cpu_gdt_table[0], GDT_SIZE);
271 cpu_gdt_descr[cpu].size = GDT_SIZE;
272 cpu_gdt_descr[cpu].address = (unsigned long)cpu_gdt_table[cpu];
274 asm volatile("lgdt %0" :: "m" (cpu_gdt_descr[cpu]));
275 asm volatile("lidt %0" :: "m" (idt_descr));
277 cpu_gdt_init(&cpu_gdt_descr[cpu]);
280 memcpy(me->thread.tls_array, cpu_gdt_table[cpu], GDT_ENTRY_TLS_ENTRIES * 8);
283 memcpy(me->thread.tls_array, &get_cpu_gdt_table(cpu)[GDT_ENTRY_TLS_MIN],
284 GDT_ENTRY_TLS_ENTRIES * 8);
290 asm volatile("pushfq ; popq %%rax ; btr $14,%%rax ; pushq %%rax ; popfq" ::: "eax");
293 early_identify_cpu(&boot_cpu_data);
301 * set up and load the per-CPU TSS
303 for (v = 0; v < N_EXCEPTION_STACKS; v++) {
305 estacks = (char *)__get_free_pages(GFP_ATOMIC,
306 EXCEPTION_STACK_ORDER);
308 panic("Cannot allocate exception stack %ld %d\n",
311 estacks += EXCEPTION_STKSZ;
312 t->ist[v] = (unsigned long)estacks;
315 t->io_bitmap_base = offsetof(struct tss_struct, io_bitmap);
317 * <= is required because the CPU will access up to
318 * 8 bits beyond the end of the IO permission bitmap.
320 for (i = 0; i <= IO_BITMAP_LONGS; i++)
321 t->io_bitmap[i] = ~0UL;
323 atomic_inc(&init_mm.mm_count);
324 me->active_mm = &init_mm;
327 enter_lazy_tlb(&init_mm, me);
329 load_LDT(&init_mm.context);
332 * Clear all 6 debug registers:
334 #define CD(register) HYPERVISOR_set_debugreg(register, 0)
336 CD(0); CD(1); CD(2); CD(3); /* no db4 and db5 */; CD(6); CD(7);