2 * carmel.c: Driver for Promise SATA SX8 looks-like-I2O hardware
4 * Copyright 2004 Red Hat, Inc.
6 * Author/maintainer: Jeff Garzik <jgarzik@pobox.com>
8 * This file is subject to the terms and conditions of the GNU General Public
9 * License. See the file "COPYING" in the main directory of this archive
13 #include <linux/kernel.h>
14 #include <linux/module.h>
15 #include <linux/init.h>
16 #include <linux/pci.h>
17 #include <linux/slab.h>
18 #include <linux/spinlock.h>
19 #include <linux/blkdev.h>
20 #include <linux/sched.h>
21 #include <linux/devfs_fs_kernel.h>
22 #include <linux/interrupt.h>
23 #include <linux/compiler.h>
24 #include <linux/workqueue.h>
25 #include <linux/bitops.h>
26 #include <linux/delay.h>
27 #include <linux/time.h>
28 #include <linux/hdreg.h>
30 #include <asm/semaphore.h>
31 #include <asm/uaccess.h>
33 MODULE_AUTHOR("Jeff Garzik");
34 MODULE_LICENSE("GPL");
35 MODULE_DESCRIPTION("Promise SATA SX8 (carmel) block driver");
39 #define CARM_VERBOSE_DEBUG
42 #undef CARM_VERBOSE_DEBUG
46 #define DRV_NAME "carmel"
47 #define DRV_VERSION "0.8"
48 #define PFX DRV_NAME ": "
50 #define NEXT_RESP(idx) ((idx + 1) % RMSG_Q_LEN)
52 /* 0xf is just arbitrary, non-zero noise; this is sorta like poisoning */
53 #define TAG_ENCODE(tag) (((tag) << 16) | 0xf)
54 #define TAG_DECODE(tag) (((tag) >> 16) & 0x1f)
55 #define TAG_VALID(tag) ((((tag) & 0xf) == 0xf) && (TAG_DECODE(tag) < 32))
57 /* note: prints function name for you */
59 #define DPRINTK(fmt, args...) printk(KERN_ERR "%s: " fmt, __FUNCTION__, ## args)
60 #ifdef CARM_VERBOSE_DEBUG
61 #define VPRINTK(fmt, args...) printk(KERN_ERR "%s: " fmt, __FUNCTION__, ## args)
63 #define VPRINTK(fmt, args...)
64 #endif /* CARM_VERBOSE_DEBUG */
66 #define DPRINTK(fmt, args...)
67 #define VPRINTK(fmt, args...)
68 #endif /* CARM_DEBUG */
73 #define assert(expr) \
74 if(unlikely(!(expr))) { \
75 printk(KERN_ERR "Assertion failed! %s,%s,%s,line=%d\n", \
76 #expr,__FILE__,__FUNCTION__,__LINE__); \
80 /* defines only for the constants which don't work well as enums */
84 /* adapter-wide limits */
86 CARM_SHM_SIZE = (4096 << 7),
87 CARM_MINORS_PER_MAJOR = 256 / CARM_MAX_PORTS,
88 CARM_MAX_WAIT_Q = CARM_MAX_PORTS + 1,
90 /* command message queue limits */
91 CARM_MAX_REQ = 64, /* max command msgs per host */
92 CARM_MAX_Q = 1, /* one command at a time */
93 CARM_MSG_LOW_WATER = (CARM_MAX_REQ / 4), /* refill mark */
95 /* S/G limits, host-wide and per-request */
96 CARM_MAX_REQ_SG = 32, /* max s/g entries per request */
97 CARM_SG_BOUNDARY = 0xffffUL, /* s/g segment boundary */
98 CARM_MAX_HOST_SG = 600, /* max s/g entries per host */
99 CARM_SG_LOW_WATER = (CARM_MAX_HOST_SG / 4), /* re-fill mark */
101 /* hardware registers */
103 CARM_INT_STAT = 0x10, /* interrupt status */
104 CARM_INT_MASK = 0x14, /* interrupt mask */
105 CARM_HMUC = 0x18, /* host message unit control */
106 RBUF_ADDR_LO = 0x20, /* response msg DMA buf low 32 bits */
107 RBUF_ADDR_HI = 0x24, /* response msg DMA buf high 32 bits */
109 CARM_RESP_IDX = 0x2c,
110 CARM_CMS0 = 0x30, /* command message size reg 0 */
115 /* bits in CARM_INT_{STAT,MASK} */
116 INT_RESERVED = 0xfffffff0,
117 INT_WATCHDOG = (1 << 3), /* watchdog timer */
118 INT_Q_OVERFLOW = (1 << 2), /* cmd msg q overflow */
119 INT_Q_AVAILABLE = (1 << 1), /* cmd msg q has free space */
120 INT_RESPONSE = (1 << 0), /* response msg available */
121 INT_ACK_MASK = INT_WATCHDOG | INT_Q_OVERFLOW,
122 INT_DEF_MASK = INT_RESERVED | INT_Q_OVERFLOW |
125 /* command messages, and related register bits */
126 CARM_HAVE_RESP = 0x01,
130 CARM_MSG_GET_CAPACITY = 4,
137 CARM_WZBC = (1 << 0),
139 CARM_Q_FULL = (1 << 3),
143 /* CARM_MSG_IOCTL messages */
144 CARM_IOC_SCAN_CHAN = 5, /* scan channels for devices */
145 CARM_IOC_GET_TCQ = 13, /* get tcq/ncq depth */
146 CARM_IOC_SET_TCQ = 14, /* set tcq/ncq depth */
148 IOC_SCAN_CHAN_NODEV = 0x1f,
149 IOC_SCAN_CHAN_OFFSET = 0x40,
151 /* CARM_MSG_ARRAY messages */
154 ARRAY_NO_EXIST = (1 << 31),
156 /* response messages */
157 RMSG_SZ = 8, /* sizeof(struct carm_response) */
158 RMSG_Q_LEN = 48, /* resp. msg list length */
159 RMSG_OK = 1, /* bit indicating msg was successful */
160 /* length of entire resp. msg buffer */
161 RBUF_LEN = RMSG_SZ * RMSG_Q_LEN,
163 PDC_SHM_SIZE = (4096 << 7), /* length of entire h/w buffer */
165 /* CARM_MSG_MISC messages */
170 /* MISC_GET_FW_VER feature bits */
171 FW_VER_4PORT = (1 << 2), /* 1=4 ports, 0=8 ports */
172 FW_VER_NON_RAID = (1 << 1), /* 1=non-RAID firmware, 0=RAID */
173 FW_VER_ZCR = (1 << 0), /* zero channel RAID (whatever that is) */
175 /* carm_host flags */
176 FL_NON_RAID = FW_VER_NON_RAID,
177 FL_4PORT = FW_VER_4PORT,
178 FL_FW_VER_MASK = (FW_VER_NON_RAID | FW_VER_4PORT),
180 FL_DYN_MAJOR = (1 << 17),
183 enum scatter_gather_types {
189 HST_INVALID, /* invalid state; never used */
190 HST_ALLOC_BUF, /* setting up master SHM area */
191 HST_ERROR, /* we never leave here */
192 HST_PORT_SCAN, /* start dev scan */
193 HST_DEV_SCAN_START, /* start per-device probe */
194 HST_DEV_SCAN, /* continue per-device probe */
195 HST_DEV_ACTIVATE, /* activate devices we found */
196 HST_PROBE_FINISHED, /* probe is complete */
197 HST_PROBE_START, /* initiate probe */
198 HST_SYNC_TIME, /* tell firmware what time it is */
199 HST_GET_FW_VER, /* get firmware version, adapter port cnt */
203 static const char *state_name[] = {
208 "HST_DEV_SCAN_START",
211 "HST_PROBE_FINISHED",
219 unsigned int port_no;
220 unsigned int n_queued;
221 struct gendisk *disk;
222 struct carm_host *host;
224 /* attached device characteristics */
232 struct carm_request {
235 unsigned int msg_type;
236 unsigned int msg_subtype;
237 unsigned int msg_bucket;
239 struct carm_port *port;
240 struct scatterlist sg[CARM_MAX_REQ_SG];
254 struct pci_dev *pdev;
258 request_queue_t *oob_q;
261 unsigned int hw_sg_used;
263 unsigned int resp_idx;
265 unsigned int wait_q_prod;
266 unsigned int wait_q_cons;
267 request_queue_t *wait_q[CARM_MAX_WAIT_Q];
271 struct carm_request req[CARM_MAX_REQ];
276 unsigned long dev_active;
277 unsigned long dev_present;
278 struct carm_port port[CARM_MAX_PORTS];
280 struct work_struct fsm_task;
282 struct semaphore probe_sem;
285 struct carm_response {
288 } __attribute__((packed));
293 } __attribute__((packed));
304 struct carm_msg_sg sg[32];
305 } __attribute__((packed));
307 struct carm_msg_allocbuf {
321 struct carm_msg_sg sg[8];
322 } __attribute__((packed));
324 struct carm_msg_ioctl {
332 } __attribute__((packed));
334 struct carm_msg_sync_time {
341 } __attribute__((packed));
343 struct carm_msg_get_fw_ver {
350 } __attribute__((packed));
357 } __attribute__((packed));
359 struct carm_array_info {
381 /* device list continues beyond this point? */
382 } __attribute__((packed));
384 static int carm_init_one (struct pci_dev *pdev, const struct pci_device_id *ent);
385 static void carm_remove_one (struct pci_dev *pdev);
386 static int carm_bdev_ioctl(struct inode *ino, struct file *fil,
387 unsigned int cmd, unsigned long arg);
389 static struct pci_device_id carm_pci_tbl[] = {
390 { PCI_VENDOR_ID_PROMISE, 0x8000, PCI_ANY_ID, PCI_ANY_ID, 0, 0, },
391 { PCI_VENDOR_ID_PROMISE, 0x8002, PCI_ANY_ID, PCI_ANY_ID, 0, 0, },
392 { } /* terminate list */
394 MODULE_DEVICE_TABLE(pci, carm_pci_tbl);
396 static struct pci_driver carm_driver = {
398 .id_table = carm_pci_tbl,
399 .probe = carm_init_one,
400 .remove = carm_remove_one,
403 static struct block_device_operations carm_bd_ops = {
404 .owner = THIS_MODULE,
405 .ioctl = carm_bdev_ioctl,
408 static unsigned int carm_host_id;
409 static unsigned long carm_major_alloc;
413 static int carm_bdev_ioctl(struct inode *ino, struct file *fil,
414 unsigned int cmd, unsigned long arg)
416 void __user *usermem = (void *) arg;
417 struct carm_port *port = ino->i_bdev->bd_disk->private_data;
418 struct hd_geometry geom;
425 geom.heads = (u8) port->dev_geom_head;
426 geom.sectors = (u8) port->dev_geom_sect;
427 geom.cylinders = port->dev_geom_cyl;
428 geom.start = get_start_sect(ino->i_bdev);
430 if (copy_to_user(usermem, &geom, sizeof(geom)))
441 static inline unsigned long msecs_to_jiffies(unsigned long msecs)
443 return ((HZ * msecs + 999) / 1000);
446 static void msleep(unsigned long msecs)
448 set_current_state(TASK_UNINTERRUPTIBLE);
449 schedule_timeout(msecs_to_jiffies(msecs));
452 static const u32 msg_sizes[] = { 32, 64, 128, CARM_MSG_SIZE };
454 static inline int carm_lookup_bucket(u32 msg_size)
458 for (i = 0; i < ARRAY_SIZE(msg_sizes); i++)
459 if (msg_size <= msg_sizes[i])
465 static void carm_init_buckets(void *mmio)
469 for (i = 0; i < ARRAY_SIZE(msg_sizes); i++)
470 writel(msg_sizes[i], mmio + CARM_CMS0 + (4 * i));
473 static inline void *carm_ref_msg(struct carm_host *host,
474 unsigned int msg_idx)
476 return host->msg_base + (msg_idx * CARM_MSG_SIZE);
479 static inline dma_addr_t carm_ref_msg_dma(struct carm_host *host,
480 unsigned int msg_idx)
482 return host->msg_dma + (msg_idx * CARM_MSG_SIZE);
485 static int carm_send_msg(struct carm_host *host,
486 struct carm_request *crq)
488 void *mmio = host->mmio;
489 u32 msg = (u32) carm_ref_msg_dma(host, crq->tag);
490 u32 cm_bucket = crq->msg_bucket;
496 tmp = readl(mmio + CARM_HMUC);
497 if (tmp & CARM_Q_FULL) {
499 tmp = readl(mmio + CARM_INT_MASK);
500 tmp |= INT_Q_AVAILABLE;
501 writel(tmp, mmio + CARM_INT_MASK);
502 readl(mmio + CARM_INT_MASK); /* flush */
504 DPRINTK("host msg queue full\n");
507 writel(msg | (cm_bucket << 1), mmio + CARM_IHQP);
508 readl(mmio + CARM_IHQP); /* flush */
514 static struct carm_request *carm_get_request(struct carm_host *host)
518 /* obey global hardware limit on S/G entries */
519 if (host->hw_sg_used >= (CARM_MAX_HOST_SG - CARM_MAX_REQ_SG))
522 for (i = 0; i < CARM_MAX_Q; i++)
523 if ((host->msg_alloc & (1ULL << i)) == 0) {
524 struct carm_request *crq = &host->req[i];
528 host->msg_alloc |= (1ULL << i);
531 assert(host->n_msgs <= CARM_MAX_REQ);
535 DPRINTK("no request available, returning NULL\n");
539 static int carm_put_request(struct carm_host *host, struct carm_request *crq)
541 assert(crq->tag < CARM_MAX_Q);
543 if (unlikely((host->msg_alloc & (1ULL << crq->tag)) == 0))
544 return -EINVAL; /* tried to clear a tag that was not active */
546 assert(host->hw_sg_used >= crq->n_elem);
548 host->msg_alloc &= ~(1ULL << crq->tag);
549 host->hw_sg_used -= crq->n_elem;
555 static struct carm_request *carm_get_special(struct carm_host *host)
558 struct carm_request *crq = NULL;
562 while (tries-- > 0) {
563 spin_lock_irqsave(&host->lock, flags);
564 crq = carm_get_request(host);
565 spin_unlock_irqrestore(&host->lock, flags);
575 rq = blk_get_request(host->oob_q, WRITE /* bogus */, GFP_KERNEL);
577 spin_lock_irqsave(&host->lock, flags);
578 carm_put_request(host, crq);
579 spin_unlock_irqrestore(&host->lock, flags);
587 static int carm_array_info (struct carm_host *host, unsigned int array_idx)
589 struct carm_msg_ioctl *ioc;
593 struct carm_request *crq;
596 crq = carm_get_special(host);
604 ioc = carm_ref_msg(host, idx);
605 msg_dma = carm_ref_msg_dma(host, idx);
606 msg_data = (u32) (msg_dma + sizeof(struct carm_array_info));
608 crq->msg_type = CARM_MSG_ARRAY;
609 crq->msg_subtype = CARM_ARRAY_INFO;
610 rc = carm_lookup_bucket(sizeof(struct carm_msg_ioctl) +
611 sizeof(struct carm_array_info));
613 crq->msg_bucket = (u32) rc;
615 memset(ioc, 0, sizeof(*ioc));
616 ioc->type = CARM_MSG_ARRAY;
617 ioc->subtype = CARM_ARRAY_INFO;
618 ioc->array_id = (u8) array_idx;
619 ioc->handle = cpu_to_le32(TAG_ENCODE(idx));
620 ioc->data_addr = cpu_to_le32(msg_data);
622 spin_lock_irq(&host->lock);
623 assert(host->state == HST_DEV_SCAN_START ||
624 host->state == HST_DEV_SCAN);
625 spin_unlock_irq(&host->lock);
627 DPRINTK("blk_insert_request, tag == %u\n", idx);
628 blk_insert_request(host->oob_q, crq->rq, 1, crq, 0);
633 spin_lock_irq(&host->lock);
634 host->state = HST_ERROR;
635 spin_unlock_irq(&host->lock);
639 typedef unsigned int (*carm_sspc_t)(struct carm_host *, unsigned int, void *);
641 static int carm_send_special (struct carm_host *host, carm_sspc_t func)
643 struct carm_request *crq;
644 struct carm_msg_ioctl *ioc;
646 unsigned int idx, msg_size;
649 crq = carm_get_special(host);
655 mem = carm_ref_msg(host, idx);
657 msg_size = func(host, idx, mem);
660 crq->msg_type = ioc->type;
661 crq->msg_subtype = ioc->subtype;
662 rc = carm_lookup_bucket(msg_size);
664 crq->msg_bucket = (u32) rc;
666 DPRINTK("blk_insert_request, tag == %u\n", idx);
667 blk_insert_request(host->oob_q, crq->rq, 1, crq, 0);
672 static unsigned int carm_fill_sync_time(struct carm_host *host,
673 unsigned int idx, void *mem)
676 struct carm_msg_sync_time *st = mem;
678 do_gettimeofday(&tv);
680 memset(st, 0, sizeof(*st));
681 st->type = CARM_MSG_MISC;
682 st->subtype = MISC_SET_TIME;
683 st->handle = cpu_to_le32(TAG_ENCODE(idx));
684 st->timestamp = cpu_to_le32(tv.tv_sec);
686 return sizeof(struct carm_msg_sync_time);
689 static unsigned int carm_fill_alloc_buf(struct carm_host *host,
690 unsigned int idx, void *mem)
692 struct carm_msg_allocbuf *ab = mem;
694 memset(ab, 0, sizeof(*ab));
695 ab->type = CARM_MSG_MISC;
696 ab->subtype = MISC_ALLOC_MEM;
697 ab->handle = cpu_to_le32(TAG_ENCODE(idx));
699 ab->sg_type = SGT_32BIT;
700 ab->addr = cpu_to_le32(host->shm_dma + (PDC_SHM_SIZE >> 1));
701 ab->len = cpu_to_le32(PDC_SHM_SIZE >> 1);
702 ab->evt_pool = cpu_to_le32(host->shm_dma + (16 * 1024));
703 ab->n_evt = cpu_to_le32(1024);
704 ab->rbuf_pool = cpu_to_le32(host->shm_dma);
705 ab->n_rbuf = cpu_to_le32(RMSG_Q_LEN);
706 ab->msg_pool = cpu_to_le32(host->shm_dma + RBUF_LEN);
707 ab->n_msg = cpu_to_le32(CARM_Q_LEN);
708 ab->sg[0].start = cpu_to_le32(host->shm_dma + (PDC_SHM_SIZE >> 1));
709 ab->sg[0].len = cpu_to_le32(65536);
711 return sizeof(struct carm_msg_allocbuf);
714 static unsigned int carm_fill_scan_channels(struct carm_host *host,
715 unsigned int idx, void *mem)
717 struct carm_msg_ioctl *ioc = mem;
718 u32 msg_data = (u32) (carm_ref_msg_dma(host, idx) +
719 IOC_SCAN_CHAN_OFFSET);
721 memset(ioc, 0, sizeof(*ioc));
722 ioc->type = CARM_MSG_IOCTL;
723 ioc->subtype = CARM_IOC_SCAN_CHAN;
724 ioc->handle = cpu_to_le32(TAG_ENCODE(idx));
725 ioc->data_addr = cpu_to_le32(msg_data);
727 /* fill output data area with "no device" default values */
728 mem += IOC_SCAN_CHAN_OFFSET;
729 memset(mem, IOC_SCAN_CHAN_NODEV, CARM_MAX_PORTS);
731 return IOC_SCAN_CHAN_OFFSET + CARM_MAX_PORTS;
734 static unsigned int carm_fill_get_fw_ver(struct carm_host *host,
735 unsigned int idx, void *mem)
737 struct carm_msg_get_fw_ver *ioc = mem;
738 u32 msg_data = (u32) (carm_ref_msg_dma(host, idx) + sizeof(*ioc));
740 memset(ioc, 0, sizeof(*ioc));
741 ioc->type = CARM_MSG_MISC;
742 ioc->subtype = MISC_GET_FW_VER;
743 ioc->handle = cpu_to_le32(TAG_ENCODE(idx));
744 ioc->data_addr = cpu_to_le32(msg_data);
746 return sizeof(struct carm_msg_get_fw_ver) +
747 sizeof(struct carm_fw_ver);
750 static inline void carm_end_request_queued(struct carm_host *host,
751 struct carm_request *crq,
754 struct request *req = crq->rq;
757 rc = end_that_request_first(req, uptodate, req->hard_nr_sectors);
760 end_that_request_last(req);
762 rc = carm_put_request(host, crq);
766 static inline void carm_push_q (struct carm_host *host, request_queue_t *q)
768 unsigned int idx = host->wait_q_prod % CARM_MAX_WAIT_Q;
771 VPRINTK("STOPPED QUEUE %p\n", q);
773 host->wait_q[idx] = q;
775 BUG_ON(host->wait_q_prod == host->wait_q_cons); /* overrun */
778 static inline request_queue_t *carm_pop_q(struct carm_host *host)
782 if (host->wait_q_prod == host->wait_q_cons)
785 idx = host->wait_q_cons % CARM_MAX_WAIT_Q;
788 return host->wait_q[idx];
791 static inline void carm_round_robin(struct carm_host *host)
793 request_queue_t *q = carm_pop_q(host);
796 VPRINTK("STARTED QUEUE %p\n", q);
800 static inline void carm_end_rq(struct carm_host *host, struct carm_request *crq,
803 carm_end_request_queued(host, crq, is_ok);
805 carm_round_robin(host);
806 else if ((host->n_msgs <= CARM_MSG_LOW_WATER) &&
807 (host->hw_sg_used <= CARM_SG_LOW_WATER)) {
808 carm_round_robin(host);
812 static void carm_oob_rq_fn(request_queue_t *q)
814 struct carm_host *host = q->queuedata;
815 struct carm_request *crq;
820 DPRINTK("get req\n");
821 rq = elv_next_request(q);
825 blkdev_dequeue_request(rq);
829 assert(crq->rq == rq);
833 DPRINTK("send req\n");
834 rc = carm_send_msg(host, crq);
836 blk_requeue_request(q, rq);
837 carm_push_q(host, q);
838 return; /* call us again later, eventually */
843 static void carm_rq_fn(request_queue_t *q)
845 struct carm_port *port = q->queuedata;
846 struct carm_host *host = port->host;
847 struct carm_msg_rw *msg;
848 struct carm_request *crq;
850 struct scatterlist *sg;
851 int writing = 0, pci_dir, i, n_elem, rc;
853 unsigned int msg_size;
856 VPRINTK("get req\n");
857 rq = elv_next_request(q);
861 crq = carm_get_request(host);
863 carm_push_q(host, q);
864 return; /* call us again later, eventually */
868 blkdev_dequeue_request(rq);
870 if (rq_data_dir(rq) == WRITE) {
872 pci_dir = PCI_DMA_TODEVICE;
874 pci_dir = PCI_DMA_FROMDEVICE;
877 /* get scatterlist from block layer */
879 n_elem = blk_rq_map_sg(q, rq, sg);
881 carm_end_rq(host, crq, 0);
882 return; /* request with no s/g entries? */
885 /* map scatterlist to PCI bus addresses */
886 n_elem = pci_map_sg(host->pdev, sg, n_elem, pci_dir);
888 carm_end_rq(host, crq, 0);
889 return; /* request with no s/g entries? */
891 crq->n_elem = n_elem;
893 host->hw_sg_used += n_elem;
896 * build read/write message
899 VPRINTK("build msg\n");
900 msg = (struct carm_msg_rw *) carm_ref_msg(host, crq->tag);
903 msg->type = CARM_MSG_WRITE;
904 crq->msg_type = CARM_MSG_WRITE;
906 msg->type = CARM_MSG_READ;
907 crq->msg_type = CARM_MSG_READ;
910 msg->id = port->port_no;
911 msg->sg_count = n_elem;
912 msg->sg_type = SGT_32BIT;
913 msg->handle = cpu_to_le32(TAG_ENCODE(crq->tag));
914 msg->lba = cpu_to_le32(rq->sector & 0xffffffff);
915 tmp = (rq->sector >> 16) >> 16;
916 msg->lba_high = cpu_to_le16( (u16) tmp );
917 msg->lba_count = cpu_to_le16(rq->nr_sectors);
919 msg_size = sizeof(struct carm_msg_rw) - sizeof(msg->sg);
920 for (i = 0; i < n_elem; i++) {
921 struct carm_msg_sg *carm_sg = &msg->sg[i];
922 carm_sg->start = cpu_to_le32(sg_dma_address(&crq->sg[i]));
923 carm_sg->len = cpu_to_le32(sg_dma_len(&crq->sg[i]));
924 msg_size += sizeof(struct carm_msg_sg);
927 rc = carm_lookup_bucket(msg_size);
929 crq->msg_bucket = (u32) rc;
932 * queue read/write message to hardware
935 VPRINTK("send msg, tag == %u\n", crq->tag);
936 rc = carm_send_msg(host, crq);
938 carm_put_request(host, crq);
939 blk_requeue_request(q, rq);
940 carm_push_q(host, q);
941 return; /* call us again later, eventually */
944 goto queue_one_request;
947 static void carm_handle_array_info(struct carm_host *host,
948 struct carm_request *crq, u8 *mem,
951 struct carm_port *port;
952 u8 *msg_data = mem + sizeof(struct carm_array_info);
953 struct carm_array_info *desc = (struct carm_array_info *) msg_data;
960 carm_end_rq(host, crq, is_ok);
964 if (le32_to_cpu(desc->array_status) & ARRAY_NO_EXIST)
967 cur_port = host->cur_scan_dev;
969 /* should never occur */
970 if ((cur_port < 0) || (cur_port >= CARM_MAX_PORTS)) {
971 printk(KERN_ERR PFX "BUG: cur_scan_dev==%d, array_id==%d\n",
972 cur_port, (int) desc->array_id);
976 port = &host->port[cur_port];
978 lo = (u64) le32_to_cpu(desc->size);
979 hi = (u64) le32_to_cpu(desc->size_hi);
981 port->capacity = lo | (hi << 32);
982 port->dev_geom_head = le16_to_cpu(desc->head);
983 port->dev_geom_sect = le16_to_cpu(desc->sect);
984 port->dev_geom_cyl = le16_to_cpu(desc->cyl);
986 host->dev_active |= (1 << cur_port);
988 strncpy(port->name, desc->name, sizeof(port->name));
989 port->name[sizeof(port->name) - 1] = 0;
990 slen = strlen(port->name);
991 while (slen && (port->name[slen - 1] == ' ')) {
992 port->name[slen - 1] = 0;
996 printk(KERN_INFO DRV_NAME "(%s): port %u device %Lu sectors\n",
997 pci_name(host->pdev), port->port_no,
998 (unsigned long long) port->capacity);
999 printk(KERN_INFO DRV_NAME "(%s): port %u device \"%s\"\n",
1000 pci_name(host->pdev), port->port_no, port->name);
1003 assert(host->state == HST_DEV_SCAN);
1004 schedule_work(&host->fsm_task);
1007 static void carm_handle_scan_chan(struct carm_host *host,
1008 struct carm_request *crq, u8 *mem,
1011 u8 *msg_data = mem + IOC_SCAN_CHAN_OFFSET;
1012 unsigned int i, dev_count = 0;
1013 int new_state = HST_DEV_SCAN_START;
1017 carm_end_rq(host, crq, is_ok);
1020 new_state = HST_ERROR;
1024 /* TODO: scan and support non-disk devices */
1025 for (i = 0; i < 8; i++)
1026 if (msg_data[i] == 0) { /* direct-access device (disk) */
1027 host->dev_present |= (1 << i);
1031 printk(KERN_INFO DRV_NAME "(%s): found %u interesting devices\n",
1032 pci_name(host->pdev), dev_count);
1035 assert(host->state == HST_PORT_SCAN);
1036 host->state = new_state;
1037 schedule_work(&host->fsm_task);
1040 static void carm_handle_generic(struct carm_host *host,
1041 struct carm_request *crq, int is_ok,
1042 int cur_state, int next_state)
1046 carm_end_rq(host, crq, is_ok);
1048 assert(host->state == cur_state);
1050 host->state = next_state;
1052 host->state = HST_ERROR;
1053 schedule_work(&host->fsm_task);
1056 static inline void carm_handle_rw(struct carm_host *host,
1057 struct carm_request *crq, int is_ok)
1063 if (rq_data_dir(crq->rq) == WRITE)
1064 pci_dir = PCI_DMA_TODEVICE;
1066 pci_dir = PCI_DMA_FROMDEVICE;
1068 pci_unmap_sg(host->pdev, &crq->sg[0], crq->n_elem, pci_dir);
1070 carm_end_rq(host, crq, is_ok);
1073 static inline void carm_handle_resp(struct carm_host *host,
1074 u32 ret_handle_le, u32 status)
1076 u32 handle = le32_to_cpu(ret_handle_le);
1077 unsigned int msg_idx;
1078 struct carm_request *crq;
1079 int is_ok = (status == RMSG_OK);
1082 VPRINTK("ENTER, handle == 0x%x\n", handle);
1084 if (unlikely(!TAG_VALID(handle))) {
1085 printk(KERN_ERR DRV_NAME "(%s): BUG: invalid tag 0x%x\n",
1086 pci_name(host->pdev), handle);
1090 msg_idx = TAG_DECODE(handle);
1091 VPRINTK("tag == %u\n", msg_idx);
1093 crq = &host->req[msg_idx];
1096 if (likely(crq->msg_type == CARM_MSG_READ ||
1097 crq->msg_type == CARM_MSG_WRITE)) {
1098 carm_handle_rw(host, crq, is_ok);
1102 mem = carm_ref_msg(host, msg_idx);
1104 switch (crq->msg_type) {
1105 case CARM_MSG_IOCTL: {
1106 switch (crq->msg_subtype) {
1107 case CARM_IOC_SCAN_CHAN:
1108 carm_handle_scan_chan(host, crq, mem, is_ok);
1111 /* unknown / invalid response */
1117 case CARM_MSG_MISC: {
1118 switch (crq->msg_subtype) {
1119 case MISC_ALLOC_MEM:
1120 carm_handle_generic(host, crq, is_ok,
1121 HST_ALLOC_BUF, HST_SYNC_TIME);
1124 carm_handle_generic(host, crq, is_ok,
1125 HST_SYNC_TIME, HST_GET_FW_VER);
1127 case MISC_GET_FW_VER: {
1128 struct carm_fw_ver *ver = (struct carm_fw_ver *)
1129 mem + sizeof(struct carm_msg_get_fw_ver);
1131 host->fw_ver = le32_to_cpu(ver->version);
1132 host->flags |= (ver->features & FL_FW_VER_MASK);
1134 carm_handle_generic(host, crq, is_ok,
1135 HST_GET_FW_VER, HST_PORT_SCAN);
1139 /* unknown / invalid response */
1145 case CARM_MSG_ARRAY: {
1146 switch (crq->msg_subtype) {
1147 case CARM_ARRAY_INFO:
1148 carm_handle_array_info(host, crq, mem, is_ok);
1151 /* unknown / invalid response */
1158 /* unknown / invalid response */
1165 printk(KERN_WARNING DRV_NAME "(%s): BUG: unhandled message type %d/%d\n",
1166 pci_name(host->pdev), crq->msg_type, crq->msg_subtype);
1167 carm_end_rq(host, crq, 0);
1170 static inline void carm_handle_responses(struct carm_host *host)
1172 void *mmio = host->mmio;
1173 struct carm_response *resp = (struct carm_response *) host->shm;
1174 unsigned int work = 0;
1175 unsigned int idx = host->resp_idx % RMSG_Q_LEN;
1178 u32 status = le32_to_cpu(resp[idx].status);
1180 if (status == 0xffffffff) {
1181 VPRINTK("ending response on index %u\n", idx);
1182 writel(idx << 3, mmio + CARM_RESP_IDX);
1186 /* response to a message we sent */
1187 else if ((status & (1 << 31)) == 0) {
1188 VPRINTK("handling msg response on index %u\n", idx);
1189 carm_handle_resp(host, resp[idx].ret_handle, status);
1190 resp[idx].status = 0xffffffff;
1193 /* asynchronous events the hardware throws our way */
1194 else if ((status & 0xff000000) == (1 << 31)) {
1195 u8 *evt_type_ptr = (u8 *) &resp[idx];
1196 u8 evt_type = *evt_type_ptr;
1197 printk(KERN_WARNING DRV_NAME "(%s): unhandled event type %d\n",
1198 pci_name(host->pdev), (int) evt_type);
1199 resp[idx].status = 0xffffffff;
1202 idx = NEXT_RESP(idx);
1206 VPRINTK("EXIT, work==%u\n", work);
1207 host->resp_idx += work;
1210 static irqreturn_t carm_interrupt(int irq, void *__host, struct pt_regs *regs)
1212 struct carm_host *host = __host;
1216 unsigned long flags;
1219 VPRINTK("no host\n");
1223 spin_lock_irqsave(&host->lock, flags);
1227 /* reading should also clear interrupts */
1228 mask = readl(mmio + CARM_INT_STAT);
1230 if (mask == 0 || mask == 0xffffffff) {
1231 VPRINTK("no work, mask == 0x%x\n", mask);
1235 if (mask & INT_ACK_MASK)
1236 writel(mask, mmio + CARM_INT_STAT);
1238 if (unlikely(host->state == HST_INVALID)) {
1239 VPRINTK("not initialized yet, mask = 0x%x\n", mask);
1243 if (mask & CARM_HAVE_RESP) {
1245 carm_handle_responses(host);
1249 spin_unlock_irqrestore(&host->lock, flags);
1251 return IRQ_RETVAL(handled);
1254 static void carm_fsm_task (void *_data)
1256 struct carm_host *host = _data;
1257 unsigned long flags;
1259 int rc, i, next_dev;
1261 int new_state = HST_INVALID;
1263 spin_lock_irqsave(&host->lock, flags);
1264 state = host->state;
1265 spin_unlock_irqrestore(&host->lock, flags);
1267 DPRINTK("ENTER, state == %s\n", state_name[state]);
1270 case HST_PROBE_START:
1271 new_state = HST_ALLOC_BUF;
1276 rc = carm_send_special(host, carm_fill_alloc_buf);
1278 new_state = HST_ERROR;
1284 rc = carm_send_special(host, carm_fill_sync_time);
1286 new_state = HST_ERROR;
1291 case HST_GET_FW_VER:
1292 rc = carm_send_special(host, carm_fill_get_fw_ver);
1294 new_state = HST_ERROR;
1300 rc = carm_send_special(host, carm_fill_scan_channels);
1302 new_state = HST_ERROR;
1307 case HST_DEV_SCAN_START:
1308 host->cur_scan_dev = -1;
1309 new_state = HST_DEV_SCAN;
1315 for (i = host->cur_scan_dev + 1; i < CARM_MAX_PORTS; i++)
1316 if (host->dev_present & (1 << i)) {
1321 if (next_dev >= 0) {
1322 host->cur_scan_dev = next_dev;
1323 rc = carm_array_info(host, next_dev);
1325 new_state = HST_ERROR;
1329 new_state = HST_DEV_ACTIVATE;
1334 case HST_DEV_ACTIVATE: {
1336 for (i = 0; i < CARM_MAX_PORTS; i++)
1337 if (host->dev_active & (1 << i)) {
1338 struct carm_port *port = &host->port[i];
1339 struct gendisk *disk = port->disk;
1341 set_capacity(disk, port->capacity);
1346 printk(KERN_INFO DRV_NAME "(%s): %d ports activated\n",
1347 pci_name(host->pdev), activated);
1349 new_state = HST_PROBE_FINISHED;
1354 case HST_PROBE_FINISHED:
1355 up(&host->probe_sem);
1363 /* should never occur */
1364 printk(KERN_ERR PFX "BUG: unknown state %d\n", state);
1369 if (new_state != HST_INVALID) {
1370 spin_lock_irqsave(&host->lock, flags);
1371 host->state = new_state;
1372 spin_unlock_irqrestore(&host->lock, flags);
1375 schedule_work(&host->fsm_task);
1378 static int carm_init_wait(void *mmio, u32 bits, unsigned int test_bit)
1382 for (i = 0; i < 50000; i++) {
1383 u32 tmp = readl(mmio + CARM_LMUC);
1387 if ((tmp & bits) == bits)
1390 if ((tmp & bits) == 0)
1397 printk(KERN_ERR PFX "carm_init_wait timeout, bits == 0x%x, test_bit == %s\n",
1398 bits, test_bit ? "yes" : "no");
1402 static void carm_init_responses(struct carm_host *host)
1404 void *mmio = host->mmio;
1406 struct carm_response *resp = (struct carm_response *) host->shm;
1408 for (i = 0; i < RMSG_Q_LEN; i++)
1409 resp[i].status = 0xffffffff;
1411 writel(0, mmio + CARM_RESP_IDX);
1414 static int carm_init_host(struct carm_host *host)
1416 void *mmio = host->mmio;
1423 writel(0, mmio + CARM_INT_MASK);
1425 tmp8 = readb(mmio + CARM_INITC);
1428 writeb(tmp8, CARM_INITC);
1429 readb(mmio + CARM_INITC); /* flush */
1431 DPRINTK("snooze...\n");
1435 tmp = readl(mmio + CARM_HMUC);
1436 if (tmp & CARM_CME) {
1437 DPRINTK("CME bit present, waiting\n");
1438 rc = carm_init_wait(mmio, CARM_CME, 1);
1440 DPRINTK("EXIT, carm_init_wait 1 failed\n");
1444 if (tmp & CARM_RME) {
1445 DPRINTK("RME bit present, waiting\n");
1446 rc = carm_init_wait(mmio, CARM_RME, 1);
1448 DPRINTK("EXIT, carm_init_wait 2 failed\n");
1453 tmp &= ~(CARM_RME | CARM_CME);
1454 writel(tmp, mmio + CARM_HMUC);
1455 readl(mmio + CARM_HMUC); /* flush */
1457 rc = carm_init_wait(mmio, CARM_RME | CARM_CME, 0);
1459 DPRINTK("EXIT, carm_init_wait 3 failed\n");
1463 carm_init_buckets(mmio);
1465 writel(host->shm_dma & 0xffffffff, mmio + RBUF_ADDR_LO);
1466 writel((host->shm_dma >> 16) >> 16, mmio + RBUF_ADDR_HI);
1467 writel(RBUF_LEN, mmio + RBUF_BYTE_SZ);
1469 tmp = readl(mmio + CARM_HMUC);
1470 tmp |= (CARM_RME | CARM_CME | CARM_WZBC);
1471 writel(tmp, mmio + CARM_HMUC);
1472 readl(mmio + CARM_HMUC); /* flush */
1474 rc = carm_init_wait(mmio, CARM_RME | CARM_CME, 1);
1476 DPRINTK("EXIT, carm_init_wait 4 failed\n");
1480 writel(0, mmio + CARM_HMPHA);
1481 writel(INT_DEF_MASK, mmio + CARM_INT_MASK);
1483 carm_init_responses(host);
1485 /* start initialization, probing state machine */
1486 spin_lock_irq(&host->lock);
1487 assert(host->state == HST_INVALID);
1488 host->state = HST_PROBE_START;
1489 spin_unlock_irq(&host->lock);
1490 schedule_work(&host->fsm_task);
1496 static int carm_init_disks(struct carm_host *host)
1501 for (i = 0; i < CARM_MAX_PORTS; i++) {
1502 struct gendisk *disk;
1504 struct carm_port *port;
1506 port = &host->port[i];
1510 disk = alloc_disk(CARM_MINORS_PER_MAJOR);
1517 sprintf(disk->disk_name, DRV_NAME "%u_%u", host->id, i);
1518 sprintf(disk->devfs_name, DRV_NAME "/%u_%u", host->id, i);
1519 disk->major = host->major;
1520 disk->first_minor = i * CARM_MINORS_PER_MAJOR;
1521 disk->fops = &carm_bd_ops;
1522 disk->private_data = port;
1524 q = blk_init_queue(carm_rq_fn, &host->lock);
1530 blk_queue_max_hw_segments(q, CARM_MAX_REQ_SG);
1531 blk_queue_max_phys_segments(q, CARM_MAX_REQ_SG);
1532 blk_queue_segment_boundary(q, CARM_SG_BOUNDARY);
1534 q->queuedata = port;
1540 static void carm_free_disks(struct carm_host *host)
1544 for (i = 0; i < CARM_MAX_PORTS; i++) {
1545 struct gendisk *disk = host->port[i].disk;
1547 request_queue_t *q = disk->queue;
1549 if (disk->flags & GENHD_FL_UP)
1552 blk_cleanup_queue(q);
1558 static int carm_init_shm(struct carm_host *host)
1560 host->shm = pci_alloc_consistent(host->pdev, CARM_SHM_SIZE,
1565 host->msg_base = host->shm + RBUF_LEN;
1566 host->msg_dma = host->shm_dma + RBUF_LEN;
1568 memset(host->shm, 0xff, RBUF_LEN);
1569 memset(host->msg_base, 0, PDC_SHM_SIZE - RBUF_LEN);
1574 static int carm_init_one (struct pci_dev *pdev, const struct pci_device_id *ent)
1576 static unsigned int printed_version;
1577 struct carm_host *host;
1578 unsigned int pci_dac;
1583 if (!printed_version++)
1584 printk(KERN_DEBUG DRV_NAME " version " DRV_VERSION "\n");
1586 rc = pci_enable_device(pdev);
1590 rc = pci_request_regions(pdev, DRV_NAME);
1594 #if IF_64BIT_DMA_IS_POSSIBLE /* grrrr... */
1595 rc = pci_set_dma_mask(pdev, 0xffffffffffffffffULL);
1597 rc = pci_set_consistent_dma_mask(pdev, 0xffffffffffffffffULL);
1599 printk(KERN_ERR DRV_NAME "(%s): consistent DMA mask failure\n",
1601 goto err_out_regions;
1606 rc = pci_set_dma_mask(pdev, 0xffffffffULL);
1608 printk(KERN_ERR DRV_NAME "(%s): DMA mask failure\n",
1610 goto err_out_regions;
1613 #if IF_64BIT_DMA_IS_POSSIBLE /* grrrr... */
1617 host = kmalloc(sizeof(*host), GFP_KERNEL);
1619 printk(KERN_ERR DRV_NAME "(%s): memory alloc failure\n",
1622 goto err_out_regions;
1625 memset(host, 0, sizeof(*host));
1627 host->flags = pci_dac ? FL_DAC : 0;
1628 spin_lock_init(&host->lock);
1629 INIT_WORK(&host->fsm_task, carm_fsm_task, host);
1630 init_MUTEX_LOCKED(&host->probe_sem);
1632 for (i = 0; i < ARRAY_SIZE(host->req); i++)
1633 host->req[i].tag = i;
1635 host->mmio = ioremap(pci_resource_start(pdev, 0),
1636 pci_resource_len(pdev, 0));
1638 printk(KERN_ERR DRV_NAME "(%s): MMIO alloc failure\n",
1644 rc = carm_init_shm(host);
1646 printk(KERN_ERR DRV_NAME "(%s): DMA SHM alloc failure\n",
1648 goto err_out_iounmap;
1651 q = blk_init_queue(carm_oob_rq_fn, &host->lock);
1653 printk(KERN_ERR DRV_NAME "(%s): OOB queue alloc failure\n",
1656 goto err_out_pci_free;
1659 q->queuedata = host;
1662 * Figure out which major to use: 160, 161, or dynamic
1664 if (!test_and_set_bit(0, &carm_major_alloc))
1666 else if (!test_and_set_bit(1, &carm_major_alloc))
1669 host->flags |= FL_DYN_MAJOR;
1671 host->id = carm_host_id;
1672 sprintf(host->name, DRV_NAME "%d", carm_host_id);
1674 rc = register_blkdev(host->major, host->name);
1676 goto err_out_free_majors;
1677 if (host->flags & FL_DYN_MAJOR)
1680 devfs_mk_dir(DRV_NAME);
1682 rc = carm_init_disks(host);
1684 goto err_out_blkdev_disks;
1686 pci_set_master(pdev);
1688 rc = request_irq(pdev->irq, carm_interrupt, SA_SHIRQ, DRV_NAME, host);
1690 printk(KERN_ERR DRV_NAME "(%s): irq alloc failure\n",
1692 goto err_out_blkdev_disks;
1695 rc = carm_init_host(host);
1697 goto err_out_free_irq;
1699 DPRINTK("waiting for probe_sem\n");
1700 down(&host->probe_sem);
1702 printk(KERN_INFO "%s: pci %s, ports %d, io %lx, irq %u, major %d\n",
1703 host->name, pci_name(pdev), (int) CARM_MAX_PORTS,
1704 pci_resource_start(pdev, 0), pdev->irq, host->major);
1707 pci_set_drvdata(pdev, host);
1711 free_irq(pdev->irq, host);
1712 err_out_blkdev_disks:
1713 carm_free_disks(host);
1714 unregister_blkdev(host->major, host->name);
1715 err_out_free_majors:
1716 if (host->major == 160)
1717 clear_bit(0, &carm_major_alloc);
1718 else if (host->major == 161)
1719 clear_bit(1, &carm_major_alloc);
1720 blk_cleanup_queue(host->oob_q);
1722 pci_free_consistent(pdev, CARM_SHM_SIZE, host->shm, host->shm_dma);
1724 iounmap(host->mmio);
1728 pci_release_regions(pdev);
1730 pci_disable_device(pdev);
1734 static void carm_remove_one (struct pci_dev *pdev)
1736 struct carm_host *host = pci_get_drvdata(pdev);
1739 printk(KERN_ERR PFX "BUG: no host data for PCI(%s)\n",
1744 free_irq(pdev->irq, host);
1745 carm_free_disks(host);
1746 devfs_remove(DRV_NAME);
1747 unregister_blkdev(host->major, host->name);
1748 if (host->major == 160)
1749 clear_bit(0, &carm_major_alloc);
1750 else if (host->major == 161)
1751 clear_bit(1, &carm_major_alloc);
1752 blk_cleanup_queue(host->oob_q);
1753 pci_free_consistent(pdev, CARM_SHM_SIZE, host->shm, host->shm_dma);
1754 iounmap(host->mmio);
1756 pci_release_regions(pdev);
1757 pci_disable_device(pdev);
1758 pci_set_drvdata(pdev, NULL);
1761 static int __init carm_init(void)
1763 return pci_module_init(&carm_driver);
1766 static void __exit carm_exit(void)
1768 pci_unregister_driver(&carm_driver);
1771 module_init(carm_init);
1772 module_exit(carm_exit);