drivers/block/cpqarray.c

   1 /*
   2  *    Disk Array driver for Compaq SMART2 Controllers
   3  *    Copyright 1998 Compaq Computer Corporation
   4  *
   5  *    This program is free software; you can redistribute it and/or modify
   6  *    it under the terms of the GNU General Public License as published by
   7  *    the Free Software Foundation; either version 2 of the License, or
   8  *    (at your option) any later version.
   9  *
  10  *    This program is distributed in the hope that it will be useful,
  11  *    but WITHOUT ANY WARRANTY; without even the implied warranty of
  12  *    MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or
  13  *    NON INFRINGEMENT.  See the GNU General Public License for more details.
  14  *
  15  *    You should have received a copy of the GNU General Public License
  16  *    along with this program; if not, write to the Free Software
  17  *    Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  18  *
  19  *    Questions/Comments/Bugfixes to Cpqarray-discuss@lists.sourceforge.net
  20  *
  21  */
  22 #include <linux/config.h>       /* CONFIG_PROC_FS */
  23 #include <linux/module.h>
  24 #include <linux/types.h>
  25 #include <linux/pci.h>
  26 #include <linux/bio.h>
  27 #include <linux/interrupt.h>
  28 #include <linux/kernel.h>
  29 #include <linux/slab.h>
  30 #include <linux/delay.h>
  31 #include <linux/major.h>
  32 #include <linux/fs.h>
  33 #include <linux/blkpg.h>
  34 #include <linux/timer.h>
  35 #include <linux/proc_fs.h>
  36 #include <linux/devfs_fs_kernel.h>
  37 #include <linux/init.h>
  38 #include <linux/hdreg.h>
  39 #include <linux/spinlock.h>
  40 #include <linux/blkdev.h>
  41 #include <linux/genhd.h>
  42 #include <asm/uaccess.h>
  43 #include <asm/io.h>
  44
  45
  46 #define SMART2_DRIVER_VERSION(maj,min,submin) ((maj<<16)|(min<<8)|(submin))
  47
  48 #define DRIVER_NAME "Compaq SMART2 Driver (v 2.6.0)"
  49 #define DRIVER_VERSION SMART2_DRIVER_VERSION(2,6,0)
  50
  51 /* Embedded module documentation macros - see modules.h */
  52 /* Original author Chris Frantz - Compaq Computer Corporation */
  53 MODULE_AUTHOR("Compaq Computer Corporation");
  54 MODULE_DESCRIPTION("Driver for Compaq Smart2 Array Controllers version 2.6.0");
  55 MODULE_VERSION("2.6.0");
  56 MODULE_LICENSE("GPL");
  57
  58 #include "cpqarray.h"
  59 #include "ida_cmd.h"
  60 #include "smart1,2.h"
  61 #include "ida_ioctl.h"
  62
  63 #define READ_AHEAD      128
  64 #define NR_CMDS         128 /* This could probably go as high as ~400 */
  65
  66 #define MAX_CTLR        8
  67 #define CTLR_SHIFT      8
  68
  69 #define CPQARRAY_DMA_MASK       0xFFFFFFFF      /* 32 bit DMA */
  70
  71 static int nr_ctlr;
  72 static ctlr_info_t *hba[MAX_CTLR];
  73
  74 static int eisa[8];
  75
  76 #define NR_PRODUCTS (sizeof(products)/sizeof(struct board_type))
  77
  78 /*  board_id = Subsystem Device ID & Vendor ID
  79  *  product = Marketing Name for the board
  80  *  access = Address of the struct of function pointers
  81  */
  82 static struct board_type products[] = {
  83         { 0x0040110E, "IDA",                    &smart1_access },
  84         { 0x0140110E, "IDA-2",                  &smart1_access },
  85         { 0x1040110E, "IAES",                   &smart1_access },
  86         { 0x2040110E, "SMART",                  &smart1_access },
  87         { 0x3040110E, "SMART-2/E",              &smart2e_access },
  88         { 0x40300E11, "SMART-2/P",              &smart2_access },
  89         { 0x40310E11, "SMART-2SL",              &smart2_access },
  90         { 0x40320E11, "Smart Array 3200",       &smart2_access },
  91         { 0x40330E11, "Smart Array 3100ES",     &smart2_access },
  92         { 0x40340E11, "Smart Array 221",        &smart2_access },
  93         { 0x40400E11, "Integrated Array",       &smart4_access },
  94         { 0x40480E11, "Compaq Raid LC2",        &smart4_access },
  95         { 0x40500E11, "Smart Array 4200",       &smart4_access },
  96         { 0x40510E11, "Smart Array 4250ES",     &smart4_access },
  97         { 0x40580E11, "Smart Array 431",        &smart4_access },
  98 };
  99
 100 /* define the PCI info for the PCI cards this driver can control */
 101 const struct pci_device_id cpqarray_pci_device_id[] =
 102 {
 103         { PCI_VENDOR_ID_DEC, PCI_DEVICE_ID_COMPAQ_42XX,
 104                 0x0E11, 0x4058, 0, 0, 0},       /* SA431 */
 105         { PCI_VENDOR_ID_DEC, PCI_DEVICE_ID_COMPAQ_42XX,
 106                 0x0E11, 0x4051, 0, 0, 0},      /* SA4250ES */
 107         { PCI_VENDOR_ID_DEC, PCI_DEVICE_ID_COMPAQ_42XX,
 108                 0x0E11, 0x4050, 0, 0, 0},      /* SA4200 */
 109         { PCI_VENDOR_ID_NCR, PCI_DEVICE_ID_NCR_53C1510,
 110                 0x0E11, 0x4048, 0, 0, 0},       /* LC2 */
 111         { PCI_VENDOR_ID_NCR, PCI_DEVICE_ID_NCR_53C1510,
 112                 0x0E11, 0x4040, 0, 0, 0},      /* Integrated Array */
 113         { PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_SMART2P,
 114                 0x0E11, 0x4034, 0, 0, 0},       /* SA 221 */
 115         { PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_SMART2P,
 116                 0x0E11, 0x4033, 0, 0, 0},       /* SA 3100ES*/
 117         { PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_SMART2P,
 118                 0x0E11, 0x4032, 0, 0, 0},       /* SA 3200*/
 119         { PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_SMART2P,
 120                 0x0E11, 0x4031, 0, 0, 0},       /* SA 2SL*/
 121         { PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_SMART2P,
 122                 0x0E11, 0x4030, 0, 0, 0},       /* SA 2P */
 123         { 0 }
 124 };
 125
 126 MODULE_DEVICE_TABLE(pci, cpqarray_pci_device_id);
 127
 128 static struct gendisk *ida_gendisk[MAX_CTLR][NWD];
 129
 130 /* Debug... */
 131 #define DBG(s)  do { s } while(0)
 132 /* Debug (general info)... */
 133 #define DBGINFO(s) do { } while(0)
 134 /* Debug Paranoid... */
 135 #define DBGP(s)  do { } while(0)
 136 /* Debug Extra Paranoid... */
 137 #define DBGPX(s) do { } while(0)
 138
 139 int cpqarray_init_step2(void);
 140 static int cpqarray_pci_init(ctlr_info_t *c, struct pci_dev *pdev);
 141 static void __iomem *remap_pci_mem(ulong base, ulong size);
 142 static int cpqarray_eisa_detect(void);
 143 static int pollcomplete(int ctlr);
 144 static void getgeometry(int ctlr);
 145 static void start_fwbk(int ctlr);
 146
 147 static cmdlist_t * cmd_alloc(ctlr_info_t *h, int get_from_pool);
 148 static void cmd_free(ctlr_info_t *h, cmdlist_t *c, int got_from_pool);
 149
 150 static void free_hba(int i);
 151 static int alloc_cpqarray_hba(void);
 152
 153 static int sendcmd(
 154         __u8    cmd,
 155         int     ctlr,
 156         void    *buff,
 157         size_t  size,
 158         unsigned int blk,
 159         unsigned int blkcnt,
 160         unsigned int log_unit );
 161
 162 static int ida_open(struct inode *inode, struct file *filep);
 163 static int ida_release(struct inode *inode, struct file *filep);
 164 static int ida_ioctl(struct inode *inode, struct file *filep, unsigned int cmd, unsigned long arg);
 165 static int ida_ctlr_ioctl(ctlr_info_t *h, int dsk, ida_ioctl_t *io);
 166
 167 static void do_ida_request(request_queue_t *q);
 168 static void start_io(ctlr_info_t *h);
 169
 170 static inline void addQ(cmdlist_t **Qptr, cmdlist_t *c);
 171 static inline cmdlist_t *removeQ(cmdlist_t **Qptr, cmdlist_t *c);
 172 static inline void complete_buffers(struct bio *bio, int ok);
 173 static inline void complete_command(cmdlist_t *cmd, int timeout);
 174
 175 static irqreturn_t do_ida_intr(int irq, void *dev_id, struct pt_regs * regs);
 176 static void ida_timer(unsigned long tdata);
 177 static int ida_revalidate(struct gendisk *disk);
 178 static int revalidate_allvol(ctlr_info_t *host);
 179 static int cpqarray_register_ctlr(int ctlr, struct pci_dev *pdev);
 180
 181 #ifdef CONFIG_PROC_FS
 182 static void ida_procinit(int i);
 183 static int ida_proc_get_info(char *buffer, char **start, off_t offset, int length, int *eof, void *data);
 184 #else
 185 static void ida_procinit(int i) {}
 186 #endif
 187
 188 static inline drv_info_t *get_drv(struct gendisk *disk)
 189 {
 190         return disk->private_data;
 191 }
 192
 193 static inline ctlr_info_t *get_host(struct gendisk *disk)
 194 {
 195         return disk->queue->queuedata;
 196 }
 197
 198
 199 static struct block_device_operations ida_fops  = {
 200         .owner          = THIS_MODULE,
 201         .open           = ida_open,
 202         .release        = ida_release,
 203         .ioctl          = ida_ioctl,
 204         .revalidate_disk= ida_revalidate,
 205 };
 206
 207
 208 #ifdef CONFIG_PROC_FS
 209
 210 static struct proc_dir_entry *proc_array;
 211
 212 /*
 213  * Get us a file in /proc/array that says something about each controller.
 214  * Create /proc/array if it doesn't exist yet.
 215  */
 216 static void __init ida_procinit(int i)
 217 {
 218         if (proc_array == NULL) {
 219                 proc_array = proc_mkdir("cpqarray", proc_root_driver);
 220                 if (!proc_array) return;
 221         }
 222
 223         create_proc_read_entry(hba[i]->devname, 0, proc_array,
 224                                ida_proc_get_info, hba[i]);
 225 }
 226
 227 /*
 228  * Report information about this controller.
 229  */
 230 static int ida_proc_get_info(char *buffer, char **start, off_t offset, int length, int *eof, void *data)
 231 {
 232         off_t pos = 0;
 233         off_t len = 0;
 234         int size, i, ctlr;
 235         ctlr_info_t *h = (ctlr_info_t*)data;
 236         drv_info_t *drv;
 237 #ifdef CPQ_PROC_PRINT_QUEUES
 238         cmdlist_t *c;
 239         unsigned long flags;
 240 #endif
 241
 242         ctlr = h->ctlr;
 243         size = sprintf(buffer, "%s:  Compaq %s Controller\n"
 244                 "       Board ID: 0x%08lx\n"
 245                 "       Firmware Revision: %c%c%c%c\n"
 246                 "       Controller Sig: 0x%08lx\n"
 247                 "       Memory Address: 0x%08lx\n"
 248                 "       I/O Port: 0x%04x\n"
 249                 "       IRQ: %d\n"
 250                 "       Logical drives: %d\n"
 251                 "       Physical drives: %d\n\n"
 252                 "       Current Q depth: %d\n"
 253                 "       Max Q depth since init: %d\n\n",
 254                 h->devname,
 255                 h->product_name,
 256                 (unsigned long)h->board_id,
 257                 h->firm_rev[0], h->firm_rev[1], h->firm_rev[2], h->firm_rev[3],
 258                 (unsigned long)h->ctlr_sig, (unsigned long)h->vaddr,
 259                 (unsigned int) h->io_mem_addr, (unsigned int)h->intr,
 260                 h->log_drives, h->phys_drives,
 261                 h->Qdepth, h->maxQsinceinit);
 262
 263         pos += size; len += size;
 264
 265         size = sprintf(buffer+len, "Logical Drive Info:\n");
 266         pos += size; len += size;
 267
 268         for(i=0; i<h->log_drives; i++) {
 269                 drv = &h->drv[i];
 270                 size = sprintf(buffer+len, "ida/c%dd%d: blksz=%d nr_blks=%d\n",
 271                                 ctlr, i, drv->blk_size, drv->nr_blks);
 272                 pos += size; len += size;
 273         }
 274
 275 #ifdef CPQ_PROC_PRINT_QUEUES
 276         spin_lock_irqsave(IDA_LOCK(h->ctlr), flags);
 277         size = sprintf(buffer+len, "\nCurrent Queues:\n");
 278         pos += size; len += size;
 279
 280         c = h->reqQ;
 281         size = sprintf(buffer+len, "reqQ = %p", c); pos += size; len += size;
 282         if (c) c=c->next;
 283         while(c && c != h->reqQ) {
 284                 size = sprintf(buffer+len, "->%p", c);
 285                 pos += size; len += size;
 286                 c=c->next;
 287         }
 288
 289         c = h->cmpQ;
 290         size = sprintf(buffer+len, "\ncmpQ = %p", c); pos += size; len += size;
 291         if (c) c=c->next;
 292         while(c && c != h->cmpQ) {
 293                 size = sprintf(buffer+len, "->%p", c);
 294                 pos += size; len += size;
 295                 c=c->next;
 296         }
 297
 298         size = sprintf(buffer+len, "\n"); pos += size; len += size;
 299         spin_unlock_irqrestore(IDA_LOCK(h->ctlr), flags);
 300 #endif
 301         size = sprintf(buffer+len, "nr_allocs = %d\nnr_frees = %d\n",
 302                         h->nr_allocs, h->nr_frees);
 303         pos += size; len += size;
 304
 305         *eof = 1;
 306         *start = buffer+offset;
 307         len -= offset;
 308         if (len>length)
 309                 len = length;
 310         return len;
 311 }
 312 #endif /* CONFIG_PROC_FS */
 313
 314 MODULE_PARM(eisa, "1-8i");
 315
 316 /* This is a bit of a hack,
 317  * necessary to support both eisa and pci
 318  */
 319 int __init cpqarray_init(void)
 320 {
 321         return (cpqarray_init_step2());
 322 }
 323
 324 static void release_io_mem(ctlr_info_t *c)
 325 {
 326         /* if IO mem was not protected do nothing */
 327         if( c->io_mem_addr == 0)
 328                 return;
 329         release_region(c->io_mem_addr, c->io_mem_length);
 330         c->io_mem_addr = 0;
 331         c->io_mem_length = 0;
 332 }
 333
 334 static void __devexit cpqarray_remove_one(int i)
 335 {
 336         int j;
 337         char buff[4];
 338
 339         /* sendcmd will turn off interrupt, and send the flush...
 340          * To write all data in the battery backed cache to disks
 341          * no data returned, but don't want to send NULL to sendcmd */
 342         if( sendcmd(FLUSH_CACHE, i, buff, 4, 0, 0, 0))
 343         {
 344                 printk(KERN_WARNING "Unable to flush cache on controller %d\n",
 345                                 i);
 346         }
 347         free_irq(hba[i]->intr, hba[i]);
 348         iounmap(hba[i]->vaddr);
 349         unregister_blkdev(COMPAQ_SMART2_MAJOR+i, hba[i]->devname);
 350         del_timer(&hba[i]->timer);
 351         remove_proc_entry(hba[i]->devname, proc_array);
 352         pci_free_consistent(hba[i]->pci_dev,
 353                         NR_CMDS * sizeof(cmdlist_t), (hba[i]->cmd_pool),
 354                         hba[i]->cmd_pool_dhandle);
 355         kfree(hba[i]->cmd_pool_bits);
 356         for(j = 0; j < NWD; j++) {
 357                 if (ida_gendisk[i][j]->flags & GENHD_FL_UP)
 358                         del_gendisk(ida_gendisk[i][j]);
 359                 devfs_remove("ida/c%dd%d",i,j);
 360                 put_disk(ida_gendisk[i][j]);
 361         }
 362         blk_cleanup_queue(hba[i]->queue);
 363         release_io_mem(hba[i]);
 364         free_hba(i);
 365 }
 366
 367 static void __devexit cpqarray_remove_one_pci (struct pci_dev *pdev)
 368 {
 369         int i;
 370         ctlr_info_t *tmp_ptr;
 371
 372         if (pci_get_drvdata(pdev) == NULL) {
 373                 printk( KERN_ERR "cpqarray: Unable to remove device \n");
 374                 return;
 375         }
 376
 377         tmp_ptr = pci_get_drvdata(pdev);
 378         i = tmp_ptr->ctlr;
 379         if (hba[i] == NULL) {
 380                 printk(KERN_ERR "cpqarray: controller %d appears to have"
 381                         "already been removed \n", i);
 382                 return;
 383         }
 384         pci_set_drvdata(pdev, NULL);
 385
 386         cpqarray_remove_one(i);
 387 }
 388
 389 /* removing an instance that was not removed automatically..
 390  * must be an eisa card.
 391  */
 392 static void __devexit cpqarray_remove_one_eisa (int i)
 393 {
 394         if (hba[i] == NULL) {
 395                 printk(KERN_ERR "cpqarray: controller %d appears to have"
 396                         "already been removed \n", i);
 397                 return;
 398         }
 399         cpqarray_remove_one(i);
 400 }
 401
 402 /* pdev is NULL for eisa */
 403 static int cpqarray_register_ctlr( int i, struct pci_dev *pdev)
 404 {
 405         request_queue_t *q;
 406         int j;
 407
 408         /*
 409          * register block devices
 410          * Find disks and fill in structs
 411          * Get an interrupt, set the Q depth and get into /proc
 412          */
 413
 414         /* If this successful it should insure that we are the only */
 415         /* instance of the driver */
 416         if (register_blkdev(COMPAQ_SMART2_MAJOR+i, hba[i]->devname)) {
 417                 goto Enomem4;
 418         }
 419         hba[i]->access.set_intr_mask(hba[i], 0);
 420         if (request_irq(hba[i]->intr, do_ida_intr,
 421                 SA_INTERRUPT|SA_SHIRQ|SA_SAMPLE_RANDOM,
 422                 hba[i]->devname, hba[i]))
 423         {
 424                 printk(KERN_ERR "cpqarray: Unable to get irq %d for %s\n",
 425                                 hba[i]->intr, hba[i]->devname);
 426                 goto Enomem3;
 427         }
 428
 429         for (j=0; j<NWD; j++) {
 430                 ida_gendisk[i][j] = alloc_disk(1 << NWD_SHIFT);
 431                 if (!ida_gendisk[i][j])
 432                         goto Enomem2;
 433         }
 434
 435         hba[i]->cmd_pool = (cmdlist_t *)pci_alloc_consistent(
 436                 hba[i]->pci_dev, NR_CMDS * sizeof(cmdlist_t),
 437                 &(hba[i]->cmd_pool_dhandle));
 438         hba[i]->cmd_pool_bits = kmalloc(
 439                 ((NR_CMDS+BITS_PER_LONG-1)/BITS_PER_LONG)*sizeof(unsigned long),
 440                 GFP_KERNEL);
 441
 442         if (!hba[i]->cmd_pool_bits || !hba[i]->cmd_pool)
 443                         goto Enomem1;
 444
 445         memset(hba[i]->cmd_pool, 0, NR_CMDS * sizeof(cmdlist_t));
 446         memset(hba[i]->cmd_pool_bits, 0, ((NR_CMDS+BITS_PER_LONG-1)/BITS_PER_LONG)*sizeof(unsigned long));
 447         printk(KERN_INFO "cpqarray: Finding drives on %s",
 448                 hba[i]->devname);
 449
 450         spin_lock_init(&hba[i]->lock);
 451         q = blk_init_queue(do_ida_request, &hba[i]->lock);
 452         if (!q)
 453                 goto Enomem1;
 454
 455         hba[i]->queue = q;
 456         q->queuedata = hba[i];
 457
 458         getgeometry(i);
 459         start_fwbk(i);
 460
 461         ida_procinit(i);
 462
 463         if (pdev)
 464                 blk_queue_bounce_limit(q, hba[i]->pci_dev->dma_mask);
 465
 466         /* This is a hardware imposed limit. */
 467         blk_queue_max_hw_segments(q, SG_MAX);
 468
 469         /* This is a driver limit and could be eliminated. */
 470         blk_queue_max_phys_segments(q, SG_MAX);
 471
 472         init_timer(&hba[i]->timer);
 473         hba[i]->timer.expires = jiffies + IDA_TIMER;
 474         hba[i]->timer.data = (unsigned long)hba[i];
 475         hba[i]->timer.function = ida_timer;
 476         add_timer(&hba[i]->timer);
 477
 478         /* Enable IRQ now that spinlock and rate limit timer are set up */
 479         hba[i]->access.set_intr_mask(hba[i], FIFO_NOT_EMPTY);
 480
 481         for(j=0; j<NWD; j++) {
 482                 struct gendisk *disk = ida_gendisk[i][j];
 483                 drv_info_t *drv = &hba[i]->drv[j];
 484                 sprintf(disk->disk_name, "ida/c%dd%d", i, j);
 485                 disk->major = COMPAQ_SMART2_MAJOR + i;
 486                 disk->first_minor = j<<NWD_SHIFT;
 487                 disk->fops = &ida_fops;
 488                 if (j && !drv->nr_blks)
 489                         continue;
 490                 blk_queue_hardsect_size(hba[i]->queue, drv->blk_size);
 491                 set_capacity(disk, drv->nr_blks);
 492                 disk->queue = hba[i]->queue;
 493                 disk->private_data = drv;
 494                 add_disk(disk);
 495         }
 496
 497         /* done ! */
 498         return(i);
 499
 500 Enomem1:
 501         nr_ctlr = i;
 502         kfree(hba[i]->cmd_pool_bits);
 503         if (hba[i]->cmd_pool)
 504                 pci_free_consistent(hba[i]->pci_dev, NR_CMDS*sizeof(cmdlist_t),
 505                                     hba[i]->cmd_pool, hba[i]->cmd_pool_dhandle);
 506 Enomem2:
 507         while (j--) {
 508                 put_disk(ida_gendisk[i][j]);
 509                 ida_gendisk[i][j] = NULL;
 510         }
 511         free_irq(hba[i]->intr, hba[i]);
 512 Enomem3:
 513         unregister_blkdev(COMPAQ_SMART2_MAJOR+i, hba[i]->devname);
 514 Enomem4:
 515         if (pdev)
 516                 pci_set_drvdata(pdev, NULL);
 517         release_io_mem(hba[i]);
 518         free_hba(i);
 519
 520         printk( KERN_ERR "cpqarray: out of memory");
 521
 522         return -1;
 523 }
 524
 525 static int __init cpqarray_init_one( struct pci_dev *pdev,
 526         const struct pci_device_id *ent)
 527 {
 528         int i;
 529
 530         printk(KERN_DEBUG "cpqarray: Device 0x%x has been found at"
 531                         " bus %d dev %d func %d\n",
 532                         pdev->device, pdev->bus->number, PCI_SLOT(pdev->devfn),
 533                         PCI_FUNC(pdev->devfn));
 534         i = alloc_cpqarray_hba();
 535         if( i < 0 )
 536                 return (-1);
 537         memset(hba[i], 0, sizeof(ctlr_info_t));
 538         sprintf(hba[i]->devname, "ida%d", i);
 539         hba[i]->ctlr = i;
 540         /* Initialize the pdev driver private data */
 541         pci_set_drvdata(pdev, hba[i]);
 542
 543         if (cpqarray_pci_init(hba[i], pdev) != 0) {
 544                 pci_set_drvdata(pdev, NULL);
 545                 release_io_mem(hba[i]);
 546                 free_hba(i);
 547                 return -1;
 548         }
 549
 550         return (cpqarray_register_ctlr(i, pdev));
 551 }
 552
 553 static struct pci_driver cpqarray_pci_driver = {
 554         .name = "cpqarray",
 555         .probe = cpqarray_init_one,
 556         .remove = __devexit_p(cpqarray_remove_one_pci),
 557         .id_table = cpqarray_pci_device_id,
 558 };
 559
 560 /*
 561  *  This is it.  Find all the controllers and register them.
 562  *  returns the number of block devices registered.
 563  */
 564 int __init cpqarray_init_step2(void)
 565 {
 566         int num_cntlrs_reg = 0;
 567         int i;
 568         int rc = 0;
 569
 570         /* detect controllers */
 571         printk(DRIVER_NAME "\n");
 572
 573         rc = pci_register_driver(&cpqarray_pci_driver);
 574         if (rc)
 575                 return rc;
 576         cpqarray_eisa_detect();
 577
 578         for (i=0; i < MAX_CTLR; i++) {
 579                 if (hba[i] != NULL)
 580                         num_cntlrs_reg++;
 581         }
 582
 583         return(num_cntlrs_reg);
 584 }
 585
 586 /* Function to find the first free pointer into our hba[] array */
 587 /* Returns -1 if no free entries are left.  */
 588 static int alloc_cpqarray_hba(void)
 589 {
 590         int i;
 591
 592         for(i=0; i< MAX_CTLR; i++) {
 593                 if (hba[i] == NULL) {
 594                         hba[i] = kmalloc(sizeof(ctlr_info_t), GFP_KERNEL);
 595                         if(hba[i]==NULL) {
 596                                 printk(KERN_ERR "cpqarray: out of memory.\n");
 597                                 return (-1);
 598                         }
 599                         return (i);
 600                 }
 601         }
 602         printk(KERN_WARNING "cpqarray: This driver supports a maximum"
 603                 " of 8 controllers.\n");
 604         return(-1);
 605 }
 606
 607 static void free_hba(int i)
 608 {
 609         kfree(hba[i]);
 610         hba[i]=NULL;
 611 }
 612
 613 /*
 614  * Find the IO address of the controller, its IRQ and so forth.  Fill
 615  * in some basic stuff into the ctlr_info_t structure.
 616  */
 617 static int cpqarray_pci_init(ctlr_info_t *c, struct pci_dev *pdev)
 618 {
 619         ushort vendor_id, device_id, command;
 620         unchar cache_line_size, latency_timer;
 621         unchar irq, revision;
 622         unsigned long addr[6];
 623         __u32 board_id;
 624
 625         int i;
 626
 627         c->pci_dev = pdev;
 628         if (pci_enable_device(pdev)) {
 629                 printk(KERN_ERR "cpqarray: Unable to Enable PCI device\n");
 630                 return -1;
 631         }
 632         vendor_id = pdev->vendor;
 633         device_id = pdev->device;
 634         irq = pdev->irq;
 635
 636         for(i=0; i<6; i++)
 637                 addr[i] = pci_resource_start(pdev, i);
 638
 639         if (pci_set_dma_mask(pdev, CPQARRAY_DMA_MASK) != 0)
 640         {
 641                 printk(KERN_ERR "cpqarray: Unable to set DMA mask\n");
 642                 return -1;
 643         }
 644
 645         pci_read_config_word(pdev, PCI_COMMAND, &command);
 646         pci_read_config_byte(pdev, PCI_CLASS_REVISION, &revision);
 647         pci_read_config_byte(pdev, PCI_CACHE_LINE_SIZE, &cache_line_size);
 648         pci_read_config_byte(pdev, PCI_LATENCY_TIMER, &latency_timer);
 649
 650         pci_read_config_dword(pdev, 0x2c, &board_id);
 651
 652         /* check to see if controller has been disabled */
 653         if(!(command & 0x02)) {
 654                 printk(KERN_WARNING
 655                         "cpqarray: controller appears to be disabled\n");
 656                 return(-1);
 657         }
 658
 659 DBGINFO(
 660         printk("vendor_id = %x\n", vendor_id);
 661         printk("device_id = %x\n", device_id);
 662         printk("command = %x\n", command);
 663         for(i=0; i<6; i++)
 664                 printk("addr[%d] = %lx\n", i, addr[i]);
 665         printk("revision = %x\n", revision);
 666         printk("irq = %x\n", irq);
 667         printk("cache_line_size = %x\n", cache_line_size);
 668         printk("latency_timer = %x\n", latency_timer);
 669         printk("board_id = %x\n", board_id);
 670 );
 671
 672         c->intr = irq;
 673
 674         for(i=0; i<6; i++) {
 675                 if (pci_resource_flags(pdev, i) & PCI_BASE_ADDRESS_SPACE_IO)
 676                 { /* IO space */
 677                         c->io_mem_addr = addr[i];
 678                         c->io_mem_length = pci_resource_end(pdev, i)
 679                                 - pci_resource_start(pdev, i) + 1;
 680                         if(!request_region( c->io_mem_addr, c->io_mem_length,
 681                                 "cpqarray"))
 682                         {
 683                                 printk( KERN_WARNING "cpqarray I/O memory range already in use addr %lx length = %ld\n", c->io_mem_addr, c->io_mem_length);
 684                                 c->io_mem_addr = 0;
 685                                 c->io_mem_length = 0;
 686                         }
 687                         break;
 688                 }
 689         }
 690
 691         c->paddr = 0;
 692         for(i=0; i<6; i++)
 693                 if (!(pci_resource_flags(pdev, i) &
 694                                 PCI_BASE_ADDRESS_SPACE_IO)) {
 695                         c->paddr = pci_resource_start (pdev, i);
 696                         break;
 697                 }
 698         if (!c->paddr)
 699                 return -1;
 700         c->vaddr = remap_pci_mem(c->paddr, 128);
 701         if (!c->vaddr)
 702                 return -1;
 703         c->board_id = board_id;
 704
 705         for(i=0; i<NR_PRODUCTS; i++) {
 706                 if (board_id == products[i].board_id) {
 707                         c->product_name = products[i].product_name;
 708                         c->access = *(products[i].access);
 709                         break;
 710                 }
 711         }
 712         if (i == NR_PRODUCTS) {
 713                 printk(KERN_WARNING "cpqarray: Sorry, I don't know how"
 714                         " to access the SMART Array controller %08lx\n",
 715                                 (unsigned long)board_id);
 716                 return -1;
 717         }
 718
 719         return 0;
 720 }
 721
 722 /*
 723  * Map (physical) PCI mem into (virtual) kernel space
 724  */
 725 static void __iomem *remap_pci_mem(ulong base, ulong size)
 726 {
 727         ulong page_base        = ((ulong) base) & PAGE_MASK;
 728         ulong page_offs        = ((ulong) base) - page_base;
 729         void __iomem *page_remapped    = ioremap(page_base, page_offs+size);
 730
 731         return (page_remapped ? (page_remapped + page_offs) : NULL);
 732 }
 733
 734 #ifndef MODULE
 735 /*
 736  * Config string is a comma separated set of i/o addresses of EISA cards.
 737  */
 738 static int cpqarray_setup(char *str)
 739 {
 740         int i, ints[9];
 741
 742         (void)get_options(str, ARRAY_SIZE(ints), ints);
 743
 744         for(i=0; i<ints[0] && i<8; i++)
 745                 eisa[i] = ints[i+1];
 746         return 1;
 747 }
 748
 749 __setup("smart2=", cpqarray_setup);
 750
 751 #endif
 752
 753 /*
 754  * Find an EISA controller's signature.  Set up an hba if we find it.
 755  */
 756 static int cpqarray_eisa_detect(void)
 757 {
 758         int i=0, j;
 759         __u32 board_id;
 760         int intr;
 761         int ctlr;
 762         int num_ctlr = 0;
 763
 764         while(i<8 && eisa[i]) {
 765                 ctlr = alloc_cpqarray_hba();
 766                 if(ctlr == -1)
 767                         break;
 768                 board_id = inl(eisa[i]+0xC80);
 769                 for(j=0; j < NR_PRODUCTS; j++)
 770                         if (board_id == products[j].board_id)
 771                                 break;
 772
 773                 if (j == NR_PRODUCTS) {
 774                         printk(KERN_WARNING "cpqarray: Sorry, I don't know how"
 775                                 " to access the SMART Array controller %08lx\n",                                 (unsigned long)board_id);
 776                         continue;
 777                 }
 778
 779                 memset(hba[ctlr], 0, sizeof(ctlr_info_t));
 780                 hba[ctlr]->io_mem_addr = eisa[i];
 781                 hba[ctlr]->io_mem_length = 0x7FF;
 782                 if(!request_region(hba[ctlr]->io_mem_addr,
 783                                 hba[ctlr]->io_mem_length,
 784                                 "cpqarray"))
 785                 {
 786                         printk(KERN_WARNING "cpqarray: I/O range already in "
 787                                         "use addr = %lx length = %ld\n",
 788                                         hba[ctlr]->io_mem_addr,
 789                                         hba[ctlr]->io_mem_length);
 790                         free_hba(ctlr);
 791                         continue;
 792                 }
 793
 794                 /*
 795                  * Read the config register to find our interrupt
 796                  */
 797                 intr = inb(eisa[i]+0xCC0) >> 4;
 798                 if (intr & 1) intr = 11;
 799                 else if (intr & 2) intr = 10;
 800                 else if (intr & 4) intr = 14;
 801                 else if (intr & 8) intr = 15;
 802
 803                 hba[ctlr]->intr = intr;
 804                 sprintf(hba[ctlr]->devname, "ida%d", nr_ctlr);
 805                 hba[ctlr]->product_name = products[j].product_name;
 806                 hba[ctlr]->access = *(products[j].access);
 807                 hba[ctlr]->ctlr = ctlr;
 808                 hba[ctlr]->board_id = board_id;
 809                 hba[ctlr]->pci_dev = NULL; /* not PCI */
 810
 811 DBGINFO(
 812         printk("i = %d, j = %d\n", i, j);
 813         printk("irq = %x\n", intr);
 814         printk("product name = %s\n", products[j].product_name);
 815         printk("board_id = %x\n", board_id);
 816 );
 817
 818                 num_ctlr++;
 819                 i++;
 820
 821                 if (cpqarray_register_ctlr(ctlr, NULL) == -1)
 822                         printk(KERN_WARNING
 823                                 "cpqarray: Can't register EISA controller %d\n",
 824                                 ctlr);
 825
 826         }
 827
 828         return num_ctlr;
 829 }
 830
 831 /*
 832  * Open.  Make sure the device is really there.
 833  */
 834 static int ida_open(struct inode *inode, struct file *filep)
 835 {
 836         drv_info_t *drv = get_drv(inode->i_bdev->bd_disk);
 837         ctlr_info_t *host = get_host(inode->i_bdev->bd_disk);
 838
 839         DBGINFO(printk("ida_open %s\n", inode->i_bdev->bd_disk->disk_name));
 840         /*
 841          * Root is allowed to open raw volume zero even if it's not configured
 842          * so array config can still work.  I don't think I really like this,
 843          * but I'm already using way to many device nodes to claim another one
 844          * for "raw controller".
 845          */
 846         if (!drv->nr_blks) {
 847                 if (!capable(CAP_SYS_RAWIO))
 848                         return -ENXIO;
 849                 if (!capable(CAP_SYS_ADMIN) && drv != host->drv)
 850                         return -ENXIO;
 851         }
 852         host->usage_count++;
 853         return 0;
 854 }
 855
 856 /*
 857  * Close.  Sync first.
 858  */
 859 static int ida_release(struct inode *inode, struct file *filep)
 860 {
 861         ctlr_info_t *host = get_host(inode->i_bdev->bd_disk);
 862         host->usage_count--;
 863         return 0;
 864 }
 865
 866 /*
 867  * Enqueuing and dequeuing functions for cmdlists.
 868  */
 869 static inline void addQ(cmdlist_t **Qptr, cmdlist_t *c)
 870 {
 871         if (*Qptr == NULL) {
 872                 *Qptr = c;
 873                 c->next = c->prev = c;
 874         } else {
 875                 c->prev = (*Qptr)->prev;
 876                 c->next = (*Qptr);
 877                 (*Qptr)->prev->next = c;
 878                 (*Qptr)->prev = c;
 879         }
 880 }
 881
 882 static inline cmdlist_t *removeQ(cmdlist_t **Qptr, cmdlist_t *c)
 883 {
 884         if (c && c->next != c) {
 885                 if (*Qptr == c) *Qptr = c->next;
 886                 c->prev->next = c->next;
 887                 c->next->prev = c->prev;
 888         } else {
 889                 *Qptr = NULL;
 890         }
 891         return c;
 892 }
 893
 894 /*
 895  * Get a request and submit it to the controller.
 896  * This routine needs to grab all the requests it possibly can from the
 897  * req Q and submit them.  Interrupts are off (and need to be off) when you
 898  * are in here (either via the dummy do_ida_request functions or by being
 899  * called from the interrupt handler
 900  */
 901 static void do_ida_request(request_queue_t *q)
 902 {
 903         ctlr_info_t *h = q->queuedata;
 904         cmdlist_t *c;
 905         struct request *creq;
 906         struct scatterlist tmp_sg[SG_MAX];
 907         int i, dir, seg;
 908
 909         if (blk_queue_plugged(q))
 910                 goto startio;
 911
 912 queue_next:
 913         creq = elv_next_request(q);
 914         if (!creq)
 915                 goto startio;
 916
 917         if (creq->nr_phys_segments > SG_MAX)
 918                 BUG();
 919
 920         if ((c = cmd_alloc(h,1)) == NULL)
 921                 goto startio;
 922
 923         blkdev_dequeue_request(creq);
 924
 925         c->ctlr = h->ctlr;
 926         c->hdr.unit = (drv_info_t *)(creq->rq_disk->private_data) - h->drv;
 927         c->hdr.size = sizeof(rblk_t) >> 2;
 928         c->size += sizeof(rblk_t);
 929
 930         c->req.hdr.blk = creq->sector;
 931         c->rq = creq;
 932 DBGPX(
 933         printk("sector=%d, nr_sectors=%d\n", creq->sector, creq->nr_sectors);
 934 );
 935         seg = blk_rq_map_sg(q, creq, tmp_sg);
 936
 937         /* Now do all the DMA Mappings */
 938         if (rq_data_dir(creq) == READ)
 939                 dir = PCI_DMA_FROMDEVICE;
 940         else
 941                 dir = PCI_DMA_TODEVICE;
 942         for( i=0; i < seg; i++)
 943         {
 944                 c->req.sg[i].size = tmp_sg[i].length;
 945                 c->req.sg[i].addr = (__u32) pci_map_page(h->pci_dev,
 946                                                  tmp_sg[i].page,
 947                                                  tmp_sg[i].offset,
 948                                                  tmp_sg[i].length, dir);
 949         }
 950 DBGPX(  printk("Submitting %d sectors in %d segments\n", creq->nr_sectors, seg); );
 951         c->req.hdr.sg_cnt = seg;
 952         c->req.hdr.blk_cnt = creq->nr_sectors;
 953         c->req.hdr.cmd = (rq_data_dir(creq) == READ) ? IDA_READ : IDA_WRITE;
 954         c->type = CMD_RWREQ;
 955
 956         /* Put the request on the tail of the request queue */
 957         addQ(&h->reqQ, c);
 958         h->Qdepth++;
 959         if (h->Qdepth > h->maxQsinceinit)
 960                 h->maxQsinceinit = h->Qdepth;
 961
 962         goto queue_next;
 963
 964 startio:
 965         start_io(h);
 966 }
 967
 968 /*
 969  * start_io submits everything on a controller's request queue
 970  * and moves it to the completion queue.
 971  *
 972  * Interrupts had better be off if you're in here
 973  */
 974 static void start_io(ctlr_info_t *h)
 975 {
 976         cmdlist_t *c;
 977
 978         while((c = h->reqQ) != NULL) {
 979                 /* Can't do anything if we're busy */
 980                 if (h->access.fifo_full(h) == 0)
 981                         return;
 982
 983                 /* Get the first entry from the request Q */
 984                 removeQ(&h->reqQ, c);
 985                 h->Qdepth--;
 986
 987                 /* Tell the controller to do our bidding */
 988                 h->access.submit_command(h, c);
 989
 990                 /* Get onto the completion Q */
 991                 addQ(&h->cmpQ, c);
 992         }
 993 }
 994
 995 static inline void complete_buffers(struct bio *bio, int ok)
 996 {
 997         struct bio *xbh;
 998         while(bio) {
 999                 int nr_sectors = bio_sectors(bio);
1000
1001                 xbh = bio->bi_next;
1002                 bio->bi_next = NULL;
1003
1004                 blk_finished_io(nr_sectors);
1005                 bio_endio(bio, nr_sectors << 9, ok ? 0 : -EIO);
1006
1007                 bio = xbh;
1008         }
1009 }
1010 /*
1011  * Mark all buffers that cmd was responsible for
1012  */
1013 static inline void complete_command(cmdlist_t *cmd, int timeout)
1014 {
1015         int ok=1;
1016         int i, ddir;
1017
1018         if (cmd->req.hdr.rcode & RCODE_NONFATAL &&
1019            (hba[cmd->ctlr]->misc_tflags & MISC_NONFATAL_WARN) == 0) {
1020                 printk(KERN_NOTICE "Non Fatal error on ida/c%dd%d\n",
1021                                 cmd->ctlr, cmd->hdr.unit);
1022                 hba[cmd->ctlr]->misc_tflags |= MISC_NONFATAL_WARN;
1023         }
1024         if (cmd->req.hdr.rcode & RCODE_FATAL) {
1025                 printk(KERN_WARNING "Fatal error on ida/c%dd%d\n",
1026                                 cmd->ctlr, cmd->hdr.unit);
1027                 ok = 0;
1028         }
1029         if (cmd->req.hdr.rcode & RCODE_INVREQ) {
1030                                 printk(KERN_WARNING "Invalid request on ida/c%dd%d = (cmd=%x sect=%d cnt=%d sg=%d ret=%x)\n",
1031                                 cmd->ctlr, cmd->hdr.unit, cmd->req.hdr.cmd,
1032                                 cmd->req.hdr.blk, cmd->req.hdr.blk_cnt,
1033                                 cmd->req.hdr.sg_cnt, cmd->req.hdr.rcode);
1034                 ok = 0;
1035         }
1036         if (timeout) ok = 0;
1037         /* unmap the DMA mapping for all the scatter gather elements */
1038         if (cmd->req.hdr.cmd == IDA_READ)
1039                 ddir = PCI_DMA_FROMDEVICE;
1040         else
1041                 ddir = PCI_DMA_TODEVICE;
1042         for(i=0; i<cmd->req.hdr.sg_cnt; i++)
1043                 pci_unmap_page(hba[cmd->ctlr]->pci_dev, cmd->req.sg[i].addr,
1044                                 cmd->req.sg[i].size, ddir);
1045
1046         complete_buffers(cmd->rq->bio, ok);
1047
1048         DBGPX(printk("Done with %p\n", cmd->rq););
1049         end_that_request_last(cmd->rq);
1050 }
1051
1052 /*
1053  *  The controller will interrupt us upon completion of commands.
1054  *  Find the command on the completion queue, remove it, tell the OS and
1055  *  try to queue up more IO
1056  */
1057 static irqreturn_t do_ida_intr(int irq, void *dev_id, struct pt_regs *regs)
1058 {
1059         ctlr_info_t *h = dev_id;
1060         cmdlist_t *c;
1061         unsigned long istat;
1062         unsigned long flags;
1063         __u32 a,a1;
1064
1065         istat = h->access.intr_pending(h);
1066         /* Is this interrupt for us? */
1067         if (istat == 0)
1068                 return IRQ_NONE;
1069
1070         /*
1071          * If there are completed commands in the completion queue,
1072          * we had better do something about it.
1073          */
1074         spin_lock_irqsave(IDA_LOCK(h->ctlr), flags);
1075         if (istat & FIFO_NOT_EMPTY) {
1076                 while((a = h->access.command_completed(h))) {
1077                         a1 = a; a &= ~3;
1078                         if ((c = h->cmpQ) == NULL)
1079                         {
1080                                 printk(KERN_WARNING "cpqarray: Completion of %08lx ignored\n", (unsigned long)a1);
1081                                 continue;
1082                         }
1083                         while(c->busaddr != a) {
1084                                 c = c->next;
1085                                 if (c == h->cmpQ)
1086                                         break;
1087                         }
1088                         /*
1089                          * If we've found the command, take it off the
1090                          * completion Q and free it
1091                          */
1092                         if (c->busaddr == a) {
1093                                 removeQ(&h->cmpQ, c);
1094                                 /*  Check for invalid command.
1095                                  *  Controller returns command error,
1096                                  *  But rcode = 0.
1097                                  */
1098
1099                                 if((a1 & 0x03) && (c->req.hdr.rcode == 0))
1100                                 {
1101                                         c->req.hdr.rcode = RCODE_INVREQ;
1102                                 }
1103                                 if (c->type == CMD_RWREQ) {
1104                                         complete_command(c, 0);
1105                                         cmd_free(h, c, 1);
1106                                 } else if (c->type == CMD_IOCTL_PEND) {
1107                                         c->type = CMD_IOCTL_DONE;
1108                                 }
1109                                 continue;
1110                         }
1111                 }
1112         }
1113
1114         /*
1115          * See if we can queue up some more IO
1116          */
1117         do_ida_request(h->queue);
1118         spin_unlock_irqrestore(IDA_LOCK(h->ctlr), flags);
1119         return IRQ_HANDLED;
1120 }
1121
1122 /*
1123  * This timer was for timing out requests that haven't happened after
1124  * IDA_TIMEOUT.  That wasn't such a good idea.  This timer is used to
1125  * reset a flags structure so we don't flood the user with
1126  * "Non-Fatal error" messages.
1127  */
1128 static void ida_timer(unsigned long tdata)
1129 {
1130         ctlr_info_t *h = (ctlr_info_t*)tdata;
1131
1132         h->timer.expires = jiffies + IDA_TIMER;
1133         add_timer(&h->timer);
1134         h->misc_tflags = 0;
1135 }
1136
1137 /*
1138  *  ida_ioctl does some miscellaneous stuff like reporting drive geometry,
1139  *  setting readahead and submitting commands from userspace to the controller.
1140  */
1141 static int ida_ioctl(struct inode *inode, struct file *filep, unsigned int cmd, unsigned long arg)
1142 {
1143         drv_info_t *drv = get_drv(inode->i_bdev->bd_disk);
1144         ctlr_info_t *host = get_host(inode->i_bdev->bd_disk);
1145         int error;
1146         int diskinfo[4];
1147         struct hd_geometry __user *geo = (struct hd_geometry __user *)arg;
1148         ida_ioctl_t __user *io = (ida_ioctl_t __user *)arg;
1149         ida_ioctl_t *my_io;
1150
1151         switch(cmd) {
1152         case HDIO_GETGEO:
1153                 if (drv->cylinders) {
1154                         diskinfo[0] = drv->heads;
1155                         diskinfo[1] = drv->sectors;
1156                         diskinfo[2] = drv->cylinders;
1157                 } else {
1158                         diskinfo[0] = 0xff;
1159                         diskinfo[1] = 0x3f;
1160                         diskinfo[2] = drv->nr_blks / (0xff*0x3f);
1161                 }
1162                 put_user(diskinfo[0], &geo->heads);
1163                 put_user(diskinfo[1], &geo->sectors);
1164                 put_user(diskinfo[2], &geo->cylinders);
1165                 put_user(get_start_sect(inode->i_bdev), &geo->start);
1166                 return 0;
1167         case IDAGETDRVINFO:
1168                 if (copy_to_user(&io->c.drv, drv, sizeof(drv_info_t)))
1169                         return -EFAULT;
1170                 return 0;
1171         case IDAPASSTHRU:
1172                 if (!capable(CAP_SYS_RAWIO))
1173                         return -EPERM;
1174                 my_io = kmalloc(sizeof(ida_ioctl_t), GFP_KERNEL);
1175                 if (!my_io)
1176                         return -ENOMEM;
1177                 error = -EFAULT;
1178                 if (copy_from_user(my_io, io, sizeof(*my_io)))
1179                         goto out_passthru;
1180                 error = ida_ctlr_ioctl(host, drv - host->drv, my_io);
1181                 if (error)
1182                         goto out_passthru;
1183                 error = -EFAULT;
1184                 if (copy_to_user(io, my_io, sizeof(*my_io)))
1185                         goto out_passthru;
1186                 error = 0;
1187 out_passthru:
1188                 kfree(my_io);
1189                 return error;
1190         case IDAGETCTLRSIG:
1191                 if (!arg) return -EINVAL;
1192                 put_user(host->ctlr_sig, (int __user *)arg);
1193                 return 0;
1194         case IDAREVALIDATEVOLS:
1195                 if (iminor(inode) != 0)
1196                         return -ENXIO;
1197                 return revalidate_allvol(host);
1198         case IDADRIVERVERSION:
1199                 if (!arg) return -EINVAL;
1200                 put_user(DRIVER_VERSION, (unsigned long __user *)arg);
1201                 return 0;
1202         case IDAGETPCIINFO:
1203         {
1204
1205                 ida_pci_info_struct pciinfo;
1206
1207                 if (!arg) return -EINVAL;
1208                 pciinfo.bus = host->pci_dev->bus->number;
1209                 pciinfo.dev_fn = host->pci_dev->devfn;
1210                 pciinfo.board_id = host->board_id;
1211                 if(copy_to_user((void __user *) arg, &pciinfo,
1212                         sizeof( ida_pci_info_struct)))
1213                                 return -EFAULT;
1214                 return(0);
1215         }
1216
1217         default:
1218                 return -EINVAL;
1219         }
1220
1221 }
1222 /*
1223  * ida_ctlr_ioctl is for passing commands to the controller from userspace.
1224  * The command block (io) has already been copied to kernel space for us,
1225  * however, any elements in the sglist need to be copied to kernel space
1226  * or copied back to userspace.
1227  *
1228  * Only root may perform a controller passthru command, however I'm not doing
1229  * any serious sanity checking on the arguments.  Doing an IDA_WRITE_MEDIA and
1230  * putting a 64M buffer in the sglist is probably a *bad* idea.
1231  */
1232 static int ida_ctlr_ioctl(ctlr_info_t *h, int dsk, ida_ioctl_t *io)
1233 {
1234         int ctlr = h->ctlr;
1235         cmdlist_t *c;
1236         void *p = NULL;
1237         unsigned long flags;
1238         int error;
1239
1240         if ((c = cmd_alloc(h, 0)) == NULL)
1241                 return -ENOMEM;
1242         c->ctlr = ctlr;
1243         c->hdr.unit = (io->unit & UNITVALID) ? (io->unit & ~UNITVALID) : dsk;
1244         c->hdr.size = sizeof(rblk_t) >> 2;
1245         c->size += sizeof(rblk_t);
1246
1247         c->req.hdr.cmd = io->cmd;
1248         c->req.hdr.blk = io->blk;
1249         c->req.hdr.blk_cnt = io->blk_cnt;
1250         c->type = CMD_IOCTL_PEND;
1251
1252         /* Pre submit processing */
1253         switch(io->cmd) {
1254         case PASSTHRU_A:
1255                 p = kmalloc(io->sg[0].size, GFP_KERNEL);
1256                 if (!p)
1257                 {
1258                         error = -ENOMEM;
1259                         cmd_free(h, c, 0);
1260                         return(error);
1261                 }
1262                 if (copy_from_user(p, io->sg[0].addr, io->sg[0].size)) {
1263                         kfree(p);
1264                         cmd_free(h, c, 0);
1265                         return -EFAULT;
1266                 }
1267                 c->req.hdr.blk = pci_map_single(h->pci_dev, &(io->c),
1268                                 sizeof(ida_ioctl_t),
1269                                 PCI_DMA_BIDIRECTIONAL);
1270                 c->req.sg[0].size = io->sg[0].size;
1271                 c->req.sg[0].addr = pci_map_single(h->pci_dev, p,
1272                         c->req.sg[0].size, PCI_DMA_BIDIRECTIONAL);
1273                 c->req.hdr.sg_cnt = 1;
1274                 break;
1275         case IDA_READ:
1276         case READ_FLASH_ROM:
1277         case SENSE_CONTROLLER_PERFORMANCE:
1278                 p = kmalloc(io->sg[0].size, GFP_KERNEL);
1279                 if (!p)
1280                 {
1281                         error = -ENOMEM;
1282                         cmd_free(h, c, 0);
1283                         return(error);
1284                 }
1285
1286                 c->req.sg[0].size = io->sg[0].size;
1287                 c->req.sg[0].addr = pci_map_single(h->pci_dev, p,
1288                         c->req.sg[0].size, PCI_DMA_BIDIRECTIONAL);
1289                 c->req.hdr.sg_cnt = 1;
1290                 break;
1291         case IDA_WRITE:
1292         case IDA_WRITE_MEDIA:
1293         case DIAG_PASS_THRU:
1294         case COLLECT_BUFFER:
1295         case WRITE_FLASH_ROM:
1296                 p = kmalloc(io->sg[0].size, GFP_KERNEL);
1297                 if (!p)
1298                 {
1299                         error = -ENOMEM;
1300                         cmd_free(h, c, 0);
1301                         return(error);
1302                 }
1303                 if (copy_from_user(p, io->sg[0].addr, io->sg[0].size)) {
1304                         kfree(p);
1305                         cmd_free(h, c, 0);
1306                         return -EFAULT;
1307                 }
1308                 c->req.sg[0].size = io->sg[0].size;
1309                 c->req.sg[0].addr = pci_map_single(h->pci_dev, p,
1310                         c->req.sg[0].size, PCI_DMA_BIDIRECTIONAL);
1311                 c->req.hdr.sg_cnt = 1;
1312                 break;
1313         default:
1314                 c->req.sg[0].size = sizeof(io->c);
1315                 c->req.sg[0].addr = pci_map_single(h->pci_dev,&io->c,
1316                         c->req.sg[0].size, PCI_DMA_BIDIRECTIONAL);
1317                 c->req.hdr.sg_cnt = 1;
1318         }
1319
1320         /* Put the request on the tail of the request queue */
1321         spin_lock_irqsave(IDA_LOCK(ctlr), flags);
1322         addQ(&h->reqQ, c);
1323         h->Qdepth++;
1324         start_io(h);
1325         spin_unlock_irqrestore(IDA_LOCK(ctlr), flags);
1326
1327         /* Wait for completion */
1328         while(c->type != CMD_IOCTL_DONE)
1329                 schedule();
1330
1331         /* Unmap the DMA  */
1332         pci_unmap_single(h->pci_dev, c->req.sg[0].addr, c->req.sg[0].size,
1333                 PCI_DMA_BIDIRECTIONAL);
1334         /* Post submit processing */
1335         switch(io->cmd) {
1336         case PASSTHRU_A:
1337                 pci_unmap_single(h->pci_dev, c->req.hdr.blk,
1338                                 sizeof(ida_ioctl_t),
1339                                 PCI_DMA_BIDIRECTIONAL);
1340         case IDA_READ:
1341         case DIAG_PASS_THRU:
1342         case SENSE_CONTROLLER_PERFORMANCE:
1343         case READ_FLASH_ROM:
1344                 if (copy_to_user(io->sg[0].addr, p, io->sg[0].size)) {
1345                         kfree(p);
1346                         return -EFAULT;
1347                 }
1348                 /* fall through and free p */
1349         case IDA_WRITE:
1350         case IDA_WRITE_MEDIA:
1351         case COLLECT_BUFFER:
1352         case WRITE_FLASH_ROM:
1353                 kfree(p);
1354                 break;
1355         default:;
1356                 /* Nothing to do */
1357         }
1358
1359         io->rcode = c->req.hdr.rcode;
1360         cmd_free(h, c, 0);
1361         return(0);
1362 }
1363
1364 /*
1365  * Commands are pre-allocated in a large block.  Here we use a simple bitmap
1366  * scheme to suballocte them to the driver.  Operations that are not time
1367  * critical (and can wait for kmalloc and possibly sleep) can pass in NULL
1368  * as the first argument to get a new command.
1369  */
1370 static cmdlist_t * cmd_alloc(ctlr_info_t *h, int get_from_pool)
1371 {
1372         cmdlist_t * c;
1373         int i;
1374         dma_addr_t cmd_dhandle;
1375
1376         if (!get_from_pool) {
1377                 c = (cmdlist_t*)pci_alloc_consistent(h->pci_dev,
1378                         sizeof(cmdlist_t), &cmd_dhandle);
1379                 if(c==NULL)
1380                         return NULL;
1381         } else {
1382                 do {
1383                         i = find_first_zero_bit(h->cmd_pool_bits, NR_CMDS);
1384                         if (i == NR_CMDS)
1385                                 return NULL;
1386                 } while(test_and_set_bit(i&(BITS_PER_LONG-1), h->cmd_pool_bits+(i/BITS_PER_LONG)) != 0);
1387                 c = h->cmd_pool + i;
1388                 cmd_dhandle = h->cmd_pool_dhandle + i*sizeof(cmdlist_t);
1389                 h->nr_allocs++;
1390         }
1391
1392         memset(c, 0, sizeof(cmdlist_t));
1393         c->busaddr = cmd_dhandle;
1394         return c;
1395 }
1396
1397 static void cmd_free(ctlr_info_t *h, cmdlist_t *c, int got_from_pool)
1398 {
1399         int i;
1400
1401         if (!got_from_pool) {
1402                 pci_free_consistent(h->pci_dev, sizeof(cmdlist_t), c,
1403                         c->busaddr);
1404         } else {
1405                 i = c - h->cmd_pool;
1406                 clear_bit(i&(BITS_PER_LONG-1), h->cmd_pool_bits+(i/BITS_PER_LONG));
1407                 h->nr_frees++;
1408         }
1409 }
1410
1411 /***********************************************************************
1412     name:        sendcmd
1413     Send a command to an IDA using the memory mapped FIFO interface
1414     and wait for it to complete.
1415     This routine should only be called at init time.
1416 ***********************************************************************/
1417 static int sendcmd(
1418         __u8    cmd,
1419         int     ctlr,
1420         void    *buff,
1421         size_t  size,
1422         unsigned int blk,
1423         unsigned int blkcnt,
1424         unsigned int log_unit )
1425 {
1426         cmdlist_t *c;
1427         int complete;
1428         unsigned long temp;
1429         unsigned long i;
1430         ctlr_info_t *info_p = hba[ctlr];
1431
1432         c = cmd_alloc(info_p, 1);
1433         if(!c)
1434                 return IO_ERROR;
1435         c->ctlr = ctlr;
1436         c->hdr.unit = log_unit;
1437         c->hdr.prio = 0;
1438         c->hdr.size = sizeof(rblk_t) >> 2;
1439         c->size += sizeof(rblk_t);
1440
1441         /* The request information. */
1442         c->req.hdr.next = 0;
1443         c->req.hdr.rcode = 0;
1444         c->req.bp = 0;
1445         c->req.hdr.sg_cnt = 1;
1446         c->req.hdr.reserved = 0;
1447
1448         if (size == 0)
1449                 c->req.sg[0].size = 512;
1450         else
1451                 c->req.sg[0].size = size;
1452
1453         c->req.hdr.blk = blk;
1454         c->req.hdr.blk_cnt = blkcnt;
1455         c->req.hdr.cmd = (unsigned char) cmd;
1456         c->req.sg[0].addr = (__u32) pci_map_single(info_p->pci_dev,
1457                 buff, c->req.sg[0].size, PCI_DMA_BIDIRECTIONAL);
1458         /*
1459          * Disable interrupt
1460          */
1461         info_p->access.set_intr_mask(info_p, 0);
1462         /* Make sure there is room in the command FIFO */
1463         /* Actually it should be completely empty at this time. */
1464         for (i = 200000; i > 0; i--) {
1465                 temp = info_p->access.fifo_full(info_p);
1466                 if (temp != 0) {
1467                         break;
1468                 }
1469                 udelay(10);
1470 DBG(
1471                 printk(KERN_WARNING "cpqarray ida%d: idaSendPciCmd FIFO full,"
1472                         " waiting!\n", ctlr);
1473 );
1474         }
1475         /*
1476          * Send the cmd
1477          */
1478         info_p->access.submit_command(info_p, c);
1479         complete = pollcomplete(ctlr);
1480
1481         pci_unmap_single(info_p->pci_dev, (dma_addr_t) c->req.sg[0].addr,
1482                 c->req.sg[0].size, PCI_DMA_BIDIRECTIONAL);
1483         if (complete != 1) {
1484                 if (complete != c->busaddr) {
1485                         printk( KERN_WARNING
1486                         "cpqarray ida%d: idaSendPciCmd "
1487                       "Invalid command list address returned! (%08lx)\n",
1488                                 ctlr, (unsigned long)complete);
1489                         cmd_free(info_p, c, 1);
1490                         return (IO_ERROR);
1491                 }
1492         } else {
1493                 printk( KERN_WARNING
1494                         "cpqarray ida%d: idaSendPciCmd Timeout out, "
1495                         "No command list address returned!\n",
1496                         ctlr);
1497                 cmd_free(info_p, c, 1);
1498                 return (IO_ERROR);
1499         }
1500
1501         if (c->req.hdr.rcode & 0x00FE) {
1502                 if (!(c->req.hdr.rcode & BIG_PROBLEM)) {
1503                         printk( KERN_WARNING
1504                         "cpqarray ida%d: idaSendPciCmd, error: "
1505                                 "Controller failed at init time "
1506                                 "cmd: 0x%x, return code = 0x%x\n",
1507                                 ctlr, c->req.hdr.cmd, c->req.hdr.rcode);
1508
1509                         cmd_free(info_p, c, 1);
1510                         return (IO_ERROR);
1511                 }
1512         }
1513         cmd_free(info_p, c, 1);
1514         return (IO_OK);
1515 }
1516
1517 /*
1518  * revalidate_allvol is for online array config utilities.  After a
1519  * utility reconfigures the drives in the array, it can use this function
1520  * (through an ioctl) to make the driver zap any previous disk structs for
1521  * that controller and get new ones.
1522  *
1523  * Right now I'm using the getgeometry() function to do this, but this
1524  * function should probably be finer grained and allow you to revalidate one
1525  * particualar logical volume (instead of all of them on a particular
1526  * controller).
1527  */
1528 static int revalidate_allvol(ctlr_info_t *host)
1529 {
1530         int ctlr = host->ctlr;
1531         int i;
1532         unsigned long flags;
1533
1534         spin_lock_irqsave(IDA_LOCK(ctlr), flags);
1535         if (host->usage_count > 1) {
1536                 spin_unlock_irqrestore(IDA_LOCK(ctlr), flags);
1537                 printk(KERN_WARNING "cpqarray: Device busy for volume"
1538                         " revalidation (usage=%d)\n", host->usage_count);
1539                 return -EBUSY;
1540         }
1541         host->usage_count++;
1542         spin_unlock_irqrestore(IDA_LOCK(ctlr), flags);
1543
1544         /*
1545          * Set the partition and block size structures for all volumes
1546          * on this controller to zero.  We will reread all of this data
1547          */
1548         set_capacity(ida_gendisk[ctlr][0], 0);
1549         for (i = 1; i < NWD; i++) {
1550                 struct gendisk *disk = ida_gendisk[ctlr][i];
1551                 if (disk->flags & GENHD_FL_UP)
1552                         del_gendisk(disk);
1553         }
1554         memset(host->drv, 0, sizeof(drv_info_t)*NWD);
1555
1556         /*
1557          * Tell the array controller not to give us any interrupts while
1558          * we check the new geometry.  Then turn interrupts back on when
1559          * we're done.
1560          */
1561         host->access.set_intr_mask(host, 0);
1562         getgeometry(ctlr);
1563         host->access.set_intr_mask(host, FIFO_NOT_EMPTY);
1564
1565         for(i=0; i<NWD; i++) {
1566                 struct gendisk *disk = ida_gendisk[ctlr][i];
1567                 drv_info_t *drv = &host->drv[i];
1568                 if (i && !drv->nr_blks)
1569                         continue;
1570                 blk_queue_hardsect_size(host->queue, drv->blk_size);
1571                 set_capacity(disk, drv->nr_blks);
1572                 disk->queue = host->queue;
1573                 disk->private_data = drv;
1574                 if (i)
1575                         add_disk(disk);
1576         }
1577
1578         host->usage_count--;
1579         return 0;
1580 }
1581
1582 static int ida_revalidate(struct gendisk *disk)
1583 {
1584         drv_info_t *drv = disk->private_data;
1585         set_capacity(disk, drv->nr_blks);
1586         return 0;
1587 }
1588
1589 /********************************************************************
1590     name: pollcomplete
1591     Wait polling for a command to complete.
1592     The memory mapped FIFO is polled for the completion.
1593     Used only at init time, interrupts disabled.
1594  ********************************************************************/
1595 static int pollcomplete(int ctlr)
1596 {
1597         int done;
1598         int i;
1599
1600         /* Wait (up to 2 seconds) for a command to complete */
1601
1602         for (i = 200000; i > 0; i--) {
1603                 done = hba[ctlr]->access.command_completed(hba[ctlr]);
1604                 if (done == 0) {
1605                         udelay(10);     /* a short fixed delay */
1606                 } else
1607                         return (done);
1608         }
1609         /* Invalid address to tell caller we ran out of time */
1610         return 1;
1611 }
1612 /*****************************************************************
1613     start_fwbk
1614     Starts controller firmwares background processing.
1615     Currently only the Integrated Raid controller needs this done.
1616     If the PCI mem address registers are written to after this,
1617          data corruption may occur
1618 *****************************************************************/
1619 static void start_fwbk(int ctlr)
1620 {
1621                 id_ctlr_t *id_ctlr_buf;
1622         int ret_code;
1623
1624         if(     (hba[ctlr]->board_id != 0x40400E11)
1625                 && (hba[ctlr]->board_id != 0x40480E11) )
1626
1627         /* Not a Integrated Raid, so there is nothing for us to do */
1628                 return;
1629         printk(KERN_DEBUG "cpqarray: Starting firmware's background"
1630                 " processing\n");
1631         /* Command does not return anything, but idasend command needs a
1632                 buffer */
1633         id_ctlr_buf = (id_ctlr_t *)kmalloc(sizeof(id_ctlr_t), GFP_KERNEL);
1634         if(id_ctlr_buf==NULL)
1635         {
1636                 printk(KERN_WARNING "cpqarray: Out of memory. "
1637                         "Unable to start background processing.\n");
1638                 return;
1639         }
1640         ret_code = sendcmd(RESUME_BACKGROUND_ACTIVITY, ctlr,
1641                 id_ctlr_buf, 0, 0, 0, 0);
1642         if(ret_code != IO_OK)
1643                 printk(KERN_WARNING "cpqarray: Unable to start"
1644                         " background processing\n");
1645
1646         kfree(id_ctlr_buf);
1647 }
1648 /*****************************************************************
1649     getgeometry
1650     Get ida logical volume geometry from the controller
1651     This is a large bit of code which once existed in two flavors,
1652     It is used only at init time.
1653 *****************************************************************/
1654 static void getgeometry(int ctlr)
1655 {
1656         id_log_drv_t *id_ldrive;
1657         id_ctlr_t *id_ctlr_buf;
1658         sense_log_drv_stat_t *id_lstatus_buf;
1659         config_t *sense_config_buf;
1660         unsigned int log_unit, log_index;
1661         int ret_code, size;
1662         drv_info_t *drv;
1663         ctlr_info_t *info_p = hba[ctlr];
1664         int i;
1665
1666         info_p->log_drv_map = 0;
1667
1668         id_ldrive = (id_log_drv_t *)kmalloc(sizeof(id_log_drv_t), GFP_KERNEL);
1669         if(id_ldrive == NULL)
1670         {
1671                 printk( KERN_ERR "cpqarray:  out of memory.\n");
1672                 return;
1673         }
1674
1675         id_ctlr_buf = (id_ctlr_t *)kmalloc(sizeof(id_ctlr_t), GFP_KERNEL);
1676         if(id_ctlr_buf == NULL)
1677         {
1678                 kfree(id_ldrive);
1679                 printk( KERN_ERR "cpqarray:  out of memory.\n");
1680                 return;
1681         }
1682
1683         id_lstatus_buf = (sense_log_drv_stat_t *)kmalloc(sizeof(sense_log_drv_stat_t), GFP_KERNEL);
1684         if(id_lstatus_buf == NULL)
1685         {
1686                 kfree(id_ctlr_buf);
1687                 kfree(id_ldrive);
1688                 printk( KERN_ERR "cpqarray:  out of memory.\n");
1689                 return;
1690         }
1691
1692         sense_config_buf = (config_t *)kmalloc(sizeof(config_t), GFP_KERNEL);
1693         if(sense_config_buf == NULL)
1694         {
1695                 kfree(id_lstatus_buf);
1696                 kfree(id_ctlr_buf);
1697                 kfree(id_ldrive);
1698                 printk( KERN_ERR "cpqarray:  out of memory.\n");
1699                 return;
1700         }
1701
1702         memset(id_ldrive, 0, sizeof(id_log_drv_t));
1703         memset(id_ctlr_buf, 0, sizeof(id_ctlr_t));
1704         memset(id_lstatus_buf, 0, sizeof(sense_log_drv_stat_t));
1705         memset(sense_config_buf, 0, sizeof(config_t));
1706
1707         info_p->phys_drives = 0;
1708         info_p->log_drv_map = 0;
1709         info_p->drv_assign_map = 0;
1710         info_p->drv_spare_map = 0;
1711         info_p->mp_failed_drv_map = 0;  /* only initialized here */
1712         /* Get controllers info for this logical drive */
1713         ret_code = sendcmd(ID_CTLR, ctlr, id_ctlr_buf, 0, 0, 0, 0);
1714         if (ret_code == IO_ERROR) {
1715                 /*
1716                  * If can't get controller info, set the logical drive map to 0,
1717                  * so the idastubopen will fail on all logical drives
1718                  * on the controller.
1719                  */
1720                  /* Free all the buffers and return */
1721                 printk(KERN_ERR "cpqarray: error sending ID controller\n");
1722                 kfree(sense_config_buf);
1723                 kfree(id_lstatus_buf);
1724                 kfree(id_ctlr_buf);
1725                 kfree(id_ldrive);
1726                 return;
1727         }
1728
1729         info_p->log_drives = id_ctlr_buf->nr_drvs;
1730         for(i=0;i<4;i++)
1731                 info_p->firm_rev[i] = id_ctlr_buf->firm_rev[i];
1732         info_p->ctlr_sig = id_ctlr_buf->cfg_sig;
1733
1734         printk(" (%s)\n", info_p->product_name);
1735         /*
1736          * Initialize logical drive map to zero
1737          */
1738         log_index = 0;
1739         /*
1740          * Get drive geometry for all logical drives
1741          */
1742         if (id_ctlr_buf->nr_drvs > 16)
1743                 printk(KERN_WARNING "cpqarray ida%d:  This driver supports "
1744                         "16 logical drives per controller.\n.  "
1745                         " Additional drives will not be "
1746                         "detected\n", ctlr);
1747
1748         for (log_unit = 0;
1749              (log_index < id_ctlr_buf->nr_drvs)
1750              && (log_unit < NWD);
1751              log_unit++) {
1752                 struct gendisk *disk = ida_gendisk[ctlr][log_unit];
1753
1754                 size = sizeof(sense_log_drv_stat_t);
1755
1756                 /*
1757                    Send "Identify logical drive status" cmd
1758                  */
1759                 ret_code = sendcmd(SENSE_LOG_DRV_STAT,
1760                              ctlr, id_lstatus_buf, size, 0, 0, log_unit);
1761                 if (ret_code == IO_ERROR) {
1762                         /*
1763                            If can't get logical drive status, set
1764                            the logical drive map to 0, so the
1765                            idastubopen will fail for all logical drives
1766                            on the controller.
1767                          */
1768                         info_p->log_drv_map = 0;
1769                         printk( KERN_WARNING
1770                              "cpqarray ida%d: idaGetGeometry - Controller"
1771                                 " failed to report status of logical drive %d\n"
1772                          "Access to this controller has been disabled\n",
1773                                 ctlr, log_unit);
1774                         /* Free all the buffers and return */
1775                         kfree(sense_config_buf);
1776                         kfree(id_lstatus_buf);
1777                         kfree(id_ctlr_buf);
1778                         kfree(id_ldrive);
1779                         return;
1780                 }
1781                 /*
1782                    Make sure the logical drive is configured
1783                  */
1784                 if (id_lstatus_buf->status != LOG_NOT_CONF) {
1785                         ret_code = sendcmd(ID_LOG_DRV, ctlr, id_ldrive,
1786                                sizeof(id_log_drv_t), 0, 0, log_unit);
1787                         /*
1788                            If error, the bit for this
1789                            logical drive won't be set and
1790                            idastubopen will return error.
1791                          */
1792                         if (ret_code != IO_ERROR) {
1793                                 drv = &info_p->drv[log_unit];
1794                                 drv->blk_size = id_ldrive->blk_size;
1795                                 drv->nr_blks = id_ldrive->nr_blks;
1796                                 drv->cylinders = id_ldrive->drv.cyl;
1797                                 drv->heads = id_ldrive->drv.heads;
1798                                 drv->sectors = id_ldrive->drv.sect_per_track;
1799                                 info_p->log_drv_map |=  (1 << log_unit);
1800
1801         printk(KERN_INFO "cpqarray ida/c%dd%d: blksz=%d nr_blks=%d\n",
1802                 ctlr, log_unit, drv->blk_size, drv->nr_blks);
1803                                 ret_code = sendcmd(SENSE_CONFIG,
1804                                                   ctlr, sense_config_buf,
1805                                  sizeof(config_t), 0, 0, log_unit);
1806                                 if (ret_code == IO_ERROR) {
1807                                         info_p->log_drv_map = 0;
1808                                         /* Free all the buffers and return */
1809                                         printk(KERN_ERR "cpqarray: error sending sense config\n");
1810                                         kfree(sense_config_buf);
1811                                         kfree(id_lstatus_buf);
1812                                         kfree(id_ctlr_buf);
1813                                         kfree(id_ldrive);
1814                                         return;
1815
1816                                 }
1817
1818                                 sprintf(disk->devfs_name, "ida/c%dd%d", ctlr, log_unit);
1819
1820                                 info_p->phys_drives =
1821                                     sense_config_buf->ctlr_phys_drv;
1822                                 info_p->drv_assign_map
1823                                     |= sense_config_buf->drv_asgn_map;
1824                                 info_p->drv_assign_map
1825                                     |= sense_config_buf->spare_asgn_map;
1826                                 info_p->drv_spare_map
1827                                     |= sense_config_buf->spare_asgn_map;
1828                         }       /* end of if no error on id_ldrive */
1829                         log_index = log_index + 1;
1830                 }               /* end of if logical drive configured */
1831         }                       /* end of for log_unit */
1832         kfree(sense_config_buf);
1833         kfree(id_ldrive);
1834         kfree(id_lstatus_buf);
1835         kfree(id_ctlr_buf);
1836         return;
1837
1838 }
1839
1840 static void __exit cpqarray_exit(void)
1841 {
1842         int i;
1843
1844         pci_unregister_driver(&cpqarray_pci_driver);
1845
1846         /* Double check that all controller entries have been removed */
1847         for(i=0; i<MAX_CTLR; i++) {
1848                 if (hba[i] != NULL) {
1849                         printk(KERN_WARNING "cpqarray: Removing EISA "
1850                                         "controller %d\n", i);
1851                         cpqarray_remove_one_eisa(i);
1852                 }
1853         }
1854
1855         devfs_remove("ida");
1856         remove_proc_entry("cpqarray", proc_root_driver);
1857 }
1858
1859 module_init(cpqarray_init)
1860 module_exit(cpqarray_exit)