2 * Disk Array driver for Compaq SMART2 Controllers
3 * Copyright 1998 Compaq Computer Corporation
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License as published by
7 * the Free Software Foundation; either version 2 of the License, or
8 * (at your option) any later version.
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or
13 * NON INFRINGEMENT. See the GNU General Public License for more details.
15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
19 * Questions/Comments/Bugfixes to iss_storagedev@hp.com
22 #include <linux/config.h> /* CONFIG_PROC_FS */
23 #include <linux/module.h>
24 #include <linux/types.h>
25 #include <linux/pci.h>
26 #include <linux/bio.h>
27 #include <linux/interrupt.h>
28 #include <linux/kernel.h>
29 #include <linux/slab.h>
30 #include <linux/delay.h>
31 #include <linux/major.h>
33 #include <linux/blkpg.h>
34 #include <linux/timer.h>
35 #include <linux/proc_fs.h>
36 #include <linux/devfs_fs_kernel.h>
37 #include <linux/init.h>
38 #include <linux/hdreg.h>
39 #include <linux/spinlock.h>
40 #include <linux/blkdev.h>
41 #include <linux/genhd.h>
42 #include <asm/uaccess.h>
46 #define SMART2_DRIVER_VERSION(maj,min,submin) ((maj<<16)|(min<<8)|(submin))
48 #define DRIVER_NAME "Compaq SMART2 Driver (v 2.6.0)"
49 #define DRIVER_VERSION SMART2_DRIVER_VERSION(2,6,0)
51 /* Embedded module documentation macros - see modules.h */
52 /* Original author Chris Frantz - Compaq Computer Corporation */
53 MODULE_AUTHOR("Compaq Computer Corporation");
54 MODULE_DESCRIPTION("Driver for Compaq Smart2 Array Controllers version 2.6.0");
55 MODULE_LICENSE("GPL");
60 #include "ida_ioctl.h"
62 #define READ_AHEAD 128
63 #define NR_CMDS 128 /* This could probably go as high as ~400 */
68 #define CPQARRAY_DMA_MASK 0xFFFFFFFF /* 32 bit DMA */
71 static ctlr_info_t *hba[MAX_CTLR];
75 #define NR_PRODUCTS (sizeof(products)/sizeof(struct board_type))
77 /* board_id = Subsystem Device ID & Vendor ID
78 * product = Marketing Name for the board
79 * access = Address of the struct of function pointers
81 static struct board_type products[] = {
82 { 0x0040110E, "IDA", &smart1_access },
83 { 0x0140110E, "IDA-2", &smart1_access },
84 { 0x1040110E, "IAES", &smart1_access },
85 { 0x2040110E, "SMART", &smart1_access },
86 { 0x3040110E, "SMART-2/E", &smart2e_access },
87 { 0x40300E11, "SMART-2/P", &smart2_access },
88 { 0x40310E11, "SMART-2SL", &smart2_access },
89 { 0x40320E11, "Smart Array 3200", &smart2_access },
90 { 0x40330E11, "Smart Array 3100ES", &smart2_access },
91 { 0x40340E11, "Smart Array 221", &smart2_access },
92 { 0x40400E11, "Integrated Array", &smart4_access },
93 { 0x40480E11, "Compaq Raid LC2", &smart4_access },
94 { 0x40500E11, "Smart Array 4200", &smart4_access },
95 { 0x40510E11, "Smart Array 4250ES", &smart4_access },
96 { 0x40580E11, "Smart Array 431", &smart4_access },
99 /* define the PCI info for the PCI cards this driver can control */
100 const struct pci_device_id cpqarray_pci_device_id[] =
102 { PCI_VENDOR_ID_DEC, PCI_DEVICE_ID_COMPAQ_42XX,
103 0x0E11, 0x4058, 0, 0, 0}, /* SA431 */
104 { PCI_VENDOR_ID_DEC, PCI_DEVICE_ID_COMPAQ_42XX,
105 0x0E11, 0x4051, 0, 0, 0}, /* SA4250ES */
106 { PCI_VENDOR_ID_DEC, PCI_DEVICE_ID_COMPAQ_42XX,
107 0x0E11, 0x4050, 0, 0, 0}, /* SA4200 */
108 { PCI_VENDOR_ID_NCR, PCI_DEVICE_ID_NCR_53C1510,
109 0x0E11, 0x4048, 0, 0, 0}, /* LC2 */
110 { PCI_VENDOR_ID_NCR, PCI_DEVICE_ID_NCR_53C1510,
111 0x0E11, 0x4040, 0, 0, 0}, /* Integrated Array */
112 { PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_SMART2P,
113 0x0E11, 0x4034, 0, 0, 0}, /* SA 221 */
114 { PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_SMART2P,
115 0x0E11, 0x4033, 0, 0, 0}, /* SA 3100ES*/
116 { PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_SMART2P,
117 0x0E11, 0x4032, 0, 0, 0}, /* SA 3200*/
118 { PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_SMART2P,
119 0x0E11, 0x4031, 0, 0, 0}, /* SA 2SL*/
120 { PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_SMART2P,
121 0x0E11, 0x4030, 0, 0, 0}, /* SA 2P */
125 MODULE_DEVICE_TABLE(pci, cpqarray_pci_device_id);
127 static struct gendisk *ida_gendisk[MAX_CTLR][NWD];
130 #define DBG(s) do { s } while(0)
131 /* Debug (general info)... */
132 #define DBGINFO(s) do { } while(0)
133 /* Debug Paranoid... */
134 #define DBGP(s) do { } while(0)
135 /* Debug Extra Paranoid... */
136 #define DBGPX(s) do { } while(0)
138 int cpqarray_init_step2(void);
139 static int cpqarray_pci_init(ctlr_info_t *c, struct pci_dev *pdev);
140 static void __iomem *remap_pci_mem(ulong base, ulong size);
141 static int cpqarray_eisa_detect(void);
142 static int pollcomplete(int ctlr);
143 static void getgeometry(int ctlr);
144 static void start_fwbk(int ctlr);
146 static cmdlist_t * cmd_alloc(ctlr_info_t *h, int get_from_pool);
147 static void cmd_free(ctlr_info_t *h, cmdlist_t *c, int got_from_pool);
149 static void free_hba(int i);
150 static int alloc_cpqarray_hba(void);
159 unsigned int log_unit );
161 static int ida_open(struct inode *inode, struct file *filep);
162 static int ida_release(struct inode *inode, struct file *filep);
163 static int ida_ioctl(struct inode *inode, struct file *filep, unsigned int cmd, unsigned long arg);
164 static int ida_ctlr_ioctl(ctlr_info_t *h, int dsk, ida_ioctl_t *io);
166 static void do_ida_request(request_queue_t *q);
167 static void start_io(ctlr_info_t *h);
169 static inline void addQ(cmdlist_t **Qptr, cmdlist_t *c);
170 static inline cmdlist_t *removeQ(cmdlist_t **Qptr, cmdlist_t *c);
171 static inline void complete_buffers(struct bio *bio, int ok);
172 static inline void complete_command(cmdlist_t *cmd, int timeout);
174 static irqreturn_t do_ida_intr(int irq, void *dev_id, struct pt_regs * regs);
175 static void ida_timer(unsigned long tdata);
176 static int ida_revalidate(struct gendisk *disk);
177 static int revalidate_allvol(ctlr_info_t *host);
178 static int cpqarray_register_ctlr(int ctlr, struct pci_dev *pdev);
180 #ifdef CONFIG_PROC_FS
181 static void ida_procinit(int i);
182 static int ida_proc_get_info(char *buffer, char **start, off_t offset, int length, int *eof, void *data);
184 static void ida_procinit(int i) {}
187 static inline drv_info_t *get_drv(struct gendisk *disk)
189 return disk->private_data;
192 static inline ctlr_info_t *get_host(struct gendisk *disk)
194 return disk->queue->queuedata;
198 static struct block_device_operations ida_fops = {
199 .owner = THIS_MODULE,
201 .release = ida_release,
203 .revalidate_disk= ida_revalidate,
207 #ifdef CONFIG_PROC_FS
209 static struct proc_dir_entry *proc_array;
212 * Get us a file in /proc/array that says something about each controller.
213 * Create /proc/array if it doesn't exist yet.
215 static void __init ida_procinit(int i)
217 if (proc_array == NULL) {
218 proc_array = proc_mkdir("cpqarray", proc_root_driver);
219 if (!proc_array) return;
222 create_proc_read_entry(hba[i]->devname, 0, proc_array,
223 ida_proc_get_info, hba[i]);
227 * Report information about this controller.
229 static int ida_proc_get_info(char *buffer, char **start, off_t offset, int length, int *eof, void *data)
234 ctlr_info_t *h = (ctlr_info_t*)data;
236 #ifdef CPQ_PROC_PRINT_QUEUES
242 size = sprintf(buffer, "%s: Compaq %s Controller\n"
243 " Board ID: 0x%08lx\n"
244 " Firmware Revision: %c%c%c%c\n"
245 " Controller Sig: 0x%08lx\n"
246 " Memory Address: 0x%08lx\n"
247 " I/O Port: 0x%04x\n"
249 " Logical drives: %d\n"
250 " Physical drives: %d\n\n"
251 " Current Q depth: %d\n"
252 " Max Q depth since init: %d\n\n",
255 (unsigned long)h->board_id,
256 h->firm_rev[0], h->firm_rev[1], h->firm_rev[2], h->firm_rev[3],
257 (unsigned long)h->ctlr_sig, (unsigned long)h->vaddr,
258 (unsigned int) h->io_mem_addr, (unsigned int)h->intr,
259 h->log_drives, h->phys_drives,
260 h->Qdepth, h->maxQsinceinit);
262 pos += size; len += size;
264 size = sprintf(buffer+len, "Logical Drive Info:\n");
265 pos += size; len += size;
267 for(i=0; i<h->log_drives; i++) {
269 size = sprintf(buffer+len, "ida/c%dd%d: blksz=%d nr_blks=%d\n",
270 ctlr, i, drv->blk_size, drv->nr_blks);
271 pos += size; len += size;
274 #ifdef CPQ_PROC_PRINT_QUEUES
275 spin_lock_irqsave(IDA_LOCK(h->ctlr), flags);
276 size = sprintf(buffer+len, "\nCurrent Queues:\n");
277 pos += size; len += size;
280 size = sprintf(buffer+len, "reqQ = %p", c); pos += size; len += size;
282 while(c && c != h->reqQ) {
283 size = sprintf(buffer+len, "->%p", c);
284 pos += size; len += size;
289 size = sprintf(buffer+len, "\ncmpQ = %p", c); pos += size; len += size;
291 while(c && c != h->cmpQ) {
292 size = sprintf(buffer+len, "->%p", c);
293 pos += size; len += size;
297 size = sprintf(buffer+len, "\n"); pos += size; len += size;
298 spin_unlock_irqrestore(IDA_LOCK(h->ctlr), flags);
300 size = sprintf(buffer+len, "nr_allocs = %d\nnr_frees = %d\n",
301 h->nr_allocs, h->nr_frees);
302 pos += size; len += size;
305 *start = buffer+offset;
311 #endif /* CONFIG_PROC_FS */
313 module_param_array(eisa, int, NULL, 0);
315 /* This is a bit of a hack,
316 * necessary to support both eisa and pci
318 int __init cpqarray_init(void)
320 return (cpqarray_init_step2());
323 static void release_io_mem(ctlr_info_t *c)
325 /* if IO mem was not protected do nothing */
326 if( c->io_mem_addr == 0)
328 release_region(c->io_mem_addr, c->io_mem_length);
330 c->io_mem_length = 0;
333 static void __devexit cpqarray_remove_one(int i)
338 /* sendcmd will turn off interrupt, and send the flush...
339 * To write all data in the battery backed cache to disks
340 * no data returned, but don't want to send NULL to sendcmd */
341 if( sendcmd(FLUSH_CACHE, i, buff, 4, 0, 0, 0))
343 printk(KERN_WARNING "Unable to flush cache on controller %d\n",
346 free_irq(hba[i]->intr, hba[i]);
347 iounmap(hba[i]->vaddr);
348 unregister_blkdev(COMPAQ_SMART2_MAJOR+i, hba[i]->devname);
349 del_timer(&hba[i]->timer);
350 remove_proc_entry(hba[i]->devname, proc_array);
351 pci_free_consistent(hba[i]->pci_dev,
352 NR_CMDS * sizeof(cmdlist_t), (hba[i]->cmd_pool),
353 hba[i]->cmd_pool_dhandle);
354 kfree(hba[i]->cmd_pool_bits);
355 for(j = 0; j < NWD; j++) {
356 if (ida_gendisk[i][j]->flags & GENHD_FL_UP)
357 del_gendisk(ida_gendisk[i][j]);
358 devfs_remove("ida/c%dd%d",i,j);
359 put_disk(ida_gendisk[i][j]);
361 blk_cleanup_queue(hba[i]->queue);
362 release_io_mem(hba[i]);
366 static void __devexit cpqarray_remove_one_pci (struct pci_dev *pdev)
369 ctlr_info_t *tmp_ptr;
371 if (pci_get_drvdata(pdev) == NULL) {
372 printk( KERN_ERR "cpqarray: Unable to remove device \n");
376 tmp_ptr = pci_get_drvdata(pdev);
378 if (hba[i] == NULL) {
379 printk(KERN_ERR "cpqarray: controller %d appears to have"
380 "already been removed \n", i);
383 pci_set_drvdata(pdev, NULL);
385 cpqarray_remove_one(i);
388 /* removing an instance that was not removed automatically..
389 * must be an eisa card.
391 static void __devexit cpqarray_remove_one_eisa (int i)
393 if (hba[i] == NULL) {
394 printk(KERN_ERR "cpqarray: controller %d appears to have"
395 "already been removed \n", i);
398 cpqarray_remove_one(i);
401 /* pdev is NULL for eisa */
402 static int cpqarray_register_ctlr( int i, struct pci_dev *pdev)
408 * register block devices
409 * Find disks and fill in structs
410 * Get an interrupt, set the Q depth and get into /proc
413 /* If this successful it should insure that we are the only */
414 /* instance of the driver */
415 if (register_blkdev(COMPAQ_SMART2_MAJOR+i, hba[i]->devname)) {
418 hba[i]->access.set_intr_mask(hba[i], 0);
419 if (request_irq(hba[i]->intr, do_ida_intr,
420 SA_INTERRUPT|SA_SHIRQ|SA_SAMPLE_RANDOM,
421 hba[i]->devname, hba[i]))
423 printk(KERN_ERR "cpqarray: Unable to get irq %d for %s\n",
424 hba[i]->intr, hba[i]->devname);
428 for (j=0; j<NWD; j++) {
429 ida_gendisk[i][j] = alloc_disk(1 << NWD_SHIFT);
430 if (!ida_gendisk[i][j])
434 hba[i]->cmd_pool = (cmdlist_t *)pci_alloc_consistent(
435 hba[i]->pci_dev, NR_CMDS * sizeof(cmdlist_t),
436 &(hba[i]->cmd_pool_dhandle));
437 hba[i]->cmd_pool_bits = kmalloc(
438 ((NR_CMDS+BITS_PER_LONG-1)/BITS_PER_LONG)*sizeof(unsigned long),
441 if (!hba[i]->cmd_pool_bits || !hba[i]->cmd_pool)
444 memset(hba[i]->cmd_pool, 0, NR_CMDS * sizeof(cmdlist_t));
445 memset(hba[i]->cmd_pool_bits, 0, ((NR_CMDS+BITS_PER_LONG-1)/BITS_PER_LONG)*sizeof(unsigned long));
446 printk(KERN_INFO "cpqarray: Finding drives on %s",
449 spin_lock_init(&hba[i]->lock);
450 q = blk_init_queue(do_ida_request, &hba[i]->lock);
455 q->queuedata = hba[i];
463 blk_queue_bounce_limit(q, hba[i]->pci_dev->dma_mask);
465 /* This is a hardware imposed limit. */
466 blk_queue_max_hw_segments(q, SG_MAX);
468 /* This is a driver limit and could be eliminated. */
469 blk_queue_max_phys_segments(q, SG_MAX);
471 init_timer(&hba[i]->timer);
472 hba[i]->timer.expires = jiffies + IDA_TIMER;
473 hba[i]->timer.data = (unsigned long)hba[i];
474 hba[i]->timer.function = ida_timer;
475 add_timer(&hba[i]->timer);
477 /* Enable IRQ now that spinlock and rate limit timer are set up */
478 hba[i]->access.set_intr_mask(hba[i], FIFO_NOT_EMPTY);
480 for(j=0; j<NWD; j++) {
481 struct gendisk *disk = ida_gendisk[i][j];
482 drv_info_t *drv = &hba[i]->drv[j];
483 sprintf(disk->disk_name, "ida/c%dd%d", i, j);
484 disk->major = COMPAQ_SMART2_MAJOR + i;
485 disk->first_minor = j<<NWD_SHIFT;
486 disk->fops = &ida_fops;
487 if (j && !drv->nr_blks)
489 blk_queue_hardsect_size(hba[i]->queue, drv->blk_size);
490 set_capacity(disk, drv->nr_blks);
491 disk->queue = hba[i]->queue;
492 disk->private_data = drv;
501 kfree(hba[i]->cmd_pool_bits);
502 if (hba[i]->cmd_pool)
503 pci_free_consistent(hba[i]->pci_dev, NR_CMDS*sizeof(cmdlist_t),
504 hba[i]->cmd_pool, hba[i]->cmd_pool_dhandle);
507 put_disk(ida_gendisk[i][j]);
508 ida_gendisk[i][j] = NULL;
510 free_irq(hba[i]->intr, hba[i]);
512 unregister_blkdev(COMPAQ_SMART2_MAJOR+i, hba[i]->devname);
515 pci_set_drvdata(pdev, NULL);
516 release_io_mem(hba[i]);
519 printk( KERN_ERR "cpqarray: out of memory");
524 static int __init cpqarray_init_one( struct pci_dev *pdev,
525 const struct pci_device_id *ent)
529 printk(KERN_DEBUG "cpqarray: Device 0x%x has been found at"
530 " bus %d dev %d func %d\n",
531 pdev->device, pdev->bus->number, PCI_SLOT(pdev->devfn),
532 PCI_FUNC(pdev->devfn));
533 i = alloc_cpqarray_hba();
536 memset(hba[i], 0, sizeof(ctlr_info_t));
537 sprintf(hba[i]->devname, "ida%d", i);
539 /* Initialize the pdev driver private data */
540 pci_set_drvdata(pdev, hba[i]);
542 if (cpqarray_pci_init(hba[i], pdev) != 0) {
543 pci_set_drvdata(pdev, NULL);
544 release_io_mem(hba[i]);
549 return (cpqarray_register_ctlr(i, pdev));
552 static struct pci_driver cpqarray_pci_driver = {
554 .probe = cpqarray_init_one,
555 .remove = __devexit_p(cpqarray_remove_one_pci),
556 .id_table = cpqarray_pci_device_id,
560 * This is it. Find all the controllers and register them.
561 * returns the number of block devices registered.
563 int __init cpqarray_init_step2(void)
565 int num_cntlrs_reg = 0;
569 /* detect controllers */
570 printk(DRIVER_NAME "\n");
572 rc = pci_register_driver(&cpqarray_pci_driver);
575 cpqarray_eisa_detect();
577 for (i=0; i < MAX_CTLR; i++) {
582 return(num_cntlrs_reg);
585 /* Function to find the first free pointer into our hba[] array */
586 /* Returns -1 if no free entries are left. */
587 static int alloc_cpqarray_hba(void)
591 for(i=0; i< MAX_CTLR; i++) {
592 if (hba[i] == NULL) {
593 hba[i] = kmalloc(sizeof(ctlr_info_t), GFP_KERNEL);
595 printk(KERN_ERR "cpqarray: out of memory.\n");
601 printk(KERN_WARNING "cpqarray: This driver supports a maximum"
602 " of 8 controllers.\n");
606 static void free_hba(int i)
613 * Find the IO address of the controller, its IRQ and so forth. Fill
614 * in some basic stuff into the ctlr_info_t structure.
616 static int cpqarray_pci_init(ctlr_info_t *c, struct pci_dev *pdev)
618 ushort vendor_id, device_id, command;
619 unchar cache_line_size, latency_timer;
620 unchar irq, revision;
621 unsigned long addr[6];
627 if (pci_enable_device(pdev)) {
628 printk(KERN_ERR "cpqarray: Unable to Enable PCI device\n");
631 vendor_id = pdev->vendor;
632 device_id = pdev->device;
636 addr[i] = pci_resource_start(pdev, i);
638 if (pci_set_dma_mask(pdev, CPQARRAY_DMA_MASK) != 0)
640 printk(KERN_ERR "cpqarray: Unable to set DMA mask\n");
644 pci_read_config_word(pdev, PCI_COMMAND, &command);
645 pci_read_config_byte(pdev, PCI_CLASS_REVISION, &revision);
646 pci_read_config_byte(pdev, PCI_CACHE_LINE_SIZE, &cache_line_size);
647 pci_read_config_byte(pdev, PCI_LATENCY_TIMER, &latency_timer);
649 pci_read_config_dword(pdev, 0x2c, &board_id);
651 /* check to see if controller has been disabled */
652 if(!(command & 0x02)) {
654 "cpqarray: controller appears to be disabled\n");
659 printk("vendor_id = %x\n", vendor_id);
660 printk("device_id = %x\n", device_id);
661 printk("command = %x\n", command);
663 printk("addr[%d] = %lx\n", i, addr[i]);
664 printk("revision = %x\n", revision);
665 printk("irq = %x\n", irq);
666 printk("cache_line_size = %x\n", cache_line_size);
667 printk("latency_timer = %x\n", latency_timer);
668 printk("board_id = %x\n", board_id);
674 if (pci_resource_flags(pdev, i) & PCI_BASE_ADDRESS_SPACE_IO)
676 c->io_mem_addr = addr[i];
677 c->io_mem_length = pci_resource_end(pdev, i)
678 - pci_resource_start(pdev, i) + 1;
679 if(!request_region( c->io_mem_addr, c->io_mem_length,
682 printk( KERN_WARNING "cpqarray I/O memory range already in use addr %lx length = %ld\n", c->io_mem_addr, c->io_mem_length);
684 c->io_mem_length = 0;
692 if (!(pci_resource_flags(pdev, i) &
693 PCI_BASE_ADDRESS_SPACE_IO)) {
694 c->paddr = pci_resource_start (pdev, i);
699 c->vaddr = remap_pci_mem(c->paddr, 128);
702 c->board_id = board_id;
704 for(i=0; i<NR_PRODUCTS; i++) {
705 if (board_id == products[i].board_id) {
706 c->product_name = products[i].product_name;
707 c->access = *(products[i].access);
711 if (i == NR_PRODUCTS) {
712 printk(KERN_WARNING "cpqarray: Sorry, I don't know how"
713 " to access the SMART Array controller %08lx\n",
714 (unsigned long)board_id);
722 * Map (physical) PCI mem into (virtual) kernel space
724 static void __iomem *remap_pci_mem(ulong base, ulong size)
726 ulong page_base = ((ulong) base) & PAGE_MASK;
727 ulong page_offs = ((ulong) base) - page_base;
728 void __iomem *page_remapped = ioremap(page_base, page_offs+size);
730 return (page_remapped ? (page_remapped + page_offs) : NULL);
735 * Config string is a comma separated set of i/o addresses of EISA cards.
737 static int cpqarray_setup(char *str)
741 (void)get_options(str, ARRAY_SIZE(ints), ints);
743 for(i=0; i<ints[0] && i<8; i++)
748 __setup("smart2=", cpqarray_setup);
753 * Find an EISA controller's signature. Set up an hba if we find it.
755 static int cpqarray_eisa_detect(void)
763 while(i<8 && eisa[i]) {
764 ctlr = alloc_cpqarray_hba();
767 board_id = inl(eisa[i]+0xC80);
768 for(j=0; j < NR_PRODUCTS; j++)
769 if (board_id == products[j].board_id)
772 if (j == NR_PRODUCTS) {
773 printk(KERN_WARNING "cpqarray: Sorry, I don't know how"
774 " to access the SMART Array controller %08lx\n", (unsigned long)board_id);
778 memset(hba[ctlr], 0, sizeof(ctlr_info_t));
779 hba[ctlr]->io_mem_addr = eisa[i];
780 hba[ctlr]->io_mem_length = 0x7FF;
781 if(!request_region(hba[ctlr]->io_mem_addr,
782 hba[ctlr]->io_mem_length,
785 printk(KERN_WARNING "cpqarray: I/O range already in "
786 "use addr = %lx length = %ld\n",
787 hba[ctlr]->io_mem_addr,
788 hba[ctlr]->io_mem_length);
794 * Read the config register to find our interrupt
796 intr = inb(eisa[i]+0xCC0) >> 4;
797 if (intr & 1) intr = 11;
798 else if (intr & 2) intr = 10;
799 else if (intr & 4) intr = 14;
800 else if (intr & 8) intr = 15;
802 hba[ctlr]->intr = intr;
803 sprintf(hba[ctlr]->devname, "ida%d", nr_ctlr);
804 hba[ctlr]->product_name = products[j].product_name;
805 hba[ctlr]->access = *(products[j].access);
806 hba[ctlr]->ctlr = ctlr;
807 hba[ctlr]->board_id = board_id;
808 hba[ctlr]->pci_dev = NULL; /* not PCI */
811 printk("i = %d, j = %d\n", i, j);
812 printk("irq = %x\n", intr);
813 printk("product name = %s\n", products[j].product_name);
814 printk("board_id = %x\n", board_id);
820 if (cpqarray_register_ctlr(ctlr, NULL) == -1)
822 "cpqarray: Can't register EISA controller %d\n",
831 * Open. Make sure the device is really there.
833 static int ida_open(struct inode *inode, struct file *filep)
835 drv_info_t *drv = get_drv(inode->i_bdev->bd_disk);
836 ctlr_info_t *host = get_host(inode->i_bdev->bd_disk);
838 DBGINFO(printk("ida_open %s\n", inode->i_bdev->bd_disk->disk_name));
840 * Root is allowed to open raw volume zero even if it's not configured
841 * so array config can still work. I don't think I really like this,
842 * but I'm already using way to many device nodes to claim another one
843 * for "raw controller".
846 if (!capable(CAP_SYS_RAWIO))
848 if (!capable(CAP_SYS_ADMIN) && drv != host->drv)
858 static int ida_release(struct inode *inode, struct file *filep)
860 ctlr_info_t *host = get_host(inode->i_bdev->bd_disk);
866 * Enqueuing and dequeuing functions for cmdlists.
868 static inline void addQ(cmdlist_t **Qptr, cmdlist_t *c)
872 c->next = c->prev = c;
874 c->prev = (*Qptr)->prev;
876 (*Qptr)->prev->next = c;
881 static inline cmdlist_t *removeQ(cmdlist_t **Qptr, cmdlist_t *c)
883 if (c && c->next != c) {
884 if (*Qptr == c) *Qptr = c->next;
885 c->prev->next = c->next;
886 c->next->prev = c->prev;
894 * Get a request and submit it to the controller.
895 * This routine needs to grab all the requests it possibly can from the
896 * req Q and submit them. Interrupts are off (and need to be off) when you
897 * are in here (either via the dummy do_ida_request functions or by being
898 * called from the interrupt handler
900 static void do_ida_request(request_queue_t *q)
902 ctlr_info_t *h = q->queuedata;
904 struct request *creq;
905 struct scatterlist tmp_sg[SG_MAX];
908 if (blk_queue_plugged(q))
912 creq = elv_next_request(q);
916 if (creq->nr_phys_segments > SG_MAX)
919 if ((c = cmd_alloc(h,1)) == NULL)
922 blkdev_dequeue_request(creq);
925 c->hdr.unit = (drv_info_t *)(creq->rq_disk->private_data) - h->drv;
926 c->hdr.size = sizeof(rblk_t) >> 2;
927 c->size += sizeof(rblk_t);
929 c->req.hdr.blk = creq->sector;
932 printk("sector=%d, nr_sectors=%d\n", creq->sector, creq->nr_sectors);
934 seg = blk_rq_map_sg(q, creq, tmp_sg);
936 /* Now do all the DMA Mappings */
937 if (rq_data_dir(creq) == READ)
938 dir = PCI_DMA_FROMDEVICE;
940 dir = PCI_DMA_TODEVICE;
941 for( i=0; i < seg; i++)
943 c->req.sg[i].size = tmp_sg[i].length;
944 c->req.sg[i].addr = (__u32) pci_map_page(h->pci_dev,
947 tmp_sg[i].length, dir);
949 DBGPX( printk("Submitting %d sectors in %d segments\n", creq->nr_sectors, seg); );
950 c->req.hdr.sg_cnt = seg;
951 c->req.hdr.blk_cnt = creq->nr_sectors;
952 c->req.hdr.cmd = (rq_data_dir(creq) == READ) ? IDA_READ : IDA_WRITE;
955 /* Put the request on the tail of the request queue */
958 if (h->Qdepth > h->maxQsinceinit)
959 h->maxQsinceinit = h->Qdepth;
968 * start_io submits everything on a controller's request queue
969 * and moves it to the completion queue.
971 * Interrupts had better be off if you're in here
973 static void start_io(ctlr_info_t *h)
977 while((c = h->reqQ) != NULL) {
978 /* Can't do anything if we're busy */
979 if (h->access.fifo_full(h) == 0)
982 /* Get the first entry from the request Q */
983 removeQ(&h->reqQ, c);
986 /* Tell the controller to do our bidding */
987 h->access.submit_command(h, c);
989 /* Get onto the completion Q */
994 static inline void complete_buffers(struct bio *bio, int ok)
998 int nr_sectors = bio_sectors(bio);
1001 bio->bi_next = NULL;
1003 blk_finished_io(nr_sectors);
1004 bio_endio(bio, nr_sectors << 9, ok ? 0 : -EIO);
1010 * Mark all buffers that cmd was responsible for
1012 static inline void complete_command(cmdlist_t *cmd, int timeout)
1017 if (cmd->req.hdr.rcode & RCODE_NONFATAL &&
1018 (hba[cmd->ctlr]->misc_tflags & MISC_NONFATAL_WARN) == 0) {
1019 printk(KERN_NOTICE "Non Fatal error on ida/c%dd%d\n",
1020 cmd->ctlr, cmd->hdr.unit);
1021 hba[cmd->ctlr]->misc_tflags |= MISC_NONFATAL_WARN;
1023 if (cmd->req.hdr.rcode & RCODE_FATAL) {
1024 printk(KERN_WARNING "Fatal error on ida/c%dd%d\n",
1025 cmd->ctlr, cmd->hdr.unit);
1028 if (cmd->req.hdr.rcode & RCODE_INVREQ) {
1029 printk(KERN_WARNING "Invalid request on ida/c%dd%d = (cmd=%x sect=%d cnt=%d sg=%d ret=%x)\n",
1030 cmd->ctlr, cmd->hdr.unit, cmd->req.hdr.cmd,
1031 cmd->req.hdr.blk, cmd->req.hdr.blk_cnt,
1032 cmd->req.hdr.sg_cnt, cmd->req.hdr.rcode);
1035 if (timeout) ok = 0;
1036 /* unmap the DMA mapping for all the scatter gather elements */
1037 if (cmd->req.hdr.cmd == IDA_READ)
1038 ddir = PCI_DMA_FROMDEVICE;
1040 ddir = PCI_DMA_TODEVICE;
1041 for(i=0; i<cmd->req.hdr.sg_cnt; i++)
1042 pci_unmap_page(hba[cmd->ctlr]->pci_dev, cmd->req.sg[i].addr,
1043 cmd->req.sg[i].size, ddir);
1045 complete_buffers(cmd->rq->bio, ok);
1047 DBGPX(printk("Done with %p\n", cmd->rq););
1048 end_that_request_last(cmd->rq);
1052 * The controller will interrupt us upon completion of commands.
1053 * Find the command on the completion queue, remove it, tell the OS and
1054 * try to queue up more IO
1056 static irqreturn_t do_ida_intr(int irq, void *dev_id, struct pt_regs *regs)
1058 ctlr_info_t *h = dev_id;
1060 unsigned long istat;
1061 unsigned long flags;
1064 istat = h->access.intr_pending(h);
1065 /* Is this interrupt for us? */
1070 * If there are completed commands in the completion queue,
1071 * we had better do something about it.
1073 spin_lock_irqsave(IDA_LOCK(h->ctlr), flags);
1074 if (istat & FIFO_NOT_EMPTY) {
1075 while((a = h->access.command_completed(h))) {
1077 if ((c = h->cmpQ) == NULL)
1079 printk(KERN_WARNING "cpqarray: Completion of %08lx ignored\n", (unsigned long)a1);
1082 while(c->busaddr != a) {
1088 * If we've found the command, take it off the
1089 * completion Q and free it
1091 if (c->busaddr == a) {
1092 removeQ(&h->cmpQ, c);
1093 /* Check for invalid command.
1094 * Controller returns command error,
1098 if((a1 & 0x03) && (c->req.hdr.rcode == 0))
1100 c->req.hdr.rcode = RCODE_INVREQ;
1102 if (c->type == CMD_RWREQ) {
1103 complete_command(c, 0);
1105 } else if (c->type == CMD_IOCTL_PEND) {
1106 c->type = CMD_IOCTL_DONE;
1114 * See if we can queue up some more IO
1116 do_ida_request(h->queue);
1117 spin_unlock_irqrestore(IDA_LOCK(h->ctlr), flags);
1122 * This timer was for timing out requests that haven't happened after
1123 * IDA_TIMEOUT. That wasn't such a good idea. This timer is used to
1124 * reset a flags structure so we don't flood the user with
1125 * "Non-Fatal error" messages.
1127 static void ida_timer(unsigned long tdata)
1129 ctlr_info_t *h = (ctlr_info_t*)tdata;
1131 h->timer.expires = jiffies + IDA_TIMER;
1132 add_timer(&h->timer);
1137 * ida_ioctl does some miscellaneous stuff like reporting drive geometry,
1138 * setting readahead and submitting commands from userspace to the controller.
1140 static int ida_ioctl(struct inode *inode, struct file *filep, unsigned int cmd, unsigned long arg)
1142 drv_info_t *drv = get_drv(inode->i_bdev->bd_disk);
1143 ctlr_info_t *host = get_host(inode->i_bdev->bd_disk);
1146 struct hd_geometry __user *geo = (struct hd_geometry __user *)arg;
1147 ida_ioctl_t __user *io = (ida_ioctl_t __user *)arg;
1152 if (drv->cylinders) {
1153 diskinfo[0] = drv->heads;
1154 diskinfo[1] = drv->sectors;
1155 diskinfo[2] = drv->cylinders;
1159 diskinfo[2] = drv->nr_blks / (0xff*0x3f);
1161 put_user(diskinfo[0], &geo->heads);
1162 put_user(diskinfo[1], &geo->sectors);
1163 put_user(diskinfo[2], &geo->cylinders);
1164 put_user(get_start_sect(inode->i_bdev), &geo->start);
1167 if (copy_to_user(&io->c.drv, drv, sizeof(drv_info_t)))
1171 if (!capable(CAP_SYS_RAWIO))
1173 my_io = kmalloc(sizeof(ida_ioctl_t), GFP_KERNEL);
1177 if (copy_from_user(my_io, io, sizeof(*my_io)))
1179 error = ida_ctlr_ioctl(host, drv - host->drv, my_io);
1183 if (copy_to_user(io, my_io, sizeof(*my_io)))
1190 if (!arg) return -EINVAL;
1191 put_user(host->ctlr_sig, (int __user *)arg);
1193 case IDAREVALIDATEVOLS:
1194 if (iminor(inode) != 0)
1196 return revalidate_allvol(host);
1197 case IDADRIVERVERSION:
1198 if (!arg) return -EINVAL;
1199 put_user(DRIVER_VERSION, (unsigned long __user *)arg);
1204 ida_pci_info_struct pciinfo;
1206 if (!arg) return -EINVAL;
1207 pciinfo.bus = host->pci_dev->bus->number;
1208 pciinfo.dev_fn = host->pci_dev->devfn;
1209 pciinfo.board_id = host->board_id;
1210 if(copy_to_user((void __user *) arg, &pciinfo,
1211 sizeof( ida_pci_info_struct)))
1222 * ida_ctlr_ioctl is for passing commands to the controller from userspace.
1223 * The command block (io) has already been copied to kernel space for us,
1224 * however, any elements in the sglist need to be copied to kernel space
1225 * or copied back to userspace.
1227 * Only root may perform a controller passthru command, however I'm not doing
1228 * any serious sanity checking on the arguments. Doing an IDA_WRITE_MEDIA and
1229 * putting a 64M buffer in the sglist is probably a *bad* idea.
1231 static int ida_ctlr_ioctl(ctlr_info_t *h, int dsk, ida_ioctl_t *io)
1236 unsigned long flags;
1239 if ((c = cmd_alloc(h, 0)) == NULL)
1242 c->hdr.unit = (io->unit & UNITVALID) ? (io->unit & ~UNITVALID) : dsk;
1243 c->hdr.size = sizeof(rblk_t) >> 2;
1244 c->size += sizeof(rblk_t);
1246 c->req.hdr.cmd = io->cmd;
1247 c->req.hdr.blk = io->blk;
1248 c->req.hdr.blk_cnt = io->blk_cnt;
1249 c->type = CMD_IOCTL_PEND;
1251 /* Pre submit processing */
1254 p = kmalloc(io->sg[0].size, GFP_KERNEL);
1261 if (copy_from_user(p, io->sg[0].addr, io->sg[0].size)) {
1266 c->req.hdr.blk = pci_map_single(h->pci_dev, &(io->c),
1267 sizeof(ida_ioctl_t),
1268 PCI_DMA_BIDIRECTIONAL);
1269 c->req.sg[0].size = io->sg[0].size;
1270 c->req.sg[0].addr = pci_map_single(h->pci_dev, p,
1271 c->req.sg[0].size, PCI_DMA_BIDIRECTIONAL);
1272 c->req.hdr.sg_cnt = 1;
1275 case READ_FLASH_ROM:
1276 case SENSE_CONTROLLER_PERFORMANCE:
1277 p = kmalloc(io->sg[0].size, GFP_KERNEL);
1285 c->req.sg[0].size = io->sg[0].size;
1286 c->req.sg[0].addr = pci_map_single(h->pci_dev, p,
1287 c->req.sg[0].size, PCI_DMA_BIDIRECTIONAL);
1288 c->req.hdr.sg_cnt = 1;
1291 case IDA_WRITE_MEDIA:
1292 case DIAG_PASS_THRU:
1293 case COLLECT_BUFFER:
1294 case WRITE_FLASH_ROM:
1295 p = kmalloc(io->sg[0].size, GFP_KERNEL);
1302 if (copy_from_user(p, io->sg[0].addr, io->sg[0].size)) {
1307 c->req.sg[0].size = io->sg[0].size;
1308 c->req.sg[0].addr = pci_map_single(h->pci_dev, p,
1309 c->req.sg[0].size, PCI_DMA_BIDIRECTIONAL);
1310 c->req.hdr.sg_cnt = 1;
1313 c->req.sg[0].size = sizeof(io->c);
1314 c->req.sg[0].addr = pci_map_single(h->pci_dev,&io->c,
1315 c->req.sg[0].size, PCI_DMA_BIDIRECTIONAL);
1316 c->req.hdr.sg_cnt = 1;
1319 /* Put the request on the tail of the request queue */
1320 spin_lock_irqsave(IDA_LOCK(ctlr), flags);
1324 spin_unlock_irqrestore(IDA_LOCK(ctlr), flags);
1326 /* Wait for completion */
1327 while(c->type != CMD_IOCTL_DONE)
1331 pci_unmap_single(h->pci_dev, c->req.sg[0].addr, c->req.sg[0].size,
1332 PCI_DMA_BIDIRECTIONAL);
1333 /* Post submit processing */
1336 pci_unmap_single(h->pci_dev, c->req.hdr.blk,
1337 sizeof(ida_ioctl_t),
1338 PCI_DMA_BIDIRECTIONAL);
1340 case DIAG_PASS_THRU:
1341 case SENSE_CONTROLLER_PERFORMANCE:
1342 case READ_FLASH_ROM:
1343 if (copy_to_user(io->sg[0].addr, p, io->sg[0].size)) {
1347 /* fall through and free p */
1349 case IDA_WRITE_MEDIA:
1350 case COLLECT_BUFFER:
1351 case WRITE_FLASH_ROM:
1358 io->rcode = c->req.hdr.rcode;
1364 * Commands are pre-allocated in a large block. Here we use a simple bitmap
1365 * scheme to suballocte them to the driver. Operations that are not time
1366 * critical (and can wait for kmalloc and possibly sleep) can pass in NULL
1367 * as the first argument to get a new command.
1369 static cmdlist_t * cmd_alloc(ctlr_info_t *h, int get_from_pool)
1373 dma_addr_t cmd_dhandle;
1375 if (!get_from_pool) {
1376 c = (cmdlist_t*)pci_alloc_consistent(h->pci_dev,
1377 sizeof(cmdlist_t), &cmd_dhandle);
1382 i = find_first_zero_bit(h->cmd_pool_bits, NR_CMDS);
1385 } while(test_and_set_bit(i&(BITS_PER_LONG-1), h->cmd_pool_bits+(i/BITS_PER_LONG)) != 0);
1386 c = h->cmd_pool + i;
1387 cmd_dhandle = h->cmd_pool_dhandle + i*sizeof(cmdlist_t);
1391 memset(c, 0, sizeof(cmdlist_t));
1392 c->busaddr = cmd_dhandle;
1396 static void cmd_free(ctlr_info_t *h, cmdlist_t *c, int got_from_pool)
1400 if (!got_from_pool) {
1401 pci_free_consistent(h->pci_dev, sizeof(cmdlist_t), c,
1404 i = c - h->cmd_pool;
1405 clear_bit(i&(BITS_PER_LONG-1), h->cmd_pool_bits+(i/BITS_PER_LONG));
1410 /***********************************************************************
1412 Send a command to an IDA using the memory mapped FIFO interface
1413 and wait for it to complete.
1414 This routine should only be called at init time.
1415 ***********************************************************************/
1422 unsigned int blkcnt,
1423 unsigned int log_unit )
1429 ctlr_info_t *info_p = hba[ctlr];
1431 c = cmd_alloc(info_p, 1);
1435 c->hdr.unit = log_unit;
1437 c->hdr.size = sizeof(rblk_t) >> 2;
1438 c->size += sizeof(rblk_t);
1440 /* The request information. */
1441 c->req.hdr.next = 0;
1442 c->req.hdr.rcode = 0;
1444 c->req.hdr.sg_cnt = 1;
1445 c->req.hdr.reserved = 0;
1448 c->req.sg[0].size = 512;
1450 c->req.sg[0].size = size;
1452 c->req.hdr.blk = blk;
1453 c->req.hdr.blk_cnt = blkcnt;
1454 c->req.hdr.cmd = (unsigned char) cmd;
1455 c->req.sg[0].addr = (__u32) pci_map_single(info_p->pci_dev,
1456 buff, c->req.sg[0].size, PCI_DMA_BIDIRECTIONAL);
1460 info_p->access.set_intr_mask(info_p, 0);
1461 /* Make sure there is room in the command FIFO */
1462 /* Actually it should be completely empty at this time. */
1463 for (i = 200000; i > 0; i--) {
1464 temp = info_p->access.fifo_full(info_p);
1470 printk(KERN_WARNING "cpqarray ida%d: idaSendPciCmd FIFO full,"
1471 " waiting!\n", ctlr);
1477 info_p->access.submit_command(info_p, c);
1478 complete = pollcomplete(ctlr);
1480 pci_unmap_single(info_p->pci_dev, (dma_addr_t) c->req.sg[0].addr,
1481 c->req.sg[0].size, PCI_DMA_BIDIRECTIONAL);
1482 if (complete != 1) {
1483 if (complete != c->busaddr) {
1484 printk( KERN_WARNING
1485 "cpqarray ida%d: idaSendPciCmd "
1486 "Invalid command list address returned! (%08lx)\n",
1487 ctlr, (unsigned long)complete);
1488 cmd_free(info_p, c, 1);
1492 printk( KERN_WARNING
1493 "cpqarray ida%d: idaSendPciCmd Timeout out, "
1494 "No command list address returned!\n",
1496 cmd_free(info_p, c, 1);
1500 if (c->req.hdr.rcode & 0x00FE) {
1501 if (!(c->req.hdr.rcode & BIG_PROBLEM)) {
1502 printk( KERN_WARNING
1503 "cpqarray ida%d: idaSendPciCmd, error: "
1504 "Controller failed at init time "
1505 "cmd: 0x%x, return code = 0x%x\n",
1506 ctlr, c->req.hdr.cmd, c->req.hdr.rcode);
1508 cmd_free(info_p, c, 1);
1512 cmd_free(info_p, c, 1);
1517 * revalidate_allvol is for online array config utilities. After a
1518 * utility reconfigures the drives in the array, it can use this function
1519 * (through an ioctl) to make the driver zap any previous disk structs for
1520 * that controller and get new ones.
1522 * Right now I'm using the getgeometry() function to do this, but this
1523 * function should probably be finer grained and allow you to revalidate one
1524 * particualar logical volume (instead of all of them on a particular
1527 static int revalidate_allvol(ctlr_info_t *host)
1529 int ctlr = host->ctlr;
1531 unsigned long flags;
1533 spin_lock_irqsave(IDA_LOCK(ctlr), flags);
1534 if (host->usage_count > 1) {
1535 spin_unlock_irqrestore(IDA_LOCK(ctlr), flags);
1536 printk(KERN_WARNING "cpqarray: Device busy for volume"
1537 " revalidation (usage=%d)\n", host->usage_count);
1540 host->usage_count++;
1541 spin_unlock_irqrestore(IDA_LOCK(ctlr), flags);
1544 * Set the partition and block size structures for all volumes
1545 * on this controller to zero. We will reread all of this data
1547 set_capacity(ida_gendisk[ctlr][0], 0);
1548 for (i = 1; i < NWD; i++) {
1549 struct gendisk *disk = ida_gendisk[ctlr][i];
1550 if (disk->flags & GENHD_FL_UP)
1553 memset(host->drv, 0, sizeof(drv_info_t)*NWD);
1556 * Tell the array controller not to give us any interrupts while
1557 * we check the new geometry. Then turn interrupts back on when
1560 host->access.set_intr_mask(host, 0);
1562 host->access.set_intr_mask(host, FIFO_NOT_EMPTY);
1564 for(i=0; i<NWD; i++) {
1565 struct gendisk *disk = ida_gendisk[ctlr][i];
1566 drv_info_t *drv = &host->drv[i];
1567 if (i && !drv->nr_blks)
1569 blk_queue_hardsect_size(host->queue, drv->blk_size);
1570 set_capacity(disk, drv->nr_blks);
1571 disk->queue = host->queue;
1572 disk->private_data = drv;
1577 host->usage_count--;
1581 static int ida_revalidate(struct gendisk *disk)
1583 drv_info_t *drv = disk->private_data;
1584 set_capacity(disk, drv->nr_blks);
1588 /********************************************************************
1590 Wait polling for a command to complete.
1591 The memory mapped FIFO is polled for the completion.
1592 Used only at init time, interrupts disabled.
1593 ********************************************************************/
1594 static int pollcomplete(int ctlr)
1599 /* Wait (up to 2 seconds) for a command to complete */
1601 for (i = 200000; i > 0; i--) {
1602 done = hba[ctlr]->access.command_completed(hba[ctlr]);
1604 udelay(10); /* a short fixed delay */
1608 /* Invalid address to tell caller we ran out of time */
1611 /*****************************************************************
1613 Starts controller firmwares background processing.
1614 Currently only the Integrated Raid controller needs this done.
1615 If the PCI mem address registers are written to after this,
1616 data corruption may occur
1617 *****************************************************************/
1618 static void start_fwbk(int ctlr)
1620 id_ctlr_t *id_ctlr_buf;
1623 if( (hba[ctlr]->board_id != 0x40400E11)
1624 && (hba[ctlr]->board_id != 0x40480E11) )
1626 /* Not a Integrated Raid, so there is nothing for us to do */
1628 printk(KERN_DEBUG "cpqarray: Starting firmware's background"
1630 /* Command does not return anything, but idasend command needs a
1632 id_ctlr_buf = (id_ctlr_t *)kmalloc(sizeof(id_ctlr_t), GFP_KERNEL);
1633 if(id_ctlr_buf==NULL)
1635 printk(KERN_WARNING "cpqarray: Out of memory. "
1636 "Unable to start background processing.\n");
1639 ret_code = sendcmd(RESUME_BACKGROUND_ACTIVITY, ctlr,
1640 id_ctlr_buf, 0, 0, 0, 0);
1641 if(ret_code != IO_OK)
1642 printk(KERN_WARNING "cpqarray: Unable to start"
1643 " background processing\n");
1647 /*****************************************************************
1649 Get ida logical volume geometry from the controller
1650 This is a large bit of code which once existed in two flavors,
1651 It is used only at init time.
1652 *****************************************************************/
1653 static void getgeometry(int ctlr)
1655 id_log_drv_t *id_ldrive;
1656 id_ctlr_t *id_ctlr_buf;
1657 sense_log_drv_stat_t *id_lstatus_buf;
1658 config_t *sense_config_buf;
1659 unsigned int log_unit, log_index;
1662 ctlr_info_t *info_p = hba[ctlr];
1665 info_p->log_drv_map = 0;
1667 id_ldrive = (id_log_drv_t *)kmalloc(sizeof(id_log_drv_t), GFP_KERNEL);
1668 if(id_ldrive == NULL)
1670 printk( KERN_ERR "cpqarray: out of memory.\n");
1674 id_ctlr_buf = (id_ctlr_t *)kmalloc(sizeof(id_ctlr_t), GFP_KERNEL);
1675 if(id_ctlr_buf == NULL)
1678 printk( KERN_ERR "cpqarray: out of memory.\n");
1682 id_lstatus_buf = (sense_log_drv_stat_t *)kmalloc(sizeof(sense_log_drv_stat_t), GFP_KERNEL);
1683 if(id_lstatus_buf == NULL)
1687 printk( KERN_ERR "cpqarray: out of memory.\n");
1691 sense_config_buf = (config_t *)kmalloc(sizeof(config_t), GFP_KERNEL);
1692 if(sense_config_buf == NULL)
1694 kfree(id_lstatus_buf);
1697 printk( KERN_ERR "cpqarray: out of memory.\n");
1701 memset(id_ldrive, 0, sizeof(id_log_drv_t));
1702 memset(id_ctlr_buf, 0, sizeof(id_ctlr_t));
1703 memset(id_lstatus_buf, 0, sizeof(sense_log_drv_stat_t));
1704 memset(sense_config_buf, 0, sizeof(config_t));
1706 info_p->phys_drives = 0;
1707 info_p->log_drv_map = 0;
1708 info_p->drv_assign_map = 0;
1709 info_p->drv_spare_map = 0;
1710 info_p->mp_failed_drv_map = 0; /* only initialized here */
1711 /* Get controllers info for this logical drive */
1712 ret_code = sendcmd(ID_CTLR, ctlr, id_ctlr_buf, 0, 0, 0, 0);
1713 if (ret_code == IO_ERROR) {
1715 * If can't get controller info, set the logical drive map to 0,
1716 * so the idastubopen will fail on all logical drives
1717 * on the controller.
1719 /* Free all the buffers and return */
1720 printk(KERN_ERR "cpqarray: error sending ID controller\n");
1721 kfree(sense_config_buf);
1722 kfree(id_lstatus_buf);
1728 info_p->log_drives = id_ctlr_buf->nr_drvs;
1730 info_p->firm_rev[i] = id_ctlr_buf->firm_rev[i];
1731 info_p->ctlr_sig = id_ctlr_buf->cfg_sig;
1733 printk(" (%s)\n", info_p->product_name);
1735 * Initialize logical drive map to zero
1739 * Get drive geometry for all logical drives
1741 if (id_ctlr_buf->nr_drvs > 16)
1742 printk(KERN_WARNING "cpqarray ida%d: This driver supports "
1743 "16 logical drives per controller.\n. "
1744 " Additional drives will not be "
1745 "detected\n", ctlr);
1748 (log_index < id_ctlr_buf->nr_drvs)
1749 && (log_unit < NWD);
1751 struct gendisk *disk = ida_gendisk[ctlr][log_unit];
1753 size = sizeof(sense_log_drv_stat_t);
1756 Send "Identify logical drive status" cmd
1758 ret_code = sendcmd(SENSE_LOG_DRV_STAT,
1759 ctlr, id_lstatus_buf, size, 0, 0, log_unit);
1760 if (ret_code == IO_ERROR) {
1762 If can't get logical drive status, set
1763 the logical drive map to 0, so the
1764 idastubopen will fail for all logical drives
1767 info_p->log_drv_map = 0;
1768 printk( KERN_WARNING
1769 "cpqarray ida%d: idaGetGeometry - Controller"
1770 " failed to report status of logical drive %d\n"
1771 "Access to this controller has been disabled\n",
1773 /* Free all the buffers and return */
1774 kfree(sense_config_buf);
1775 kfree(id_lstatus_buf);
1781 Make sure the logical drive is configured
1783 if (id_lstatus_buf->status != LOG_NOT_CONF) {
1784 ret_code = sendcmd(ID_LOG_DRV, ctlr, id_ldrive,
1785 sizeof(id_log_drv_t), 0, 0, log_unit);
1787 If error, the bit for this
1788 logical drive won't be set and
1789 idastubopen will return error.
1791 if (ret_code != IO_ERROR) {
1792 drv = &info_p->drv[log_unit];
1793 drv->blk_size = id_ldrive->blk_size;
1794 drv->nr_blks = id_ldrive->nr_blks;
1795 drv->cylinders = id_ldrive->drv.cyl;
1796 drv->heads = id_ldrive->drv.heads;
1797 drv->sectors = id_ldrive->drv.sect_per_track;
1798 info_p->log_drv_map |= (1 << log_unit);
1800 printk(KERN_INFO "cpqarray ida/c%dd%d: blksz=%d nr_blks=%d\n",
1801 ctlr, log_unit, drv->blk_size, drv->nr_blks);
1802 ret_code = sendcmd(SENSE_CONFIG,
1803 ctlr, sense_config_buf,
1804 sizeof(config_t), 0, 0, log_unit);
1805 if (ret_code == IO_ERROR) {
1806 info_p->log_drv_map = 0;
1807 /* Free all the buffers and return */
1808 printk(KERN_ERR "cpqarray: error sending sense config\n");
1809 kfree(sense_config_buf);
1810 kfree(id_lstatus_buf);
1817 sprintf(disk->devfs_name, "ida/c%dd%d", ctlr, log_unit);
1819 info_p->phys_drives =
1820 sense_config_buf->ctlr_phys_drv;
1821 info_p->drv_assign_map
1822 |= sense_config_buf->drv_asgn_map;
1823 info_p->drv_assign_map
1824 |= sense_config_buf->spare_asgn_map;
1825 info_p->drv_spare_map
1826 |= sense_config_buf->spare_asgn_map;
1827 } /* end of if no error on id_ldrive */
1828 log_index = log_index + 1;
1829 } /* end of if logical drive configured */
1830 } /* end of for log_unit */
1831 kfree(sense_config_buf);
1833 kfree(id_lstatus_buf);
1839 static void __exit cpqarray_exit(void)
1843 pci_unregister_driver(&cpqarray_pci_driver);
1845 /* Double check that all controller entries have been removed */
1846 for(i=0; i<MAX_CTLR; i++) {
1847 if (hba[i] != NULL) {
1848 printk(KERN_WARNING "cpqarray: Removing EISA "
1849 "controller %d\n", i);
1850 cpqarray_remove_one_eisa(i);
1854 devfs_remove("ida");
1855 remove_proc_entry("cpqarray", proc_root_driver);
1858 module_init(cpqarray_init)
1859 module_exit(cpqarray_exit)