drivers/block/cpqarray.c

   1 /*
   2  *    Disk Array driver for Compaq SMART2 Controllers
   3  *    Copyright 1998 Compaq Computer Corporation
   4  *
   5  *    This program is free software; you can redistribute it and/or modify
   6  *    it under the terms of the GNU General Public License as published by
   7  *    the Free Software Foundation; either version 2 of the License, or
   8  *    (at your option) any later version.
   9  *
  10  *    This program is distributed in the hope that it will be useful,
  11  *    but WITHOUT ANY WARRANTY; without even the implied warranty of
  12  *    MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or
  13  *    NON INFRINGEMENT.  See the GNU General Public License for more details.
  14  *
  15  *    You should have received a copy of the GNU General Public License
  16  *    along with this program; if not, write to the Free Software
  17  *    Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  18  *
  19  *    Questions/Comments/Bugfixes to Cpqarray-discuss@lists.sourceforge.net
  20  *
  21  */
  22 #include <linux/config.h>       /* CONFIG_PROC_FS */
  23 #include <linux/module.h>
  24 #include <linux/version.h>
  25 #include <linux/types.h>
  26 #include <linux/pci.h>
  27 #include <linux/bio.h>
  28 #include <linux/interrupt.h>
  29 #include <linux/kernel.h>
  30 #include <linux/slab.h>
  31 #include <linux/delay.h>
  32 #include <linux/major.h>
  33 #include <linux/fs.h>
  34 #include <linux/blkpg.h>
  35 #include <linux/timer.h>
  36 #include <linux/proc_fs.h>
  37 #include <linux/devfs_fs_kernel.h>
  38 #include <linux/init.h>
  39 #include <linux/hdreg.h>
  40 #include <linux/spinlock.h>
  41 #include <linux/blkdev.h>
  42 #include <linux/genhd.h>
  43 #include <asm/uaccess.h>
  44 #include <asm/io.h>
  45
  46
  47 #define SMART2_DRIVER_VERSION(maj,min,submin) ((maj<<16)|(min<<8)|(submin))
  48
  49 #define DRIVER_NAME "Compaq SMART2 Driver (v 2.6.0)"
  50 #define DRIVER_VERSION SMART2_DRIVER_VERSION(2,6,0)
  51
  52 /* Embedded module documentation macros - see modules.h */
  53 /* Original author Chris Frantz - Compaq Computer Corporation */
  54 MODULE_AUTHOR("Compaq Computer Corporation");
  55 MODULE_DESCRIPTION("Driver for Compaq Smart2 Array Controllers version 2.6.0");
  56 MODULE_VERSION("2.6.0");
  57 MODULE_LICENSE("GPL");
  58
  59 #include "cpqarray.h"
  60 #include "ida_cmd.h"
  61 #include "smart1,2.h"
  62 #include "ida_ioctl.h"
  63
  64 #define READ_AHEAD      128
  65 #define NR_CMDS         128 /* This could probably go as high as ~400 */
  66
  67 #define MAX_CTLR        8
  68 #define CTLR_SHIFT      8
  69
  70 #define CPQARRAY_DMA_MASK       0xFFFFFFFF      /* 32 bit DMA */
  71
  72 static int nr_ctlr;
  73 static ctlr_info_t *hba[MAX_CTLR];
  74
  75 static int eisa[8];
  76
  77 #define NR_PRODUCTS (sizeof(products)/sizeof(struct board_type))
  78
  79 /*  board_id = Subsystem Device ID & Vendor ID
  80  *  product = Marketing Name for the board
  81  *  access = Address of the struct of function pointers
  82  */
  83 static struct board_type products[] = {
  84         { 0x0040110E, "IDA",                    &smart1_access },
  85         { 0x0140110E, "IDA-2",                  &smart1_access },
  86         { 0x1040110E, "IAES",                   &smart1_access },
  87         { 0x2040110E, "SMART",                  &smart1_access },
  88         { 0x3040110E, "SMART-2/E",              &smart2e_access },
  89         { 0x40300E11, "SMART-2/P",              &smart2_access },
  90         { 0x40310E11, "SMART-2SL",              &smart2_access },
  91         { 0x40320E11, "Smart Array 3200",       &smart2_access },
  92         { 0x40330E11, "Smart Array 3100ES",     &smart2_access },
  93         { 0x40340E11, "Smart Array 221",        &smart2_access },
  94         { 0x40400E11, "Integrated Array",       &smart4_access },
  95         { 0x40480E11, "Compaq Raid LC2",        &smart4_access },
  96         { 0x40500E11, "Smart Array 4200",       &smart4_access },
  97         { 0x40510E11, "Smart Array 4250ES",     &smart4_access },
  98         { 0x40580E11, "Smart Array 431",        &smart4_access },
  99 };
 100
 101 /* define the PCI info for the PCI cards this driver can control */
 102 const struct pci_device_id cpqarray_pci_device_id[] =
 103 {
 104         { PCI_VENDOR_ID_DEC, PCI_DEVICE_ID_COMPAQ_42XX,
 105                 0x0E11, 0x4058, 0, 0, 0},       /* SA431 */
 106         { PCI_VENDOR_ID_DEC, PCI_DEVICE_ID_COMPAQ_42XX,
 107                 0x0E11, 0x4051, 0, 0, 0},      /* SA4250ES */
 108         { PCI_VENDOR_ID_DEC, PCI_DEVICE_ID_COMPAQ_42XX,
 109                 0x0E11, 0x4050, 0, 0, 0},      /* SA4200 */
 110         { PCI_VENDOR_ID_NCR, PCI_DEVICE_ID_NCR_53C1510,
 111                 0x0E11, 0x4048, 0, 0, 0},       /* LC2 */
 112         { PCI_VENDOR_ID_NCR, PCI_DEVICE_ID_NCR_53C1510,
 113                 0x0E11, 0x4040, 0, 0, 0},      /* Integrated Array */
 114         { PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_SMART2P,
 115                 0x0E11, 0x4034, 0, 0, 0},       /* SA 221 */
 116         { PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_SMART2P,
 117                 0x0E11, 0x4033, 0, 0, 0},       /* SA 3100ES*/
 118         { PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_SMART2P,
 119                 0x0E11, 0x4032, 0, 0, 0},       /* SA 3200*/
 120         { PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_SMART2P,
 121                 0x0E11, 0x4031, 0, 0, 0},       /* SA 2SL*/
 122         { PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_SMART2P,
 123                 0x0E11, 0x4030, 0, 0, 0},       /* SA 2P */
 124         { 0 }
 125 };
 126
 127 MODULE_DEVICE_TABLE(pci, cpqarray_pci_device_id);
 128
 129 static struct gendisk *ida_gendisk[MAX_CTLR][NWD];
 130
 131 /* Debug... */
 132 #define DBG(s)  do { s } while(0)
 133 /* Debug (general info)... */
 134 #define DBGINFO(s) do { } while(0)
 135 /* Debug Paranoid... */
 136 #define DBGP(s)  do { } while(0)
 137 /* Debug Extra Paranoid... */
 138 #define DBGPX(s) do { } while(0)
 139
 140 int cpqarray_init_step2(void);
 141 static int cpqarray_pci_init(ctlr_info_t *c, struct pci_dev *pdev);
 142 static void __iomem *remap_pci_mem(ulong base, ulong size);
 143 static int cpqarray_eisa_detect(void);
 144 static int pollcomplete(int ctlr);
 145 static void getgeometry(int ctlr);
 146 static void start_fwbk(int ctlr);
 147
 148 static cmdlist_t * cmd_alloc(ctlr_info_t *h, int get_from_pool);
 149 static void cmd_free(ctlr_info_t *h, cmdlist_t *c, int got_from_pool);
 150
 151 static void free_hba(int i);
 152 static int alloc_cpqarray_hba(void);
 153
 154 static int sendcmd(
 155         __u8    cmd,
 156         int     ctlr,
 157         void    *buff,
 158         size_t  size,
 159         unsigned int blk,
 160         unsigned int blkcnt,
 161         unsigned int log_unit );
 162
 163 static int ida_open(struct inode *inode, struct file *filep);
 164 static int ida_release(struct inode *inode, struct file *filep);
 165 static int ida_ioctl(struct inode *inode, struct file *filep, unsigned int cmd, unsigned long arg);
 166 static int ida_ctlr_ioctl(ctlr_info_t *h, int dsk, ida_ioctl_t *io);
 167
 168 static void do_ida_request(request_queue_t *q);
 169 static void start_io(ctlr_info_t *h);
 170
 171 static inline void addQ(cmdlist_t **Qptr, cmdlist_t *c);
 172 static inline cmdlist_t *removeQ(cmdlist_t **Qptr, cmdlist_t *c);
 173 static inline void complete_buffers(struct bio *bio, int ok);
 174 static inline void complete_command(cmdlist_t *cmd, int timeout);
 175
 176 static irqreturn_t do_ida_intr(int irq, void *dev_id, struct pt_regs * regs);
 177 static void ida_timer(unsigned long tdata);
 178 static int ida_revalidate(struct gendisk *disk);
 179 static int revalidate_allvol(ctlr_info_t *host);
 180 static int cpqarray_register_ctlr(int ctlr, struct pci_dev *pdev);
 181
 182 #ifdef CONFIG_PROC_FS
 183 static void ida_procinit(int i);
 184 static int ida_proc_get_info(char *buffer, char **start, off_t offset, int length, int *eof, void *data);
 185 #else
 186 static void ida_procinit(int i) {}
 187 #endif
 188
 189 static inline drv_info_t *get_drv(struct gendisk *disk)
 190 {
 191         return disk->private_data;
 192 }
 193
 194 static inline ctlr_info_t *get_host(struct gendisk *disk)
 195 {
 196         return disk->queue->queuedata;
 197 }
 198
 199
 200 static struct block_device_operations ida_fops  = {
 201         .owner          = THIS_MODULE,
 202         .open           = ida_open,
 203         .release        = ida_release,
 204         .ioctl          = ida_ioctl,
 205         .revalidate_disk= ida_revalidate,
 206 };
 207
 208
 209 #ifdef CONFIG_PROC_FS
 210
 211 static struct proc_dir_entry *proc_array;
 212
 213 /*
 214  * Get us a file in /proc/array that says something about each controller.
 215  * Create /proc/array if it doesn't exist yet.
 216  */
 217 static void __init ida_procinit(int i)
 218 {
 219         if (proc_array == NULL) {
 220                 proc_array = proc_mkdir("cpqarray", proc_root_driver);
 221                 if (!proc_array) return;
 222         }
 223
 224         create_proc_read_entry(hba[i]->devname, 0, proc_array,
 225                                ida_proc_get_info, hba[i]);
 226 }
 227
 228 /*
 229  * Report information about this controller.
 230  */
 231 static int ida_proc_get_info(char *buffer, char **start, off_t offset, int length, int *eof, void *data)
 232 {
 233         off_t pos = 0;
 234         off_t len = 0;
 235         int size, i, ctlr;
 236         ctlr_info_t *h = (ctlr_info_t*)data;
 237         drv_info_t *drv;
 238 #ifdef CPQ_PROC_PRINT_QUEUES
 239         cmdlist_t *c;
 240         unsigned long flags;
 241 #endif
 242
 243         ctlr = h->ctlr;
 244         size = sprintf(buffer, "%s:  Compaq %s Controller\n"
 245                 "       Board ID: 0x%08lx\n"
 246                 "       Firmware Revision: %c%c%c%c\n"
 247                 "       Controller Sig: 0x%08lx\n"
 248                 "       Memory Address: 0x%08lx\n"
 249                 "       I/O Port: 0x%04x\n"
 250                 "       IRQ: %d\n"
 251                 "       Logical drives: %d\n"
 252                 "       Physical drives: %d\n\n"
 253                 "       Current Q depth: %d\n"
 254                 "       Max Q depth since init: %d\n\n",
 255                 h->devname,
 256                 h->product_name,
 257                 (unsigned long)h->board_id,
 258                 h->firm_rev[0], h->firm_rev[1], h->firm_rev[2], h->firm_rev[3],
 259                 (unsigned long)h->ctlr_sig, (unsigned long)h->vaddr,
 260                 (unsigned int) h->io_mem_addr, (unsigned int)h->intr,
 261                 h->log_drives, h->phys_drives,
 262                 h->Qdepth, h->maxQsinceinit);
 263
 264         pos += size; len += size;
 265
 266         size = sprintf(buffer+len, "Logical Drive Info:\n");
 267         pos += size; len += size;
 268
 269         for(i=0; i<h->log_drives; i++) {
 270                 drv = &h->drv[i];
 271                 size = sprintf(buffer+len, "ida/c%dd%d: blksz=%d nr_blks=%d\n",
 272                                 ctlr, i, drv->blk_size, drv->nr_blks);
 273                 pos += size; len += size;
 274         }
 275
 276 #ifdef CPQ_PROC_PRINT_QUEUES
 277         spin_lock_irqsave(IDA_LOCK(h->ctlr), flags);
 278         size = sprintf(buffer+len, "\nCurrent Queues:\n");
 279         pos += size; len += size;
 280
 281         c = h->reqQ;
 282         size = sprintf(buffer+len, "reqQ = %p", c); pos += size; len += size;
 283         if (c) c=c->next;
 284         while(c && c != h->reqQ) {
 285                 size = sprintf(buffer+len, "->%p", c);
 286                 pos += size; len += size;
 287                 c=c->next;
 288         }
 289
 290         c = h->cmpQ;
 291         size = sprintf(buffer+len, "\ncmpQ = %p", c); pos += size; len += size;
 292         if (c) c=c->next;
 293         while(c && c != h->cmpQ) {
 294                 size = sprintf(buffer+len, "->%p", c);
 295                 pos += size; len += size;
 296                 c=c->next;
 297         }
 298
 299         size = sprintf(buffer+len, "\n"); pos += size; len += size;
 300         spin_unlock_irqrestore(IDA_LOCK(h->ctlr), flags);
 301 #endif
 302         size = sprintf(buffer+len, "nr_allocs = %d\nnr_frees = %d\n",
 303                         h->nr_allocs, h->nr_frees);
 304         pos += size; len += size;
 305
 306         *eof = 1;
 307         *start = buffer+offset;
 308         len -= offset;
 309         if (len>length)
 310                 len = length;
 311         return len;
 312 }
 313 #endif /* CONFIG_PROC_FS */
 314
 315 MODULE_PARM(eisa, "1-8i");
 316
 317 /* This is a bit of a hack,
 318  * necessary to support both eisa and pci
 319  */
 320 int __init cpqarray_init(void)
 321 {
 322         return (cpqarray_init_step2());
 323 }
 324
 325 static void release_io_mem(ctlr_info_t *c)
 326 {
 327         /* if IO mem was not protected do nothing */
 328         if( c->io_mem_addr == 0)
 329                 return;
 330         release_region(c->io_mem_addr, c->io_mem_length);
 331         c->io_mem_addr = 0;
 332         c->io_mem_length = 0;
 333 }
 334
 335 static void __devexit cpqarray_remove_one(int i)
 336 {
 337         int j;
 338         char buff[4];
 339
 340         /* sendcmd will turn off interrupt, and send the flush...
 341          * To write all data in the battery backed cache to disks
 342          * no data returned, but don't want to send NULL to sendcmd */
 343         if( sendcmd(FLUSH_CACHE, i, buff, 4, 0, 0, 0))
 344         {
 345                 printk(KERN_WARNING "Unable to flush cache on controller %d\n",
 346                                 i);
 347         }
 348         free_irq(hba[i]->intr, hba[i]);
 349         iounmap(hba[i]->vaddr);
 350         unregister_blkdev(COMPAQ_SMART2_MAJOR+i, hba[i]->devname);
 351         del_timer(&hba[i]->timer);
 352         remove_proc_entry(hba[i]->devname, proc_array);
 353         pci_free_consistent(hba[i]->pci_dev,
 354                         NR_CMDS * sizeof(cmdlist_t), (hba[i]->cmd_pool),
 355                         hba[i]->cmd_pool_dhandle);
 356         kfree(hba[i]->cmd_pool_bits);
 357         for(j = 0; j < NWD; j++) {
 358                 if (ida_gendisk[i][j]->flags & GENHD_FL_UP)
 359                         del_gendisk(ida_gendisk[i][j]);
 360                 devfs_remove("ida/c%dd%d",i,j);
 361                 put_disk(ida_gendisk[i][j]);
 362         }
 363         blk_cleanup_queue(hba[i]->queue);
 364         release_io_mem(hba[i]);
 365         free_hba(i);
 366 }
 367
 368 static void __devexit cpqarray_remove_one_pci (struct pci_dev *pdev)
 369 {
 370         int i;
 371         ctlr_info_t *tmp_ptr;
 372
 373         if (pci_get_drvdata(pdev) == NULL) {
 374                 printk( KERN_ERR "cpqarray: Unable to remove device \n");
 375                 return;
 376         }
 377
 378         tmp_ptr = pci_get_drvdata(pdev);
 379         i = tmp_ptr->ctlr;
 380         if (hba[i] == NULL) {
 381                 printk(KERN_ERR "cpqarray: controller %d appears to have"
 382                         "already been removed \n", i);
 383                 return;
 384         }
 385         pci_set_drvdata(pdev, NULL);
 386
 387         cpqarray_remove_one(i);
 388 }
 389
 390 /* removing an instance that was not removed automatically..
 391  * must be an eisa card.
 392  */
 393 static void __devexit cpqarray_remove_one_eisa (int i)
 394 {
 395         if (hba[i] == NULL) {
 396                 printk(KERN_ERR "cpqarray: controller %d appears to have"
 397                         "already been removed \n", i);
 398                 return;
 399         }
 400         cpqarray_remove_one(i);
 401 }
 402
 403 /* pdev is NULL for eisa */
 404 static int cpqarray_register_ctlr( int i, struct pci_dev *pdev)
 405 {
 406         request_queue_t *q;
 407         int j;
 408
 409         /*
 410          * register block devices
 411          * Find disks and fill in structs
 412          * Get an interrupt, set the Q depth and get into /proc
 413          */
 414
 415         /* If this successful it should insure that we are the only */
 416         /* instance of the driver */
 417         if (register_blkdev(COMPAQ_SMART2_MAJOR+i, hba[i]->devname)) {
 418                 goto Enomem4;
 419         }
 420         hba[i]->access.set_intr_mask(hba[i], 0);
 421         if (request_irq(hba[i]->intr, do_ida_intr,
 422                 SA_INTERRUPT|SA_SHIRQ|SA_SAMPLE_RANDOM,
 423                 hba[i]->devname, hba[i]))
 424         {
 425                 printk(KERN_ERR "cpqarray: Unable to get irq %d for %s\n",
 426                                 hba[i]->intr, hba[i]->devname);
 427                 goto Enomem3;
 428         }
 429
 430         for (j=0; j<NWD; j++) {
 431                 ida_gendisk[i][j] = alloc_disk(1 << NWD_SHIFT);
 432                 if (!ida_gendisk[i][j])
 433                         goto Enomem2;
 434         }
 435
 436         hba[i]->cmd_pool = (cmdlist_t *)pci_alloc_consistent(
 437                 hba[i]->pci_dev, NR_CMDS * sizeof(cmdlist_t),
 438                 &(hba[i]->cmd_pool_dhandle));
 439         hba[i]->cmd_pool_bits = kmalloc(
 440                 ((NR_CMDS+BITS_PER_LONG-1)/BITS_PER_LONG)*sizeof(unsigned long),
 441                 GFP_KERNEL);
 442
 443         if (!hba[i]->cmd_pool_bits || !hba[i]->cmd_pool)
 444                         goto Enomem1;
 445
 446         memset(hba[i]->cmd_pool, 0, NR_CMDS * sizeof(cmdlist_t));
 447         memset(hba[i]->cmd_pool_bits, 0, ((NR_CMDS+BITS_PER_LONG-1)/BITS_PER_LONG)*sizeof(unsigned long));
 448         printk(KERN_INFO "cpqarray: Finding drives on %s",
 449                 hba[i]->devname);
 450
 451         spin_lock_init(&hba[i]->lock);
 452         q = blk_init_queue(do_ida_request, &hba[i]->lock);
 453         if (!q)
 454                 goto Enomem1;
 455
 456         hba[i]->queue = q;
 457         q->queuedata = hba[i];
 458
 459         getgeometry(i);
 460         start_fwbk(i);
 461
 462         ida_procinit(i);
 463
 464         if (pdev)
 465                 blk_queue_bounce_limit(q, hba[i]->pci_dev->dma_mask);
 466
 467         /* This is a hardware imposed limit. */
 468         blk_queue_max_hw_segments(q, SG_MAX);
 469
 470         /* This is a driver limit and could be eliminated. */
 471         blk_queue_max_phys_segments(q, SG_MAX);
 472
 473         init_timer(&hba[i]->timer);
 474         hba[i]->timer.expires = jiffies + IDA_TIMER;
 475         hba[i]->timer.data = (unsigned long)hba[i];
 476         hba[i]->timer.function = ida_timer;
 477         add_timer(&hba[i]->timer);
 478
 479         /* Enable IRQ now that spinlock and rate limit timer are set up */
 480         hba[i]->access.set_intr_mask(hba[i], FIFO_NOT_EMPTY);
 481
 482         for(j=0; j<NWD; j++) {
 483                 struct gendisk *disk = ida_gendisk[i][j];
 484                 drv_info_t *drv = &hba[i]->drv[j];
 485                 sprintf(disk->disk_name, "ida/c%dd%d", i, j);
 486                 disk->major = COMPAQ_SMART2_MAJOR + i;
 487                 disk->first_minor = j<<NWD_SHIFT;
 488                 disk->fops = &ida_fops;
 489                 if (j && !drv->nr_blks)
 490                         continue;
 491                 blk_queue_hardsect_size(hba[i]->queue, drv->blk_size);
 492                 set_capacity(disk, drv->nr_blks);
 493                 disk->queue = hba[i]->queue;
 494                 disk->private_data = drv;
 495                 add_disk(disk);
 496         }
 497
 498         /* done ! */
 499         return(i);
 500
 501 Enomem1:
 502         nr_ctlr = i;
 503         kfree(hba[i]->cmd_pool_bits);
 504         if (hba[i]->cmd_pool)
 505                 pci_free_consistent(hba[i]->pci_dev, NR_CMDS*sizeof(cmdlist_t),
 506                                     hba[i]->cmd_pool, hba[i]->cmd_pool_dhandle);
 507 Enomem2:
 508         while (j--) {
 509                 put_disk(ida_gendisk[i][j]);
 510                 ida_gendisk[i][j] = NULL;
 511         }
 512         free_irq(hba[i]->intr, hba[i]);
 513 Enomem3:
 514         unregister_blkdev(COMPAQ_SMART2_MAJOR+i, hba[i]->devname);
 515 Enomem4:
 516         if (pdev)
 517                 pci_set_drvdata(pdev, NULL);
 518         release_io_mem(hba[i]);
 519         free_hba(i);
 520
 521         printk( KERN_ERR "cpqarray: out of memory");
 522
 523         return -1;
 524 }
 525
 526 static int __init cpqarray_init_one( struct pci_dev *pdev,
 527         const struct pci_device_id *ent)
 528 {
 529         int i;
 530
 531         printk(KERN_DEBUG "cpqarray: Device 0x%x has been found at"
 532                         " bus %d dev %d func %d\n",
 533                         pdev->device, pdev->bus->number, PCI_SLOT(pdev->devfn),
 534                         PCI_FUNC(pdev->devfn));
 535         i = alloc_cpqarray_hba();
 536         if( i < 0 )
 537                 return (-1);
 538         memset(hba[i], 0, sizeof(ctlr_info_t));
 539         sprintf(hba[i]->devname, "ida%d", i);
 540         hba[i]->ctlr = i;
 541         /* Initialize the pdev driver private data */
 542         pci_set_drvdata(pdev, hba[i]);
 543
 544         if (cpqarray_pci_init(hba[i], pdev) != 0) {
 545                 pci_set_drvdata(pdev, NULL);
 546                 release_io_mem(hba[i]);
 547                 free_hba(i);
 548                 return -1;
 549         }
 550
 551         return (cpqarray_register_ctlr(i, pdev));
 552 }
 553
 554 static struct pci_driver cpqarray_pci_driver = {
 555         .name = "cpqarray",
 556         .probe = cpqarray_init_one,
 557         .remove = __devexit_p(cpqarray_remove_one_pci),
 558         .id_table = cpqarray_pci_device_id,
 559 };
 560
 561 /*
 562  *  This is it.  Find all the controllers and register them.
 563  *  returns the number of block devices registered.
 564  */
 565 int __init cpqarray_init_step2(void)
 566 {
 567         int num_cntlrs_reg = 0;
 568         int i;
 569         int rc = 0;
 570
 571         /* detect controllers */
 572         printk(DRIVER_NAME "\n");
 573 /* TODO: If it's an eisa only system, will rc return negative? */
 574         rc = pci_register_driver(&cpqarray_pci_driver);
 575         if (rc < 0)
 576                 return rc;
 577         cpqarray_eisa_detect();
 578
 579         for (i=0; i < MAX_CTLR; i++) {
 580                 if (hba[i] != NULL)
 581                         num_cntlrs_reg++;
 582         }
 583
 584         return(num_cntlrs_reg);
 585 }
 586
 587 /* Function to find the first free pointer into our hba[] array */
 588 /* Returns -1 if no free entries are left.  */
 589 static int alloc_cpqarray_hba(void)
 590 {
 591         int i;
 592
 593         for(i=0; i< MAX_CTLR; i++) {
 594                 if (hba[i] == NULL) {
 595                         hba[i] = kmalloc(sizeof(ctlr_info_t), GFP_KERNEL);
 596                         if(hba[i]==NULL) {
 597                                 printk(KERN_ERR "cpqarray: out of memory.\n");
 598                                 return (-1);
 599                         }
 600                         return (i);
 601                 }
 602         }
 603         printk(KERN_WARNING "cpqarray: This driver supports a maximum"
 604                 " of 8 controllers.\n");
 605         return(-1);
 606 }
 607
 608 static void free_hba(int i)
 609 {
 610         kfree(hba[i]);
 611         hba[i]=NULL;
 612 }
 613
 614 /*
 615  * Find the IO address of the controller, its IRQ and so forth.  Fill
 616  * in some basic stuff into the ctlr_info_t structure.
 617  */
 618 static int cpqarray_pci_init(ctlr_info_t *c, struct pci_dev *pdev)
 619 {
 620         ushort vendor_id, device_id, command;
 621         unchar cache_line_size, latency_timer;
 622         unchar irq, revision;
 623         unsigned long addr[6];
 624         __u32 board_id;
 625
 626         int i;
 627
 628         c->pci_dev = pdev;
 629         if (pci_enable_device(pdev)) {
 630                 printk(KERN_ERR "cpqarray: Unable to Enable PCI device\n");
 631                 return -1;
 632         }
 633         vendor_id = pdev->vendor;
 634         device_id = pdev->device;
 635         irq = pdev->irq;
 636
 637         for(i=0; i<6; i++)
 638                 addr[i] = pci_resource_start(pdev, i);
 639
 640         if (pci_set_dma_mask(pdev, CPQARRAY_DMA_MASK) != 0)
 641         {
 642                 printk(KERN_ERR "cpqarray: Unable to set DMA mask\n");
 643                 return -1;
 644         }
 645
 646         pci_read_config_word(pdev, PCI_COMMAND, &command);
 647         pci_read_config_byte(pdev, PCI_CLASS_REVISION, &revision);
 648         pci_read_config_byte(pdev, PCI_CACHE_LINE_SIZE, &cache_line_size);
 649         pci_read_config_byte(pdev, PCI_LATENCY_TIMER, &latency_timer);
 650
 651         pci_read_config_dword(pdev, 0x2c, &board_id);
 652
 653         /* check to see if controller has been disabled */
 654         if(!(command & 0x02)) {
 655                 printk(KERN_WARNING
 656                         "cpqarray: controller appears to be disabled\n");
 657                 return(-1);
 658         }
 659
 660 DBGINFO(
 661         printk("vendor_id = %x\n", vendor_id);
 662         printk("device_id = %x\n", device_id);
 663         printk("command = %x\n", command);
 664         for(i=0; i<6; i++)
 665                 printk("addr[%d] = %lx\n", i, addr[i]);
 666         printk("revision = %x\n", revision);
 667         printk("irq = %x\n", irq);
 668         printk("cache_line_size = %x\n", cache_line_size);
 669         printk("latency_timer = %x\n", latency_timer);
 670         printk("board_id = %x\n", board_id);
 671 );
 672
 673         c->intr = irq;
 674
 675         for(i=0; i<6; i++) {
 676                 if (pci_resource_flags(pdev, i) & PCI_BASE_ADDRESS_SPACE_IO)
 677                 { /* IO space */
 678                         c->io_mem_addr = addr[i];
 679                         c->io_mem_length = pci_resource_end(pdev, i)
 680                                 - pci_resource_start(pdev, i) + 1;
 681                         if(!request_region( c->io_mem_addr, c->io_mem_length,
 682                                 "cpqarray"))
 683                         {
 684                                 printk( KERN_WARNING "cpqarray I/O memory range already in use addr %lx length = %ld\n", c->io_mem_addr, c->io_mem_length);
 685                                 c->io_mem_addr = 0;
 686                                 c->io_mem_length = 0;
 687                         }
 688                         break;
 689                 }
 690         }
 691
 692         c->paddr = 0;
 693         for(i=0; i<6; i++)
 694                 if (!(pci_resource_flags(pdev, i) &
 695                                 PCI_BASE_ADDRESS_SPACE_IO)) {
 696                         c->paddr = pci_resource_start (pdev, i);
 697                         break;
 698                 }
 699         if (!c->paddr)
 700                 return -1;
 701         c->vaddr = remap_pci_mem(c->paddr, 128);
 702         if (!c->vaddr)
 703                 return -1;
 704         c->board_id = board_id;
 705
 706         for(i=0; i<NR_PRODUCTS; i++) {
 707                 if (board_id == products[i].board_id) {
 708                         c->product_name = products[i].product_name;
 709                         c->access = *(products[i].access);
 710                         break;
 711                 }
 712         }
 713         if (i == NR_PRODUCTS) {
 714                 printk(KERN_WARNING "cpqarray: Sorry, I don't know how"
 715                         " to access the SMART Array controller %08lx\n",
 716                                 (unsigned long)board_id);
 717                 return -1;
 718         }
 719
 720         return 0;
 721 }
 722
 723 /*
 724  * Map (physical) PCI mem into (virtual) kernel space
 725  */
 726 static void __iomem *remap_pci_mem(ulong base, ulong size)
 727 {
 728         ulong page_base        = ((ulong) base) & PAGE_MASK;
 729         ulong page_offs        = ((ulong) base) - page_base;
 730         void __iomem *page_remapped    = ioremap(page_base, page_offs+size);
 731
 732         return (page_remapped ? (page_remapped + page_offs) : NULL);
 733 }
 734
 735 #ifndef MODULE
 736 #if LINUX_VERSION_CODE >= KERNEL_VERSION(2,3,13)
 737 /*
 738  * Config string is a comma separated set of i/o addresses of EISA cards.
 739  */
 740 static int cpqarray_setup(char *str)
 741 {
 742         int i, ints[9];
 743
 744         (void)get_options(str, ARRAY_SIZE(ints), ints);
 745
 746         for(i=0; i<ints[0] && i<8; i++)
 747                 eisa[i] = ints[i+1];
 748         return 1;
 749 }
 750
 751 __setup("smart2=", cpqarray_setup);
 752
 753 #else
 754
 755 /*
 756  * Copy the contents of the ints[] array passed to us by init.
 757  */
 758 void cpqarray_setup(char *str, int *ints)
 759 {
 760         int i;
 761         for(i=0; i<ints[0] && i<8; i++)
 762                 eisa[i] = ints[i+1];
 763 }
 764 #endif
 765 #endif
 766
 767 /*
 768  * Find an EISA controller's signature.  Set up an hba if we find it.
 769  */
 770 static int cpqarray_eisa_detect(void)
 771 {
 772         int i=0, j;
 773         __u32 board_id;
 774         int intr;
 775         int ctlr;
 776         int num_ctlr = 0;
 777
 778         while(i<8 && eisa[i]) {
 779                 ctlr = alloc_cpqarray_hba();
 780                 if(ctlr == -1)
 781                         break;
 782                 board_id = inl(eisa[i]+0xC80);
 783                 for(j=0; j < NR_PRODUCTS; j++)
 784                         if (board_id == products[j].board_id)
 785                                 break;
 786
 787                 if (j == NR_PRODUCTS) {
 788                         printk(KERN_WARNING "cpqarray: Sorry, I don't know how"
 789                                 " to access the SMART Array controller %08lx\n",                                 (unsigned long)board_id);
 790                         continue;
 791                 }
 792
 793                 memset(hba[ctlr], 0, sizeof(ctlr_info_t));
 794                 hba[ctlr]->io_mem_addr = eisa[i];
 795                 hba[ctlr]->io_mem_length = 0x7FF;
 796                 if(!request_region(hba[ctlr]->io_mem_addr,
 797                                 hba[ctlr]->io_mem_length,
 798                                 "cpqarray"))
 799                 {
 800                         printk(KERN_WARNING "cpqarray: I/O range already in "
 801                                         "use addr = %lx length = %ld\n",
 802                                         hba[ctlr]->io_mem_addr,
 803                                         hba[ctlr]->io_mem_length);
 804                         free_hba(ctlr);
 805                         continue;
 806                 }
 807
 808                 /*
 809                  * Read the config register to find our interrupt
 810                  */
 811                 intr = inb(eisa[i]+0xCC0) >> 4;
 812                 if (intr & 1) intr = 11;
 813                 else if (intr & 2) intr = 10;
 814                 else if (intr & 4) intr = 14;
 815                 else if (intr & 8) intr = 15;
 816
 817                 hba[ctlr]->intr = intr;
 818                 sprintf(hba[ctlr]->devname, "ida%d", nr_ctlr);
 819                 hba[ctlr]->product_name = products[j].product_name;
 820                 hba[ctlr]->access = *(products[j].access);
 821                 hba[ctlr]->ctlr = ctlr;
 822                 hba[ctlr]->board_id = board_id;
 823                 hba[ctlr]->pci_dev = NULL; /* not PCI */
 824
 825 DBGINFO(
 826         printk("i = %d, j = %d\n", i, j);
 827         printk("irq = %x\n", intr);
 828         printk("product name = %s\n", products[j].product_name);
 829         printk("board_id = %x\n", board_id);
 830 );
 831
 832                 num_ctlr++;
 833                 i++;
 834
 835                 if (cpqarray_register_ctlr(ctlr, NULL) == -1)
 836                         printk(KERN_WARNING
 837                                 "cpqarray: Can't register EISA controller %d\n",
 838                                 ctlr);
 839
 840         }
 841
 842         return num_ctlr;
 843 }
 844
 845 /*
 846  * Open.  Make sure the device is really there.
 847  */
 848 static int ida_open(struct inode *inode, struct file *filep)
 849 {
 850         drv_info_t *drv = get_drv(inode->i_bdev->bd_disk);
 851         ctlr_info_t *host = get_host(inode->i_bdev->bd_disk);
 852
 853         DBGINFO(printk("ida_open %s\n", inode->i_bdev->bd_disk->disk_name));
 854         /*
 855          * Root is allowed to open raw volume zero even if it's not configured
 856          * so array config can still work.  I don't think I really like this,
 857          * but I'm already using way to many device nodes to claim another one
 858          * for "raw controller".
 859          */
 860         if (!drv->nr_blks) {
 861                 if (!capable(CAP_SYS_RAWIO))
 862                         return -ENXIO;
 863                 if (!capable(CAP_SYS_ADMIN) && drv != host->drv)
 864                         return -ENXIO;
 865         }
 866         host->usage_count++;
 867         return 0;
 868 }
 869
 870 /*
 871  * Close.  Sync first.
 872  */
 873 static int ida_release(struct inode *inode, struct file *filep)
 874 {
 875         ctlr_info_t *host = get_host(inode->i_bdev->bd_disk);
 876         host->usage_count--;
 877         return 0;
 878 }
 879
 880 /*
 881  * Enqueuing and dequeuing functions for cmdlists.
 882  */
 883 static inline void addQ(cmdlist_t **Qptr, cmdlist_t *c)
 884 {
 885         if (*Qptr == NULL) {
 886                 *Qptr = c;
 887                 c->next = c->prev = c;
 888         } else {
 889                 c->prev = (*Qptr)->prev;
 890                 c->next = (*Qptr);
 891                 (*Qptr)->prev->next = c;
 892                 (*Qptr)->prev = c;
 893         }
 894 }
 895
 896 static inline cmdlist_t *removeQ(cmdlist_t **Qptr, cmdlist_t *c)
 897 {
 898         if (c && c->next != c) {
 899                 if (*Qptr == c) *Qptr = c->next;
 900                 c->prev->next = c->next;
 901                 c->next->prev = c->prev;
 902         } else {
 903                 *Qptr = NULL;
 904         }
 905         return c;
 906 }
 907
 908 /*
 909  * Get a request and submit it to the controller.
 910  * This routine needs to grab all the requests it possibly can from the
 911  * req Q and submit them.  Interrupts are off (and need to be off) when you
 912  * are in here (either via the dummy do_ida_request functions or by being
 913  * called from the interrupt handler
 914  */
 915 static void do_ida_request(request_queue_t *q)
 916 {
 917         ctlr_info_t *h = q->queuedata;
 918         cmdlist_t *c;
 919         struct request *creq;
 920         struct scatterlist tmp_sg[SG_MAX];
 921         int i, dir, seg;
 922
 923         if (blk_queue_plugged(q))
 924                 goto startio;
 925
 926 queue_next:
 927         creq = elv_next_request(q);
 928         if (!creq)
 929                 goto startio;
 930
 931         if (creq->nr_phys_segments > SG_MAX)
 932                 BUG();
 933
 934         if ((c = cmd_alloc(h,1)) == NULL)
 935                 goto startio;
 936
 937         blkdev_dequeue_request(creq);
 938
 939         c->ctlr = h->ctlr;
 940         c->hdr.unit = (drv_info_t *)(creq->rq_disk->private_data) - h->drv;
 941         c->hdr.size = sizeof(rblk_t) >> 2;
 942         c->size += sizeof(rblk_t);
 943
 944         c->req.hdr.blk = creq->sector;
 945         c->rq = creq;
 946 DBGPX(
 947         printk("sector=%d, nr_sectors=%d\n", creq->sector, creq->nr_sectors);
 948 );
 949         seg = blk_rq_map_sg(q, creq, tmp_sg);
 950
 951         /* Now do all the DMA Mappings */
 952         if (rq_data_dir(creq) == READ)
 953                 dir = PCI_DMA_FROMDEVICE;
 954         else
 955                 dir = PCI_DMA_TODEVICE;
 956         for( i=0; i < seg; i++)
 957         {
 958                 c->req.sg[i].size = tmp_sg[i].length;
 959                 c->req.sg[i].addr = (__u32) pci_map_page(h->pci_dev,
 960                                                  tmp_sg[i].page,
 961                                                  tmp_sg[i].offset,
 962                                                  tmp_sg[i].length, dir);
 963         }
 964 DBGPX(  printk("Submitting %d sectors in %d segments\n", creq->nr_sectors, seg); );
 965         c->req.hdr.sg_cnt = seg;
 966         c->req.hdr.blk_cnt = creq->nr_sectors;
 967         c->req.hdr.cmd = (rq_data_dir(creq) == READ) ? IDA_READ : IDA_WRITE;
 968         c->type = CMD_RWREQ;
 969
 970         /* Put the request on the tail of the request queue */
 971         addQ(&h->reqQ, c);
 972         h->Qdepth++;
 973         if (h->Qdepth > h->maxQsinceinit)
 974                 h->maxQsinceinit = h->Qdepth;
 975
 976         goto queue_next;
 977
 978 startio:
 979         start_io(h);
 980 }
 981
 982 /*
 983  * start_io submits everything on a controller's request queue
 984  * and moves it to the completion queue.
 985  *
 986  * Interrupts had better be off if you're in here
 987  */
 988 static void start_io(ctlr_info_t *h)
 989 {
 990         cmdlist_t *c;
 991
 992         while((c = h->reqQ) != NULL) {
 993                 /* Can't do anything if we're busy */
 994                 if (h->access.fifo_full(h) == 0)
 995                         return;
 996
 997                 /* Get the first entry from the request Q */
 998                 removeQ(&h->reqQ, c);
 999                 h->Qdepth--;
1000
1001                 /* Tell the controller to do our bidding */
1002                 h->access.submit_command(h, c);
1003
1004                 /* Get onto the completion Q */
1005                 addQ(&h->cmpQ, c);
1006         }
1007 }
1008
1009 static inline void complete_buffers(struct bio *bio, int ok)
1010 {
1011         struct bio *xbh;
1012         while(bio) {
1013                 int nr_sectors = bio_sectors(bio);
1014
1015                 xbh = bio->bi_next;
1016                 bio->bi_next = NULL;
1017
1018                 blk_finished_io(nr_sectors);
1019                 bio_endio(bio, nr_sectors << 9, ok ? 0 : -EIO);
1020
1021                 bio = xbh;
1022         }
1023 }
1024 /*
1025  * Mark all buffers that cmd was responsible for
1026  */
1027 static inline void complete_command(cmdlist_t *cmd, int timeout)
1028 {
1029         int ok=1;
1030         int i, ddir;
1031
1032         if (cmd->req.hdr.rcode & RCODE_NONFATAL &&
1033            (hba[cmd->ctlr]->misc_tflags & MISC_NONFATAL_WARN) == 0) {
1034                 printk(KERN_NOTICE "Non Fatal error on ida/c%dd%d\n",
1035                                 cmd->ctlr, cmd->hdr.unit);
1036                 hba[cmd->ctlr]->misc_tflags |= MISC_NONFATAL_WARN;
1037         }
1038         if (cmd->req.hdr.rcode & RCODE_FATAL) {
1039                 printk(KERN_WARNING "Fatal error on ida/c%dd%d\n",
1040                                 cmd->ctlr, cmd->hdr.unit);
1041                 ok = 0;
1042         }
1043         if (cmd->req.hdr.rcode & RCODE_INVREQ) {
1044                                 printk(KERN_WARNING "Invalid request on ida/c%dd%d = (cmd=%x sect=%d cnt=%d sg=%d ret=%x)\n",
1045                                 cmd->ctlr, cmd->hdr.unit, cmd->req.hdr.cmd,
1046                                 cmd->req.hdr.blk, cmd->req.hdr.blk_cnt,
1047                                 cmd->req.hdr.sg_cnt, cmd->req.hdr.rcode);
1048                 ok = 0;
1049         }
1050         if (timeout) ok = 0;
1051         /* unmap the DMA mapping for all the scatter gather elements */
1052         if (cmd->req.hdr.cmd == IDA_READ)
1053                 ddir = PCI_DMA_FROMDEVICE;
1054         else
1055                 ddir = PCI_DMA_TODEVICE;
1056         for(i=0; i<cmd->req.hdr.sg_cnt; i++)
1057                 pci_unmap_page(hba[cmd->ctlr]->pci_dev, cmd->req.sg[i].addr,
1058                                 cmd->req.sg[i].size, ddir);
1059
1060         complete_buffers(cmd->rq->bio, ok);
1061
1062         DBGPX(printk("Done with %p\n", cmd->rq););
1063         end_that_request_last(cmd->rq);
1064 }
1065
1066 /*
1067  *  The controller will interrupt us upon completion of commands.
1068  *  Find the command on the completion queue, remove it, tell the OS and
1069  *  try to queue up more IO
1070  */
1071 static irqreturn_t do_ida_intr(int irq, void *dev_id, struct pt_regs *regs)
1072 {
1073         ctlr_info_t *h = dev_id;
1074         cmdlist_t *c;
1075         unsigned long istat;
1076         unsigned long flags;
1077         __u32 a,a1;
1078
1079         istat = h->access.intr_pending(h);
1080         /* Is this interrupt for us? */
1081         if (istat == 0)
1082                 return IRQ_NONE;
1083
1084         /*
1085          * If there are completed commands in the completion queue,
1086          * we had better do something about it.
1087          */
1088         spin_lock_irqsave(IDA_LOCK(h->ctlr), flags);
1089         if (istat & FIFO_NOT_EMPTY) {
1090                 while((a = h->access.command_completed(h))) {
1091                         a1 = a; a &= ~3;
1092                         if ((c = h->cmpQ) == NULL)
1093                         {
1094                                 printk(KERN_WARNING "cpqarray: Completion of %08lx ignored\n", (unsigned long)a1);
1095                                 continue;
1096                         }
1097                         while(c->busaddr != a) {
1098                                 c = c->next;
1099                                 if (c == h->cmpQ)
1100                                         break;
1101                         }
1102                         /*
1103                          * If we've found the command, take it off the
1104                          * completion Q and free it
1105                          */
1106                         if (c->busaddr == a) {
1107                                 removeQ(&h->cmpQ, c);
1108                                 /*  Check for invalid command.
1109                                  *  Controller returns command error,
1110                                  *  But rcode = 0.
1111                                  */
1112
1113                                 if((a1 & 0x03) && (c->req.hdr.rcode == 0))
1114                                 {
1115                                         c->req.hdr.rcode = RCODE_INVREQ;
1116                                 }
1117                                 if (c->type == CMD_RWREQ) {
1118                                         complete_command(c, 0);
1119                                         cmd_free(h, c, 1);
1120                                 } else if (c->type == CMD_IOCTL_PEND) {
1121                                         c->type = CMD_IOCTL_DONE;
1122                                 }
1123                                 continue;
1124                         }
1125                 }
1126         }
1127
1128         /*
1129          * See if we can queue up some more IO
1130          */
1131         do_ida_request(h->queue);
1132         spin_unlock_irqrestore(IDA_LOCK(h->ctlr), flags);
1133         return IRQ_HANDLED;
1134 }
1135
1136 /*
1137  * This timer was for timing out requests that haven't happened after
1138  * IDA_TIMEOUT.  That wasn't such a good idea.  This timer is used to
1139  * reset a flags structure so we don't flood the user with
1140  * "Non-Fatal error" messages.
1141  */
1142 static void ida_timer(unsigned long tdata)
1143 {
1144         ctlr_info_t *h = (ctlr_info_t*)tdata;
1145
1146         h->timer.expires = jiffies + IDA_TIMER;
1147         add_timer(&h->timer);
1148         h->misc_tflags = 0;
1149 }
1150
1151 /*
1152  *  ida_ioctl does some miscellaneous stuff like reporting drive geometry,
1153  *  setting readahead and submitting commands from userspace to the controller.
1154  */
1155 static int ida_ioctl(struct inode *inode, struct file *filep, unsigned int cmd, unsigned long arg)
1156 {
1157         drv_info_t *drv = get_drv(inode->i_bdev->bd_disk);
1158         ctlr_info_t *host = get_host(inode->i_bdev->bd_disk);
1159         int error;
1160         int diskinfo[4];
1161         struct hd_geometry __user *geo = (struct hd_geometry __user *)arg;
1162         ida_ioctl_t __user *io = (ida_ioctl_t __user *)arg;
1163         ida_ioctl_t *my_io;
1164
1165         switch(cmd) {
1166         case HDIO_GETGEO:
1167                 if (drv->cylinders) {
1168                         diskinfo[0] = drv->heads;
1169                         diskinfo[1] = drv->sectors;
1170                         diskinfo[2] = drv->cylinders;
1171                 } else {
1172                         diskinfo[0] = 0xff;
1173                         diskinfo[1] = 0x3f;
1174                         diskinfo[2] = drv->nr_blks / (0xff*0x3f);
1175                 }
1176                 put_user(diskinfo[0], &geo->heads);
1177                 put_user(diskinfo[1], &geo->sectors);
1178                 put_user(diskinfo[2], &geo->cylinders);
1179                 put_user(get_start_sect(inode->i_bdev), &geo->start);
1180                 return 0;
1181         case IDAGETDRVINFO:
1182                 if (copy_to_user(&io->c.drv, drv, sizeof(drv_info_t)))
1183                         return -EFAULT;
1184                 return 0;
1185         case IDAPASSTHRU:
1186                 if (!capable(CAP_SYS_RAWIO))
1187                         return -EPERM;
1188                 my_io = kmalloc(sizeof(ida_ioctl_t), GFP_KERNEL);
1189                 if (!my_io)
1190                         return -ENOMEM;
1191                 error = -EFAULT;
1192                 if (copy_from_user(my_io, io, sizeof(*my_io)))
1193                         goto out_passthru;
1194                 error = ida_ctlr_ioctl(host, drv - host->drv, my_io);
1195                 if (error)
1196                         goto out_passthru;
1197                 error = -EFAULT;
1198                 if (copy_to_user(io, my_io, sizeof(*my_io)))
1199                         goto out_passthru;
1200                 error = 0;
1201 out_passthru:
1202                 kfree(my_io);
1203                 return error;
1204         case IDAGETCTLRSIG:
1205                 if (!arg) return -EINVAL;
1206                 put_user(host->ctlr_sig, (int __user *)arg);
1207                 return 0;
1208         case IDAREVALIDATEVOLS:
1209                 if (iminor(inode) != 0)
1210                         return -ENXIO;
1211                 return revalidate_allvol(host);
1212         case IDADRIVERVERSION:
1213                 if (!arg) return -EINVAL;
1214                 put_user(DRIVER_VERSION, (unsigned long __user *)arg);
1215                 return 0;
1216         case IDAGETPCIINFO:
1217         {
1218
1219                 ida_pci_info_struct pciinfo;
1220
1221                 if (!arg) return -EINVAL;
1222                 pciinfo.bus = host->pci_dev->bus->number;
1223                 pciinfo.dev_fn = host->pci_dev->devfn;
1224                 pciinfo.board_id = host->board_id;
1225                 if(copy_to_user((void __user *) arg, &pciinfo,
1226                         sizeof( ida_pci_info_struct)))
1227                                 return -EFAULT;
1228                 return(0);
1229         }
1230
1231         default:
1232                 return -EINVAL;
1233         }
1234
1235 }
1236 /*
1237  * ida_ctlr_ioctl is for passing commands to the controller from userspace.
1238  * The command block (io) has already been copied to kernel space for us,
1239  * however, any elements in the sglist need to be copied to kernel space
1240  * or copied back to userspace.
1241  *
1242  * Only root may perform a controller passthru command, however I'm not doing
1243  * any serious sanity checking on the arguments.  Doing an IDA_WRITE_MEDIA and
1244  * putting a 64M buffer in the sglist is probably a *bad* idea.
1245  */
1246 static int ida_ctlr_ioctl(ctlr_info_t *h, int dsk, ida_ioctl_t *io)
1247 {
1248         int ctlr = h->ctlr;
1249         cmdlist_t *c;
1250         void *p = NULL;
1251         unsigned long flags;
1252         int error;
1253
1254         if ((c = cmd_alloc(h, 0)) == NULL)
1255                 return -ENOMEM;
1256         c->ctlr = ctlr;
1257         c->hdr.unit = (io->unit & UNITVALID) ? (io->unit & ~UNITVALID) : dsk;
1258         c->hdr.size = sizeof(rblk_t) >> 2;
1259         c->size += sizeof(rblk_t);
1260
1261         c->req.hdr.cmd = io->cmd;
1262         c->req.hdr.blk = io->blk;
1263         c->req.hdr.blk_cnt = io->blk_cnt;
1264         c->type = CMD_IOCTL_PEND;
1265
1266         /* Pre submit processing */
1267         switch(io->cmd) {
1268         case PASSTHRU_A:
1269                 p = kmalloc(io->sg[0].size, GFP_KERNEL);
1270                 if (!p)
1271                 {
1272                         error = -ENOMEM;
1273                         cmd_free(h, c, 0);
1274                         return(error);
1275                 }
1276                 if (copy_from_user(p, io->sg[0].addr, io->sg[0].size)) {
1277                         kfree(p);
1278                         cmd_free(h, c, 0);
1279                         return -EFAULT;
1280                 }
1281                 c->req.hdr.blk = pci_map_single(h->pci_dev, &(io->c),
1282                                 sizeof(ida_ioctl_t),
1283                                 PCI_DMA_BIDIRECTIONAL);
1284                 c->req.sg[0].size = io->sg[0].size;
1285                 c->req.sg[0].addr = pci_map_single(h->pci_dev, p,
1286                         c->req.sg[0].size, PCI_DMA_BIDIRECTIONAL);
1287                 c->req.hdr.sg_cnt = 1;
1288                 break;
1289         case IDA_READ:
1290         case READ_FLASH_ROM:
1291         case SENSE_CONTROLLER_PERFORMANCE:
1292                 p = kmalloc(io->sg[0].size, GFP_KERNEL);
1293                 if (!p)
1294                 {
1295                         error = -ENOMEM;
1296                         cmd_free(h, c, 0);
1297                         return(error);
1298                 }
1299
1300                 c->req.sg[0].size = io->sg[0].size;
1301                 c->req.sg[0].addr = pci_map_single(h->pci_dev, p,
1302                         c->req.sg[0].size, PCI_DMA_BIDIRECTIONAL);
1303                 c->req.hdr.sg_cnt = 1;
1304                 break;
1305         case IDA_WRITE:
1306         case IDA_WRITE_MEDIA:
1307         case DIAG_PASS_THRU:
1308         case COLLECT_BUFFER:
1309         case WRITE_FLASH_ROM:
1310                 p = kmalloc(io->sg[0].size, GFP_KERNEL);
1311                 if (!p)
1312                 {
1313                         error = -ENOMEM;
1314                         cmd_free(h, c, 0);
1315                         return(error);
1316                 }
1317                 if (copy_from_user(p, io->sg[0].addr, io->sg[0].size)) {
1318                         kfree(p);
1319                         cmd_free(h, c, 0);
1320                         return -EFAULT;
1321                 }
1322                 c->req.sg[0].size = io->sg[0].size;
1323                 c->req.sg[0].addr = pci_map_single(h->pci_dev, p,
1324                         c->req.sg[0].size, PCI_DMA_BIDIRECTIONAL);
1325                 c->req.hdr.sg_cnt = 1;
1326                 break;
1327         default:
1328                 c->req.sg[0].size = sizeof(io->c);
1329                 c->req.sg[0].addr = pci_map_single(h->pci_dev,&io->c,
1330                         c->req.sg[0].size, PCI_DMA_BIDIRECTIONAL);
1331                 c->req.hdr.sg_cnt = 1;
1332         }
1333
1334         /* Put the request on the tail of the request queue */
1335         spin_lock_irqsave(IDA_LOCK(ctlr), flags);
1336         addQ(&h->reqQ, c);
1337         h->Qdepth++;
1338         start_io(h);
1339         spin_unlock_irqrestore(IDA_LOCK(ctlr), flags);
1340
1341         /* Wait for completion */
1342         while(c->type != CMD_IOCTL_DONE)
1343                 schedule();
1344
1345         /* Unmap the DMA  */
1346         pci_unmap_single(h->pci_dev, c->req.sg[0].addr, c->req.sg[0].size,
1347                 PCI_DMA_BIDIRECTIONAL);
1348         /* Post submit processing */
1349         switch(io->cmd) {
1350         case PASSTHRU_A:
1351                 pci_unmap_single(h->pci_dev, c->req.hdr.blk,
1352                                 sizeof(ida_ioctl_t),
1353                                 PCI_DMA_BIDIRECTIONAL);
1354         case IDA_READ:
1355         case DIAG_PASS_THRU:
1356         case SENSE_CONTROLLER_PERFORMANCE:
1357         case READ_FLASH_ROM:
1358                 if (copy_to_user(io->sg[0].addr, p, io->sg[0].size)) {
1359                         kfree(p);
1360                         return -EFAULT;
1361                 }
1362                 /* fall through and free p */
1363         case IDA_WRITE:
1364         case IDA_WRITE_MEDIA:
1365         case COLLECT_BUFFER:
1366         case WRITE_FLASH_ROM:
1367                 kfree(p);
1368                 break;
1369         default:;
1370                 /* Nothing to do */
1371         }
1372
1373         io->rcode = c->req.hdr.rcode;
1374         cmd_free(h, c, 0);
1375         return(0);
1376 }
1377
1378 /*
1379  * Commands are pre-allocated in a large block.  Here we use a simple bitmap
1380  * scheme to suballocte them to the driver.  Operations that are not time
1381  * critical (and can wait for kmalloc and possibly sleep) can pass in NULL
1382  * as the first argument to get a new command.
1383  */
1384 static cmdlist_t * cmd_alloc(ctlr_info_t *h, int get_from_pool)
1385 {
1386         cmdlist_t * c;
1387         int i;
1388         dma_addr_t cmd_dhandle;
1389
1390         if (!get_from_pool) {
1391                 c = (cmdlist_t*)pci_alloc_consistent(h->pci_dev,
1392                         sizeof(cmdlist_t), &cmd_dhandle);
1393                 if(c==NULL)
1394                         return NULL;
1395         } else {
1396                 do {
1397                         i = find_first_zero_bit(h->cmd_pool_bits, NR_CMDS);
1398                         if (i == NR_CMDS)
1399                                 return NULL;
1400                 } while(test_and_set_bit(i&(BITS_PER_LONG-1), h->cmd_pool_bits+(i/BITS_PER_LONG)) != 0);
1401                 c = h->cmd_pool + i;
1402                 cmd_dhandle = h->cmd_pool_dhandle + i*sizeof(cmdlist_t);
1403                 h->nr_allocs++;
1404         }
1405
1406         memset(c, 0, sizeof(cmdlist_t));
1407         c->busaddr = cmd_dhandle;
1408         return c;
1409 }
1410
1411 static void cmd_free(ctlr_info_t *h, cmdlist_t *c, int got_from_pool)
1412 {
1413         int i;
1414
1415         if (!got_from_pool) {
1416                 pci_free_consistent(h->pci_dev, sizeof(cmdlist_t), c,
1417                         c->busaddr);
1418         } else {
1419                 i = c - h->cmd_pool;
1420                 clear_bit(i&(BITS_PER_LONG-1), h->cmd_pool_bits+(i/BITS_PER_LONG));
1421                 h->nr_frees++;
1422         }
1423 }
1424
1425 /***********************************************************************
1426     name:        sendcmd
1427     Send a command to an IDA using the memory mapped FIFO interface
1428     and wait for it to complete.
1429     This routine should only be called at init time.
1430 ***********************************************************************/
1431 static int sendcmd(
1432         __u8    cmd,
1433         int     ctlr,
1434         void    *buff,
1435         size_t  size,
1436         unsigned int blk,
1437         unsigned int blkcnt,
1438         unsigned int log_unit )
1439 {
1440         cmdlist_t *c;
1441         int complete;
1442         unsigned long temp;
1443         unsigned long i;
1444         ctlr_info_t *info_p = hba[ctlr];
1445
1446         c = cmd_alloc(info_p, 1);
1447         if(!c)
1448                 return IO_ERROR;
1449         c->ctlr = ctlr;
1450         c->hdr.unit = log_unit;
1451         c->hdr.prio = 0;
1452         c->hdr.size = sizeof(rblk_t) >> 2;
1453         c->size += sizeof(rblk_t);
1454
1455         /* The request information. */
1456         c->req.hdr.next = 0;
1457         c->req.hdr.rcode = 0;
1458         c->req.bp = 0;
1459         c->req.hdr.sg_cnt = 1;
1460         c->req.hdr.reserved = 0;
1461
1462         if (size == 0)
1463                 c->req.sg[0].size = 512;
1464         else
1465                 c->req.sg[0].size = size;
1466
1467         c->req.hdr.blk = blk;
1468         c->req.hdr.blk_cnt = blkcnt;
1469         c->req.hdr.cmd = (unsigned char) cmd;
1470         c->req.sg[0].addr = (__u32) pci_map_single(info_p->pci_dev,
1471                 buff, c->req.sg[0].size, PCI_DMA_BIDIRECTIONAL);
1472         /*
1473          * Disable interrupt
1474          */
1475         info_p->access.set_intr_mask(info_p, 0);
1476         /* Make sure there is room in the command FIFO */
1477         /* Actually it should be completely empty at this time. */
1478         for (i = 200000; i > 0; i--) {
1479                 temp = info_p->access.fifo_full(info_p);
1480                 if (temp != 0) {
1481                         break;
1482                 }
1483                 udelay(10);
1484 DBG(
1485                 printk(KERN_WARNING "cpqarray ida%d: idaSendPciCmd FIFO full,"
1486                         " waiting!\n", ctlr);
1487 );
1488         }
1489         /*
1490          * Send the cmd
1491          */
1492         info_p->access.submit_command(info_p, c);
1493         complete = pollcomplete(ctlr);
1494
1495         pci_unmap_single(info_p->pci_dev, (dma_addr_t) c->req.sg[0].addr,
1496                 c->req.sg[0].size, PCI_DMA_BIDIRECTIONAL);
1497         if (complete != 1) {
1498                 if (complete != c->busaddr) {
1499                         printk( KERN_WARNING
1500                         "cpqarray ida%d: idaSendPciCmd "
1501                       "Invalid command list address returned! (%08lx)\n",
1502                                 ctlr, (unsigned long)complete);
1503                         cmd_free(info_p, c, 1);
1504                         return (IO_ERROR);
1505                 }
1506         } else {
1507                 printk( KERN_WARNING
1508                         "cpqarray ida%d: idaSendPciCmd Timeout out, "
1509                         "No command list address returned!\n",
1510                         ctlr);
1511                 cmd_free(info_p, c, 1);
1512                 return (IO_ERROR);
1513         }
1514
1515         if (c->req.hdr.rcode & 0x00FE) {
1516                 if (!(c->req.hdr.rcode & BIG_PROBLEM)) {
1517                         printk( KERN_WARNING
1518                         "cpqarray ida%d: idaSendPciCmd, error: "
1519                                 "Controller failed at init time "
1520                                 "cmd: 0x%x, return code = 0x%x\n",
1521                                 ctlr, c->req.hdr.cmd, c->req.hdr.rcode);
1522
1523                         cmd_free(info_p, c, 1);
1524                         return (IO_ERROR);
1525                 }
1526         }
1527         cmd_free(info_p, c, 1);
1528         return (IO_OK);
1529 }
1530
1531 /*
1532  * revalidate_allvol is for online array config utilities.  After a
1533  * utility reconfigures the drives in the array, it can use this function
1534  * (through an ioctl) to make the driver zap any previous disk structs for
1535  * that controller and get new ones.
1536  *
1537  * Right now I'm using the getgeometry() function to do this, but this
1538  * function should probably be finer grained and allow you to revalidate one
1539  * particualar logical volume (instead of all of them on a particular
1540  * controller).
1541  */
1542 static int revalidate_allvol(ctlr_info_t *host)
1543 {
1544         int ctlr = host->ctlr;
1545         int i;
1546         unsigned long flags;
1547
1548         spin_lock_irqsave(IDA_LOCK(ctlr), flags);
1549         if (host->usage_count > 1) {
1550                 spin_unlock_irqrestore(IDA_LOCK(ctlr), flags);
1551                 printk(KERN_WARNING "cpqarray: Device busy for volume"
1552                         " revalidation (usage=%d)\n", host->usage_count);
1553                 return -EBUSY;
1554         }
1555         host->usage_count++;
1556         spin_unlock_irqrestore(IDA_LOCK(ctlr), flags);
1557
1558         /*
1559          * Set the partition and block size structures for all volumes
1560          * on this controller to zero.  We will reread all of this data
1561          */
1562         set_capacity(ida_gendisk[ctlr][0], 0);
1563         for (i = 1; i < NWD; i++) {
1564                 struct gendisk *disk = ida_gendisk[ctlr][i];
1565                 if (disk->flags & GENHD_FL_UP)
1566                         del_gendisk(disk);
1567         }
1568         memset(host->drv, 0, sizeof(drv_info_t)*NWD);
1569
1570         /*
1571          * Tell the array controller not to give us any interrupts while
1572          * we check the new geometry.  Then turn interrupts back on when
1573          * we're done.
1574          */
1575         host->access.set_intr_mask(host, 0);
1576         getgeometry(ctlr);
1577         host->access.set_intr_mask(host, FIFO_NOT_EMPTY);
1578
1579         for(i=0; i<NWD; i++) {
1580                 struct gendisk *disk = ida_gendisk[ctlr][i];
1581                 drv_info_t *drv = &host->drv[i];
1582                 if (i && !drv->nr_blks)
1583                         continue;
1584                 blk_queue_hardsect_size(host->queue, drv->blk_size);
1585                 set_capacity(disk, drv->nr_blks);
1586                 disk->queue = host->queue;
1587                 disk->private_data = drv;
1588                 if (i)
1589                         add_disk(disk);
1590         }
1591
1592         host->usage_count--;
1593         return 0;
1594 }
1595
1596 static int ida_revalidate(struct gendisk *disk)
1597 {
1598         drv_info_t *drv = disk->private_data;
1599         set_capacity(disk, drv->nr_blks);
1600         return 0;
1601 }
1602
1603 /********************************************************************
1604     name: pollcomplete
1605     Wait polling for a command to complete.
1606     The memory mapped FIFO is polled for the completion.
1607     Used only at init time, interrupts disabled.
1608  ********************************************************************/
1609 static int pollcomplete(int ctlr)
1610 {
1611         int done;
1612         int i;
1613
1614         /* Wait (up to 2 seconds) for a command to complete */
1615
1616         for (i = 200000; i > 0; i--) {
1617                 done = hba[ctlr]->access.command_completed(hba[ctlr]);
1618                 if (done == 0) {
1619                         udelay(10);     /* a short fixed delay */
1620                 } else
1621                         return (done);
1622         }
1623         /* Invalid address to tell caller we ran out of time */
1624         return 1;
1625 }
1626 /*****************************************************************
1627     start_fwbk
1628     Starts controller firmwares background processing.
1629     Currently only the Integrated Raid controller needs this done.
1630     If the PCI mem address registers are written to after this,
1631          data corruption may occur
1632 *****************************************************************/
1633 static void start_fwbk(int ctlr)
1634 {
1635                 id_ctlr_t *id_ctlr_buf;
1636         int ret_code;
1637
1638         if(     (hba[ctlr]->board_id != 0x40400E11)
1639                 && (hba[ctlr]->board_id != 0x40480E11) )
1640
1641         /* Not a Integrated Raid, so there is nothing for us to do */
1642                 return;
1643         printk(KERN_DEBUG "cpqarray: Starting firmware's background"
1644                 " processing\n");
1645         /* Command does not return anything, but idasend command needs a
1646                 buffer */
1647         id_ctlr_buf = (id_ctlr_t *)kmalloc(sizeof(id_ctlr_t), GFP_KERNEL);
1648         if(id_ctlr_buf==NULL)
1649         {
1650                 printk(KERN_WARNING "cpqarray: Out of memory. "
1651                         "Unable to start background processing.\n");
1652                 return;
1653         }
1654         ret_code = sendcmd(RESUME_BACKGROUND_ACTIVITY, ctlr,
1655                 id_ctlr_buf, 0, 0, 0, 0);
1656         if(ret_code != IO_OK)
1657                 printk(KERN_WARNING "cpqarray: Unable to start"
1658                         " background processing\n");
1659
1660         kfree(id_ctlr_buf);
1661 }
1662 /*****************************************************************
1663     getgeometry
1664     Get ida logical volume geometry from the controller
1665     This is a large bit of code which once existed in two flavors,
1666     It is used only at init time.
1667 *****************************************************************/
1668 static void getgeometry(int ctlr)
1669 {
1670         id_log_drv_t *id_ldrive;
1671         id_ctlr_t *id_ctlr_buf;
1672         sense_log_drv_stat_t *id_lstatus_buf;
1673         config_t *sense_config_buf;
1674         unsigned int log_unit, log_index;
1675         int ret_code, size;
1676         drv_info_t *drv;
1677         ctlr_info_t *info_p = hba[ctlr];
1678         int i;
1679
1680         info_p->log_drv_map = 0;
1681
1682         id_ldrive = (id_log_drv_t *)kmalloc(sizeof(id_log_drv_t), GFP_KERNEL);
1683         if(id_ldrive == NULL)
1684         {
1685                 printk( KERN_ERR "cpqarray:  out of memory.\n");
1686                 return;
1687         }
1688
1689         id_ctlr_buf = (id_ctlr_t *)kmalloc(sizeof(id_ctlr_t), GFP_KERNEL);
1690         if(id_ctlr_buf == NULL)
1691         {
1692                 kfree(id_ldrive);
1693                 printk( KERN_ERR "cpqarray:  out of memory.\n");
1694                 return;
1695         }
1696
1697         id_lstatus_buf = (sense_log_drv_stat_t *)kmalloc(sizeof(sense_log_drv_stat_t), GFP_KERNEL);
1698         if(id_lstatus_buf == NULL)
1699         {
1700                 kfree(id_ctlr_buf);
1701                 kfree(id_ldrive);
1702                 printk( KERN_ERR "cpqarray:  out of memory.\n");
1703                 return;
1704         }
1705
1706         sense_config_buf = (config_t *)kmalloc(sizeof(config_t), GFP_KERNEL);
1707         if(sense_config_buf == NULL)
1708         {
1709                 kfree(id_lstatus_buf);
1710                 kfree(id_ctlr_buf);
1711                 kfree(id_ldrive);
1712                 printk( KERN_ERR "cpqarray:  out of memory.\n");
1713                 return;
1714         }
1715
1716         memset(id_ldrive, 0, sizeof(id_log_drv_t));
1717         memset(id_ctlr_buf, 0, sizeof(id_ctlr_t));
1718         memset(id_lstatus_buf, 0, sizeof(sense_log_drv_stat_t));
1719         memset(sense_config_buf, 0, sizeof(config_t));
1720
1721         info_p->phys_drives = 0;
1722         info_p->log_drv_map = 0;
1723         info_p->drv_assign_map = 0;
1724         info_p->drv_spare_map = 0;
1725         info_p->mp_failed_drv_map = 0;  /* only initialized here */
1726         /* Get controllers info for this logical drive */
1727         ret_code = sendcmd(ID_CTLR, ctlr, id_ctlr_buf, 0, 0, 0, 0);
1728         if (ret_code == IO_ERROR) {
1729                 /*
1730                  * If can't get controller info, set the logical drive map to 0,
1731                  * so the idastubopen will fail on all logical drives
1732                  * on the controller.
1733                  */
1734                  /* Free all the buffers and return */
1735                 printk(KERN_ERR "cpqarray: error sending ID controller\n");
1736                 kfree(sense_config_buf);
1737                 kfree(id_lstatus_buf);
1738                 kfree(id_ctlr_buf);
1739                 kfree(id_ldrive);
1740                 return;
1741         }
1742
1743         info_p->log_drives = id_ctlr_buf->nr_drvs;
1744         for(i=0;i<4;i++)
1745                 info_p->firm_rev[i] = id_ctlr_buf->firm_rev[i];
1746         info_p->ctlr_sig = id_ctlr_buf->cfg_sig;
1747
1748         printk(" (%s)\n", info_p->product_name);
1749         /*
1750          * Initialize logical drive map to zero
1751          */
1752         log_index = 0;
1753         /*
1754          * Get drive geometry for all logical drives
1755          */
1756         if (id_ctlr_buf->nr_drvs > 16)
1757                 printk(KERN_WARNING "cpqarray ida%d:  This driver supports "
1758                         "16 logical drives per controller.\n.  "
1759                         " Additional drives will not be "
1760                         "detected\n", ctlr);
1761
1762         for (log_unit = 0;
1763              (log_index < id_ctlr_buf->nr_drvs)
1764              && (log_unit < NWD);
1765              log_unit++) {
1766                 struct gendisk *disk = ida_gendisk[ctlr][log_unit];
1767
1768                 size = sizeof(sense_log_drv_stat_t);
1769
1770                 /*
1771                    Send "Identify logical drive status" cmd
1772                  */
1773                 ret_code = sendcmd(SENSE_LOG_DRV_STAT,
1774                              ctlr, id_lstatus_buf, size, 0, 0, log_unit);
1775                 if (ret_code == IO_ERROR) {
1776                         /*
1777                            If can't get logical drive status, set
1778                            the logical drive map to 0, so the
1779                            idastubopen will fail for all logical drives
1780                            on the controller.
1781                          */
1782                         info_p->log_drv_map = 0;
1783                         printk( KERN_WARNING
1784                              "cpqarray ida%d: idaGetGeometry - Controller"
1785                                 " failed to report status of logical drive %d\n"
1786                          "Access to this controller has been disabled\n",
1787                                 ctlr, log_unit);
1788                         /* Free all the buffers and return */
1789                         kfree(sense_config_buf);
1790                         kfree(id_lstatus_buf);
1791                         kfree(id_ctlr_buf);
1792                         kfree(id_ldrive);
1793                         return;
1794                 }
1795                 /*
1796                    Make sure the logical drive is configured
1797                  */
1798                 if (id_lstatus_buf->status != LOG_NOT_CONF) {
1799                         ret_code = sendcmd(ID_LOG_DRV, ctlr, id_ldrive,
1800                                sizeof(id_log_drv_t), 0, 0, log_unit);
1801                         /*
1802                            If error, the bit for this
1803                            logical drive won't be set and
1804                            idastubopen will return error.
1805                          */
1806                         if (ret_code != IO_ERROR) {
1807                                 drv = &info_p->drv[log_unit];
1808                                 drv->blk_size = id_ldrive->blk_size;
1809                                 drv->nr_blks = id_ldrive->nr_blks;
1810                                 drv->cylinders = id_ldrive->drv.cyl;
1811                                 drv->heads = id_ldrive->drv.heads;
1812                                 drv->sectors = id_ldrive->drv.sect_per_track;
1813                                 info_p->log_drv_map |=  (1 << log_unit);
1814
1815         printk(KERN_INFO "cpqarray ida/c%dd%d: blksz=%d nr_blks=%d\n",
1816                 ctlr, log_unit, drv->blk_size, drv->nr_blks);
1817                                 ret_code = sendcmd(SENSE_CONFIG,
1818                                                   ctlr, sense_config_buf,
1819                                  sizeof(config_t), 0, 0, log_unit);
1820                                 if (ret_code == IO_ERROR) {
1821                                         info_p->log_drv_map = 0;
1822                                         /* Free all the buffers and return */
1823                                         printk(KERN_ERR "cpqarray: error sending sense config\n");
1824                                         kfree(sense_config_buf);
1825                                         kfree(id_lstatus_buf);
1826                                         kfree(id_ctlr_buf);
1827                                         kfree(id_ldrive);
1828                                         return;
1829
1830                                 }
1831
1832                                 sprintf(disk->devfs_name, "ida/c%dd%d", ctlr, log_unit);
1833
1834                                 info_p->phys_drives =
1835                                     sense_config_buf->ctlr_phys_drv;
1836                                 info_p->drv_assign_map
1837                                     |= sense_config_buf->drv_asgn_map;
1838                                 info_p->drv_assign_map
1839                                     |= sense_config_buf->spare_asgn_map;
1840                                 info_p->drv_spare_map
1841                                     |= sense_config_buf->spare_asgn_map;
1842                         }       /* end of if no error on id_ldrive */
1843                         log_index = log_index + 1;
1844                 }               /* end of if logical drive configured */
1845         }                       /* end of for log_unit */
1846         kfree(sense_config_buf);
1847         kfree(id_ldrive);
1848         kfree(id_lstatus_buf);
1849         kfree(id_ctlr_buf);
1850         return;
1851
1852 }
1853
1854 static void __exit cpqarray_exit(void)
1855 {
1856         int i;
1857
1858         pci_unregister_driver(&cpqarray_pci_driver);
1859
1860         /* Double check that all controller entries have been removed */
1861         for(i=0; i<MAX_CTLR; i++) {
1862                 if (hba[i] != NULL) {
1863                         printk(KERN_WARNING "cpqarray: Removing EISA "
1864                                         "controller %d\n", i);
1865                         cpqarray_remove_one_eisa(i);
1866                 }
1867         }
1868
1869         devfs_remove("ida");
1870         remove_proc_entry("cpqarray", proc_root_driver);
1871 }
1872
1873 module_init(cpqarray_init)
1874 module_exit(cpqarray_exit)