drivers/char/agp/hp-agp.c

   1 /*
   2  * HP zx1 AGPGART routines.
   3  *
   4  * (c) Copyright 2002, 2003 Hewlett-Packard Development Company, L.P.
   5  *      Bjorn Helgaas <bjorn.helgaas@hp.com>
   6  *
   7  * This program is free software; you can redistribute it and/or modify
   8  * it under the terms of the GNU General Public License version 2 as
   9  * published by the Free Software Foundation.
  10  */
  11
  12 #include <linux/acpi.h>
  13 #include <linux/module.h>
  14 #include <linux/pci.h>
  15 #include <linux/init.h>
  16 #include <linux/agp_backend.h>
  17 #include <acpi/acpixf.h>
  18 #include <asm/acpi-ext.h>
  19 #include "agp.h"
  20
  21 #ifndef log2
  22 #define log2(x)         ffz(~(x))
  23 #endif
  24
  25 #define HP_ZX1_IOC_OFFSET       0x1000  /* ACPI reports SBA, we want IOC */
  26
  27 /* HP ZX1 IOC registers */
  28 #define HP_ZX1_IBASE            0x300
  29 #define HP_ZX1_IMASK            0x308
  30 #define HP_ZX1_PCOM             0x310
  31 #define HP_ZX1_TCNFG            0x318
  32 #define HP_ZX1_PDIR_BASE        0x320
  33
  34 #define HP_ZX1_IOVA_BASE        GB(1UL)
  35 #define HP_ZX1_IOVA_SIZE        GB(1UL)
  36 #define HP_ZX1_GART_SIZE        (HP_ZX1_IOVA_SIZE / 2)
  37 #define HP_ZX1_SBA_IOMMU_COOKIE 0x0000badbadc0ffeeUL
  38
  39 #define HP_ZX1_PDIR_VALID_BIT   0x8000000000000000UL
  40 #define HP_ZX1_IOVA_TO_PDIR(va) ((va - hp_private.iova_base) >> hp_private.io_tlb_shift)
  41
  42 #define AGP8X_MODE_BIT          3
  43 #define AGP8X_MODE              (1 << AGP8X_MODE_BIT)
  44
  45 /* AGP bridge need not be PCI device, but DRM thinks it is. */
  46 static struct pci_dev fake_bridge_dev;
  47
  48 static int hp_zx1_gart_found;
  49
  50 static struct aper_size_info_fixed hp_zx1_sizes[] =
  51 {
  52         {0, 0, 0},              /* filled in by hp_zx1_fetch_size() */
  53 };
  54
  55 static struct gatt_mask hp_zx1_masks[] =
  56 {
  57         {.mask = HP_ZX1_PDIR_VALID_BIT, .type = 0}
  58 };
  59
  60 static struct _hp_private {
  61         volatile u8 __iomem *ioc_regs;
  62         volatile u8 __iomem *lba_regs;
  63         int lba_cap_offset;
  64         u64 *io_pdir;           // PDIR for entire IOVA
  65         u64 *gatt;              // PDIR just for GART (subset of above)
  66         u64 gatt_entries;
  67         u64 iova_base;
  68         u64 gart_base;
  69         u64 gart_size;
  70         u64 io_pdir_size;
  71         int io_pdir_owner;      // do we own it, or share it with sba_iommu?
  72         int io_page_size;
  73         int io_tlb_shift;
  74         int io_tlb_ps;          // IOC ps config
  75         int io_pages_per_kpage;
  76 } hp_private;
  77
  78 static int __init hp_zx1_ioc_shared(void)
  79 {
  80         struct _hp_private *hp = &hp_private;
  81
  82         printk(KERN_INFO PFX "HP ZX1 IOC: IOPDIR shared with sba_iommu\n");
  83
  84         /*
  85          * IOC already configured by sba_iommu module; just use
  86          * its setup.  We assume:
  87          *      - IOVA space is 1Gb in size
  88          *      - first 512Mb is IOMMU, second 512Mb is GART
  89          */
  90         hp->io_tlb_ps = readq(hp->ioc_regs+HP_ZX1_TCNFG);
  91         switch (hp->io_tlb_ps) {
  92                 case 0: hp->io_tlb_shift = 12; break;
  93                 case 1: hp->io_tlb_shift = 13; break;
  94                 case 2: hp->io_tlb_shift = 14; break;
  95                 case 3: hp->io_tlb_shift = 16; break;
  96                 default:
  97                         printk(KERN_ERR PFX "Invalid IOTLB page size "
  98                                "configuration 0x%x\n", hp->io_tlb_ps);
  99                         hp->gatt = NULL;
 100                         hp->gatt_entries = 0;
 101                         return -ENODEV;
 102         }
 103         hp->io_page_size = 1 << hp->io_tlb_shift;
 104         hp->io_pages_per_kpage = PAGE_SIZE / hp->io_page_size;
 105
 106         hp->iova_base = readq(hp->ioc_regs+HP_ZX1_IBASE) & ~0x1;
 107         hp->gart_base = hp->iova_base + HP_ZX1_IOVA_SIZE - HP_ZX1_GART_SIZE;
 108
 109         hp->gart_size = HP_ZX1_GART_SIZE;
 110         hp->gatt_entries = hp->gart_size / hp->io_page_size;
 111
 112         hp->io_pdir = gart_to_virt(readq(hp->ioc_regs+HP_ZX1_PDIR_BASE));
 113         hp->gatt = &hp->io_pdir[HP_ZX1_IOVA_TO_PDIR(hp->gart_base)];
 114
 115         if (hp->gatt[0] != HP_ZX1_SBA_IOMMU_COOKIE) {
 116                 /* Normal case when no AGP device in system */
 117                 hp->gatt = NULL;
 118                 hp->gatt_entries = 0;
 119                 printk(KERN_ERR PFX "No reserved IO PDIR entry found; "
 120                        "GART disabled\n");
 121                 return -ENODEV;
 122         }
 123
 124         return 0;
 125 }
 126
 127 static int __init
 128 hp_zx1_ioc_owner (void)
 129 {
 130         struct _hp_private *hp = &hp_private;
 131
 132         printk(KERN_INFO PFX "HP ZX1 IOC: IOPDIR dedicated to GART\n");
 133
 134         /*
 135          * Select an IOV page size no larger than system page size.
 136          */
 137         if (PAGE_SIZE >= KB(64)) {
 138                 hp->io_tlb_shift = 16;
 139                 hp->io_tlb_ps = 3;
 140         } else if (PAGE_SIZE >= KB(16)) {
 141                 hp->io_tlb_shift = 14;
 142                 hp->io_tlb_ps = 2;
 143         } else if (PAGE_SIZE >= KB(8)) {
 144                 hp->io_tlb_shift = 13;
 145                 hp->io_tlb_ps = 1;
 146         } else {
 147                 hp->io_tlb_shift = 12;
 148                 hp->io_tlb_ps = 0;
 149         }
 150         hp->io_page_size = 1 << hp->io_tlb_shift;
 151         hp->io_pages_per_kpage = PAGE_SIZE / hp->io_page_size;
 152
 153         hp->iova_base = HP_ZX1_IOVA_BASE;
 154         hp->gart_size = HP_ZX1_GART_SIZE;
 155         hp->gart_base = hp->iova_base + HP_ZX1_IOVA_SIZE - hp->gart_size;
 156
 157         hp->gatt_entries = hp->gart_size / hp->io_page_size;
 158         hp->io_pdir_size = (HP_ZX1_IOVA_SIZE / hp->io_page_size) * sizeof(u64);
 159
 160         return 0;
 161 }
 162
 163 static int __init
 164 hp_zx1_ioc_init (u64 hpa)
 165 {
 166         struct _hp_private *hp = &hp_private;
 167
 168         hp->ioc_regs = ioremap(hpa, 1024);
 169         if (!hp->ioc_regs)
 170                 return -ENOMEM;
 171
 172         /*
 173          * If the IOTLB is currently disabled, we can take it over.
 174          * Otherwise, we have to share with sba_iommu.
 175          */
 176         hp->io_pdir_owner = (readq(hp->ioc_regs+HP_ZX1_IBASE) & 0x1) == 0;
 177
 178         if (hp->io_pdir_owner)
 179                 return hp_zx1_ioc_owner();
 180
 181         return hp_zx1_ioc_shared();
 182 }
 183
 184 static int
 185 hp_zx1_lba_find_capability (volatile u8 __iomem *hpa, int cap)
 186 {
 187         u16 status;
 188         u8 pos, id;
 189         int ttl = 48;
 190
 191         status = readw(hpa+PCI_STATUS);
 192         if (!(status & PCI_STATUS_CAP_LIST))
 193                 return 0;
 194         pos = readb(hpa+PCI_CAPABILITY_LIST);
 195         while (ttl-- && pos >= 0x40) {
 196                 pos &= ~3;
 197                 id = readb(hpa+pos+PCI_CAP_LIST_ID);
 198                 if (id == 0xff)
 199                         break;
 200                 if (id == cap)
 201                         return pos;
 202                 pos = readb(hpa+pos+PCI_CAP_LIST_NEXT);
 203         }
 204         return 0;
 205 }
 206
 207 static int __init
 208 hp_zx1_lba_init (u64 hpa)
 209 {
 210         struct _hp_private *hp = &hp_private;
 211         int cap;
 212
 213         hp->lba_regs = ioremap(hpa, 256);
 214         if (!hp->lba_regs)
 215                 return -ENOMEM;
 216
 217         hp->lba_cap_offset = hp_zx1_lba_find_capability(hp->lba_regs, PCI_CAP_ID_AGP);
 218
 219         cap = readl(hp->lba_regs+hp->lba_cap_offset) & 0xff;
 220         if (cap != PCI_CAP_ID_AGP) {
 221                 printk(KERN_ERR PFX "Invalid capability ID 0x%02x at 0x%x\n",
 222                        cap, hp->lba_cap_offset);
 223                 return -ENODEV;
 224         }
 225
 226         return 0;
 227 }
 228
 229 static int
 230 hp_zx1_fetch_size(void)
 231 {
 232         int size;
 233
 234         size = hp_private.gart_size / MB(1);
 235         hp_zx1_sizes[0].size = size;
 236         agp_bridge->current_size = (void *) &hp_zx1_sizes[0];
 237         return size;
 238 }
 239
 240 static int
 241 hp_zx1_configure (void)
 242 {
 243         struct _hp_private *hp = &hp_private;
 244
 245         agp_bridge->gart_bus_addr = hp->gart_base;
 246         agp_bridge->capndx = hp->lba_cap_offset;
 247         agp_bridge->mode = readl(hp->lba_regs+hp->lba_cap_offset+PCI_AGP_STATUS);
 248
 249         if (hp->io_pdir_owner) {
 250                 writel(virt_to_gart(hp->io_pdir), hp->ioc_regs+HP_ZX1_PDIR_BASE);
 251                 readl(hp->ioc_regs+HP_ZX1_PDIR_BASE);
 252                 writel(hp->io_tlb_ps, hp->ioc_regs+HP_ZX1_TCNFG);
 253                 readl(hp->ioc_regs+HP_ZX1_TCNFG);
 254                 writel(~(HP_ZX1_IOVA_SIZE-1), hp->ioc_regs+HP_ZX1_IMASK);
 255                 readl(hp->ioc_regs+HP_ZX1_IMASK);
 256                 writel(hp->iova_base|1, hp->ioc_regs+HP_ZX1_IBASE);
 257                 readl(hp->ioc_regs+HP_ZX1_IBASE);
 258                 writel(hp->iova_base|log2(HP_ZX1_IOVA_SIZE), hp->ioc_regs+HP_ZX1_PCOM);
 259                 readl(hp->ioc_regs+HP_ZX1_PCOM);
 260         }
 261
 262         return 0;
 263 }
 264
 265 static void
 266 hp_zx1_cleanup (void)
 267 {
 268         struct _hp_private *hp = &hp_private;
 269
 270         if (hp->ioc_regs) {
 271                 if (hp->io_pdir_owner) {
 272                         writeq(0, hp->ioc_regs+HP_ZX1_IBASE);
 273                         readq(hp->ioc_regs+HP_ZX1_IBASE);
 274                 }
 275                 iounmap(hp->ioc_regs);
 276         }
 277         if (hp->lba_regs)
 278                 iounmap(hp->lba_regs);
 279 }
 280
 281 static void
 282 hp_zx1_tlbflush (struct agp_memory *mem)
 283 {
 284         struct _hp_private *hp = &hp_private;
 285
 286         writeq(hp->gart_base | log2(hp->gart_size), hp->ioc_regs+HP_ZX1_PCOM);
 287         readq(hp->ioc_regs+HP_ZX1_PCOM);
 288 }
 289
 290 static int
 291 hp_zx1_create_gatt_table (struct agp_bridge_data *bridge)
 292 {
 293         struct _hp_private *hp = &hp_private;
 294         int i;
 295
 296         if (hp->io_pdir_owner) {
 297                 hp->io_pdir = (u64 *) __get_free_pages(GFP_KERNEL,
 298                                                 get_order(hp->io_pdir_size));
 299                 if (!hp->io_pdir) {
 300                         printk(KERN_ERR PFX "Couldn't allocate contiguous "
 301                                 "memory for I/O PDIR\n");
 302                         hp->gatt = NULL;
 303                         hp->gatt_entries = 0;
 304                         return -ENOMEM;
 305                 }
 306                 memset(hp->io_pdir, 0, hp->io_pdir_size);
 307
 308                 hp->gatt = &hp->io_pdir[HP_ZX1_IOVA_TO_PDIR(hp->gart_base)];
 309         }
 310
 311         for (i = 0; i < hp->gatt_entries; i++) {
 312                 hp->gatt[i] = (unsigned long) agp_bridge->scratch_page;
 313         }
 314
 315         return 0;
 316 }
 317
 318 static int
 319 hp_zx1_free_gatt_table (struct agp_bridge_data *bridge)
 320 {
 321         struct _hp_private *hp = &hp_private;
 322
 323         if (hp->io_pdir_owner)
 324                 free_pages((unsigned long) hp->io_pdir,
 325                             get_order(hp->io_pdir_size));
 326         else
 327                 hp->gatt[0] = HP_ZX1_SBA_IOMMU_COOKIE;
 328         return 0;
 329 }
 330
 331 static int
 332 hp_zx1_insert_memory (struct agp_memory *mem, off_t pg_start, int type)
 333 {
 334         struct _hp_private *hp = &hp_private;
 335         int i, k;
 336         off_t j, io_pg_start;
 337         int io_pg_count;
 338
 339         if (type != 0 || mem->type != 0) {
 340                 return -EINVAL;
 341         }
 342
 343         io_pg_start = hp->io_pages_per_kpage * pg_start;
 344         io_pg_count = hp->io_pages_per_kpage * mem->page_count;
 345         if ((io_pg_start + io_pg_count) > hp->gatt_entries) {
 346                 return -EINVAL;
 347         }
 348
 349         j = io_pg_start;
 350         while (j < (io_pg_start + io_pg_count)) {
 351                 if (hp->gatt[j]) {
 352                         return -EBUSY;
 353                 }
 354                 j++;
 355         }
 356
 357         if (mem->is_flushed == FALSE) {
 358                 global_cache_flush();
 359                 mem->is_flushed = TRUE;
 360         }
 361
 362         for (i = 0, j = io_pg_start; i < mem->page_count; i++) {
 363                 unsigned long paddr;
 364
 365                 paddr = mem->memory[i];
 366                 for (k = 0;
 367                      k < hp->io_pages_per_kpage;
 368                      k++, j++, paddr += hp->io_page_size) {
 369                         hp->gatt[j] =
 370                                 agp_bridge->driver->mask_memory(agp_bridge,
 371                                         paddr, type);
 372                 }
 373         }
 374
 375         agp_bridge->driver->tlb_flush(mem);
 376         return 0;
 377 }
 378
 379 static int
 380 hp_zx1_remove_memory (struct agp_memory *mem, off_t pg_start, int type)
 381 {
 382         struct _hp_private *hp = &hp_private;
 383         int i, io_pg_start, io_pg_count;
 384
 385         if (type != 0 || mem->type != 0) {
 386                 return -EINVAL;
 387         }
 388
 389         io_pg_start = hp->io_pages_per_kpage * pg_start;
 390         io_pg_count = hp->io_pages_per_kpage * mem->page_count;
 391         for (i = io_pg_start; i < io_pg_count + io_pg_start; i++) {
 392                 hp->gatt[i] = agp_bridge->scratch_page;
 393         }
 394
 395         agp_bridge->driver->tlb_flush(mem);
 396         return 0;
 397 }
 398
 399 static unsigned long
 400 hp_zx1_mask_memory (struct agp_bridge_data *bridge,
 401         unsigned long addr, int type)
 402 {
 403         return HP_ZX1_PDIR_VALID_BIT | addr;
 404 }
 405
 406 static void
 407 hp_zx1_enable (struct agp_bridge_data *bridge, u32 mode)
 408 {
 409         struct _hp_private *hp = &hp_private;
 410         u32 command;
 411
 412         command = readl(hp->lba_regs+hp->lba_cap_offset+PCI_AGP_STATUS);
 413         command = agp_collect_device_status(bridge, mode, command);
 414         command |= 0x00000100;
 415
 416         writel(command, hp->lba_regs+hp->lba_cap_offset+PCI_AGP_COMMAND);
 417
 418         agp_device_command(command, (mode & AGP8X_MODE) != 0);
 419 }
 420
 421 struct agp_bridge_driver hp_zx1_driver = {
 422         .owner                  = THIS_MODULE,
 423         .size_type              = FIXED_APER_SIZE,
 424         .configure              = hp_zx1_configure,
 425         .fetch_size             = hp_zx1_fetch_size,
 426         .cleanup                = hp_zx1_cleanup,
 427         .tlb_flush              = hp_zx1_tlbflush,
 428         .mask_memory            = hp_zx1_mask_memory,
 429         .masks                  = hp_zx1_masks,
 430         .agp_enable             = hp_zx1_enable,
 431         .cache_flush            = global_cache_flush,
 432         .create_gatt_table      = hp_zx1_create_gatt_table,
 433         .free_gatt_table        = hp_zx1_free_gatt_table,
 434         .insert_memory          = hp_zx1_insert_memory,
 435         .remove_memory          = hp_zx1_remove_memory,
 436         .alloc_by_type          = agp_generic_alloc_by_type,
 437         .free_by_type           = agp_generic_free_by_type,
 438         .agp_alloc_page         = agp_generic_alloc_page,
 439         .agp_destroy_page       = agp_generic_destroy_page,
 440         .cant_use_aperture      = 1,
 441 };
 442
 443 static int __init
 444 hp_zx1_setup (u64 ioc_hpa, u64 lba_hpa)
 445 {
 446         struct agp_bridge_data *bridge;
 447         int error = 0;
 448
 449         error = hp_zx1_ioc_init(ioc_hpa);
 450         if (error)
 451                 goto fail;
 452
 453         error = hp_zx1_lba_init(lba_hpa);
 454         if (error)
 455                 goto fail;
 456
 457         bridge = agp_alloc_bridge();
 458         if (!bridge) {
 459                 error = -ENOMEM;
 460                 goto fail;
 461         }
 462         bridge->driver = &hp_zx1_driver;
 463
 464         fake_bridge_dev.vendor = PCI_VENDOR_ID_HP;
 465         fake_bridge_dev.device = PCI_DEVICE_ID_HP_PCIX_LBA;
 466         bridge->dev = &fake_bridge_dev;
 467
 468         error = agp_add_bridge(bridge);
 469   fail:
 470         if (error)
 471                 hp_zx1_cleanup();
 472         return error;
 473 }
 474
 475 static acpi_status __init
 476 zx1_gart_probe (acpi_handle obj, u32 depth, void *context, void **ret)
 477 {
 478         acpi_handle handle, parent;
 479         acpi_status status;
 480         struct acpi_buffer buffer;
 481         struct acpi_device_info *info;
 482         u64 lba_hpa, sba_hpa, length;
 483         int match;
 484
 485         status = hp_acpi_csr_space(obj, &lba_hpa, &length);
 486         if (ACPI_FAILURE(status))
 487                 return AE_OK; /* keep looking for another bridge */
 488
 489         /* Look for an enclosing IOC scope and find its CSR space */
 490         handle = obj;
 491         do {
 492                 buffer.length = ACPI_ALLOCATE_LOCAL_BUFFER;
 493                 status = acpi_get_object_info(handle, &buffer);
 494                 if (ACPI_SUCCESS(status)) {
 495                         /* TBD check _CID also */
 496                         info = buffer.pointer;
 497                         info->hardware_id.value[sizeof(info->hardware_id)-1] = '\0';
 498                         match = (strcmp(info->hardware_id.value, "HWP0001") == 0);
 499                         ACPI_MEM_FREE(info);
 500                         if (match) {
 501                                 status = hp_acpi_csr_space(handle, &sba_hpa, &length);
 502                                 if (ACPI_SUCCESS(status))
 503                                         break;
 504                                 else {
 505                                         printk(KERN_ERR PFX "Detected HP ZX1 "
 506                                                "AGP LBA but no IOC.\n");
 507                                         return AE_OK;
 508                                 }
 509                         }
 510                 }
 511
 512                 status = acpi_get_parent(handle, &parent);
 513                 handle = parent;
 514         } while (ACPI_SUCCESS(status));
 515
 516         if (hp_zx1_setup(sba_hpa + HP_ZX1_IOC_OFFSET, lba_hpa))
 517                 return AE_OK;
 518
 519         printk(KERN_INFO PFX "Detected HP ZX1 %s AGP chipset (ioc=%lx, lba=%lx)\n",
 520                 (char *) context, sba_hpa + HP_ZX1_IOC_OFFSET, lba_hpa);
 521
 522         hp_zx1_gart_found = 1;
 523         return AE_CTRL_TERMINATE; /* we only support one bridge; quit looking */
 524 }
 525
 526 static int __init
 527 agp_hp_init (void)
 528 {
 529         if (agp_off)
 530                 return -EINVAL;
 531
 532         acpi_get_devices("HWP0003", zx1_gart_probe, "HWP0003", NULL);
 533         if (hp_zx1_gart_found)
 534                 return 0;
 535
 536         acpi_get_devices("HWP0007", zx1_gart_probe, "HWP0007", NULL);
 537         if (hp_zx1_gart_found)
 538                 return 0;
 539
 540         return -ENODEV;
 541 }
 542
 543 static void __exit
 544 agp_hp_cleanup (void)
 545 {
 546 }
 547
 548 module_init(agp_hp_init);
 549 module_exit(agp_hp_cleanup);
 550
 551 MODULE_LICENSE("GPL and additional rights");