2 * Intel AGPGART routines.
6 * Intel(R) 855GM/852GM and 865G support added by David Dawes
7 * <dawes@tungstengraphics.com>.
10 #include <linux/module.h>
11 #include <linux/pci.h>
12 #include <linux/init.h>
13 #include <linux/agp_backend.h>
16 /* Intel 815 register */
17 #define INTEL_815_APCONT 0x51
18 #define INTEL_815_ATTBASE_MASK ~0x1FFFFFFF
20 /* Intel i820 registers */
21 #define INTEL_I820_RDCR 0x51
22 #define INTEL_I820_ERRSTS 0xc8
24 /* Intel i840 registers */
25 #define INTEL_I840_MCHCFG 0x50
26 #define INTEL_I840_ERRSTS 0xc8
28 /* Intel i850 registers */
29 #define INTEL_I850_MCHCFG 0x50
30 #define INTEL_I850_ERRSTS 0xc8
32 /* Intel 7505 registers */
33 #define INTEL_I7505_APSIZE 0x74
34 #define INTEL_I7505_NCAPID 0x60
35 #define INTEL_I7505_NISTAT 0x6c
36 #define INTEL_I7505_ATTBASE 0x78
37 #define INTEL_I7505_ERRSTS 0x42
38 #define INTEL_I7505_AGPCTRL 0x70
39 #define INTEL_I7505_MCHCFG 0x50
41 static struct aper_size_info_fixed intel_i810_sizes[] =
44 /* The 32M mode still requires a 64k gatt */
48 #define AGP_DCACHE_MEMORY 1
49 #define AGP_PHYS_MEMORY 2
51 static struct gatt_mask intel_i810_masks[] =
53 {.mask = I810_PTE_VALID, .type = 0},
54 {.mask = (I810_PTE_VALID | I810_PTE_LOCAL), .type = AGP_DCACHE_MEMORY},
55 {.mask = I810_PTE_VALID, .type = 0}
58 static struct _intel_i810_private {
59 struct pci_dev *i810_dev; /* device one */
60 volatile u8 *registers;
61 int num_dcache_entries;
64 static int intel_i810_fetch_size(void)
67 struct aper_size_info_fixed *values;
69 pci_read_config_dword(agp_bridge->dev, I810_SMRAM_MISCC, &smram_miscc);
70 values = A_SIZE_FIX(agp_bridge->driver->aperture_sizes);
72 if ((smram_miscc & I810_GMS) == I810_GMS_DISABLE) {
73 printk(KERN_WARNING PFX "i810 is disabled\n");
76 if ((smram_miscc & I810_GFX_MEM_WIN_SIZE) == I810_GFX_MEM_WIN_32M) {
77 agp_bridge->previous_size =
78 agp_bridge->current_size = (void *) (values + 1);
79 agp_bridge->aperture_size_idx = 1;
80 return values[1].size;
82 agp_bridge->previous_size =
83 agp_bridge->current_size = (void *) (values);
84 agp_bridge->aperture_size_idx = 0;
85 return values[0].size;
91 static int intel_i810_configure(void)
93 struct aper_size_info_fixed *current_size;
97 current_size = A_SIZE_FIX(agp_bridge->current_size);
99 pci_read_config_dword(intel_i810_private.i810_dev, I810_MMADDR, &temp);
102 intel_i810_private.registers = (volatile u8 *) ioremap(temp, 128 * 4096);
103 if (!intel_i810_private.registers) {
104 printk(KERN_ERR PFX "Unable to remap memory.\n");
108 if ((INREG32(intel_i810_private.registers, I810_DRAM_CTL)
109 & I810_DRAM_ROW_0) == I810_DRAM_ROW_0_SDRAM) {
110 /* This will need to be dynamically assigned */
111 printk(KERN_INFO PFX "detected 4MB dedicated video ram.\n");
112 intel_i810_private.num_dcache_entries = 1024;
114 pci_read_config_dword(intel_i810_private.i810_dev, I810_GMADDR, &temp);
115 agp_bridge->gart_bus_addr = (temp & PCI_BASE_ADDRESS_MEM_MASK);
116 OUTREG32(intel_i810_private.registers, I810_PGETBL_CTL,
117 agp_bridge->gatt_bus_addr | I810_PGETBL_ENABLED);
118 global_cache_flush();
120 if (agp_bridge->driver->needs_scratch_page) {
121 for (i = 0; i < current_size->num_entries; i++) {
122 OUTREG32(intel_i810_private.registers,
123 I810_PTE_BASE + (i * 4),
124 agp_bridge->scratch_page);
130 static void intel_i810_cleanup(void)
132 OUTREG32(intel_i810_private.registers, I810_PGETBL_CTL, 0);
133 iounmap((void *) intel_i810_private.registers);
136 static void intel_i810_tlbflush(struct agp_memory *mem)
141 static void intel_i810_agp_enable(u32 mode)
146 static int intel_i810_insert_entries(struct agp_memory *mem, off_t pg_start,
149 int i, j, num_entries;
152 temp = agp_bridge->current_size;
153 num_entries = A_SIZE_FIX(temp)->num_entries;
155 if ((pg_start + mem->page_count) > num_entries) {
158 for (j = pg_start; j < (pg_start + mem->page_count); j++) {
159 if (!PGE_EMPTY(agp_bridge, agp_bridge->gatt_table[j]))
163 if (type != 0 || mem->type != 0) {
164 if ((type == AGP_DCACHE_MEMORY) && (mem->type == AGP_DCACHE_MEMORY)) {
166 global_cache_flush();
167 for (i = pg_start; i < (pg_start + mem->page_count); i++) {
168 OUTREG32(intel_i810_private.registers,
169 I810_PTE_BASE + (i * 4),
170 (i * 4096) | I810_PTE_LOCAL |
173 global_cache_flush();
174 agp_bridge->driver->tlb_flush(mem);
177 if((type == AGP_PHYS_MEMORY) && (mem->type == AGP_PHYS_MEMORY))
183 global_cache_flush();
184 for (i = 0, j = pg_start; i < mem->page_count; i++, j++) {
185 OUTREG32(intel_i810_private.registers,
186 I810_PTE_BASE + (j * 4),
187 agp_bridge->driver->mask_memory(mem->memory[i], mem->type));
189 global_cache_flush();
191 agp_bridge->driver->tlb_flush(mem);
195 static int intel_i810_remove_entries(struct agp_memory *mem, off_t pg_start,
200 for (i = pg_start; i < (mem->page_count + pg_start); i++) {
201 OUTREG32(intel_i810_private.registers,
202 I810_PTE_BASE + (i * 4),
203 agp_bridge->scratch_page);
206 global_cache_flush();
207 agp_bridge->driver->tlb_flush(mem);
212 * The i810/i830 requires a physical address to program its mouse
213 * pointer into hardware.
214 * However the Xserver still writes to it through the agp aperture.
216 static struct agp_memory *alloc_agpphysmem_i8xx(size_t pg_count, int type)
218 struct agp_memory *new;
224 addr = agp_bridge->driver->agp_alloc_page();
228 new = agp_create_memory(1);
232 new->memory[0] = agp_bridge->driver->mask_memory(virt_to_phys(addr), type);
234 new->num_scratch_pages = 1;
235 new->type = AGP_PHYS_MEMORY;
236 new->physical = new->memory[0];
240 static struct agp_memory *intel_i810_alloc_by_type(size_t pg_count, int type)
242 struct agp_memory *new;
244 if (type == AGP_DCACHE_MEMORY) {
245 if (pg_count != intel_i810_private.num_dcache_entries)
248 new = agp_create_memory(1);
252 new->type = AGP_DCACHE_MEMORY;
253 new->page_count = pg_count;
254 new->num_scratch_pages = 0;
258 if (type == AGP_PHYS_MEMORY)
259 return(alloc_agpphysmem_i8xx(pg_count, type));
264 static void intel_i810_free_by_type(struct agp_memory *curr)
266 agp_free_key(curr->key);
267 if(curr->type == AGP_PHYS_MEMORY) {
268 agp_bridge->driver->agp_destroy_page(phys_to_virt(curr->memory[0]));
274 static unsigned long intel_i810_mask_memory(unsigned long addr, int type)
276 /* Type checking must be done elsewhere */
277 return addr | agp_bridge->driver->masks[type].mask;
280 static struct aper_size_info_fixed intel_i830_sizes[] =
283 /* The 64M mode still requires a 128k gatt */
287 static struct _intel_i830_private {
288 struct pci_dev *i830_dev; /* device one */
289 volatile u8 *registers;
291 } intel_i830_private;
293 static void intel_i830_init_gtt_entries(void)
299 static const int ddt[4] = { 0, 16, 32, 64 };
301 pci_read_config_word(agp_bridge->dev,I830_GMCH_CTRL,&gmch_ctrl);
303 if (agp_bridge->dev->device == PCI_DEVICE_ID_INTEL_82830_HB ||
304 agp_bridge->dev->device == PCI_DEVICE_ID_INTEL_82845G_HB) {
305 switch (gmch_ctrl & I830_GMCH_GMS_MASK) {
306 case I830_GMCH_GMS_STOLEN_512:
307 gtt_entries = KB(512) - KB(132);
309 case I830_GMCH_GMS_STOLEN_1024:
310 gtt_entries = MB(1) - KB(132);
312 case I830_GMCH_GMS_STOLEN_8192:
313 gtt_entries = MB(8) - KB(132);
315 case I830_GMCH_GMS_LOCAL:
316 rdct = INREG8(intel_i830_private.registers,
317 I830_RDRAM_CHANNEL_TYPE);
318 gtt_entries = (I830_RDRAM_ND(rdct) + 1) *
319 MB(ddt[I830_RDRAM_DDT(rdct)]);
327 switch (gmch_ctrl & I830_GMCH_GMS_MASK) {
328 case I855_GMCH_GMS_STOLEN_1M:
329 gtt_entries = MB(1) - KB(132);
331 case I855_GMCH_GMS_STOLEN_4M:
332 gtt_entries = MB(4) - KB(132);
334 case I855_GMCH_GMS_STOLEN_8M:
335 gtt_entries = MB(8) - KB(132);
337 case I855_GMCH_GMS_STOLEN_16M:
338 gtt_entries = MB(16) - KB(132);
340 case I855_GMCH_GMS_STOLEN_32M:
341 gtt_entries = MB(32) - KB(132);
349 printk(KERN_INFO PFX "Detected %dK %s memory.\n",
350 gtt_entries / KB(1), local ? "local" : "stolen");
353 "No pre-allocated video memory detected.\n");
354 gtt_entries /= KB(4);
356 intel_i830_private.gtt_entries = gtt_entries;
359 /* The intel i830 automatically initializes the agp aperture during POST.
360 * Use the memory already set aside for in the GTT.
362 static int intel_i830_create_gatt_table(void)
365 struct aper_size_info_fixed *size;
369 size = agp_bridge->current_size;
370 page_order = size->page_order;
371 num_entries = size->num_entries;
372 agp_bridge->gatt_table_real = 0;
374 pci_read_config_dword(intel_i830_private.i830_dev,I810_MMADDR,&temp);
377 intel_i830_private.registers = (volatile u8 *) ioremap(temp,128 * 4096);
378 if (!intel_i830_private.registers)
381 temp = INREG32(intel_i830_private.registers,I810_PGETBL_CTL) & 0xfffff000;
382 global_cache_flush();
384 /* we have to call this as early as possible after the MMIO base address is known */
385 intel_i830_init_gtt_entries();
387 agp_bridge->gatt_table = NULL;
389 agp_bridge->gatt_bus_addr = temp;
394 /* Return the gatt table to a sane state. Use the top of stolen
395 * memory for the GTT.
397 static int intel_i830_free_gatt_table(void)
402 static int intel_i830_fetch_size(void)
405 struct aper_size_info_fixed *values;
407 values = A_SIZE_FIX(agp_bridge->driver->aperture_sizes);
409 if (agp_bridge->dev->device != PCI_DEVICE_ID_INTEL_82830_HB &&
410 agp_bridge->dev->device != PCI_DEVICE_ID_INTEL_82845G_HB) {
411 /* 855GM/852GM/865G has 128MB aperture size */
412 agp_bridge->previous_size = agp_bridge->current_size = (void *) values;
413 agp_bridge->aperture_size_idx = 0;
414 return(values[0].size);
417 pci_read_config_word(agp_bridge->dev,I830_GMCH_CTRL,&gmch_ctrl);
419 if ((gmch_ctrl & I830_GMCH_MEM_MASK) == I830_GMCH_MEM_128M) {
420 agp_bridge->previous_size = agp_bridge->current_size = (void *) values;
421 agp_bridge->aperture_size_idx = 0;
422 return(values[0].size);
424 agp_bridge->previous_size = agp_bridge->current_size = (void *) values;
425 agp_bridge->aperture_size_idx = 1;
426 return(values[1].size);
432 static int intel_i830_configure(void)
434 struct aper_size_info_fixed *current_size;
439 current_size = A_SIZE_FIX(agp_bridge->current_size);
441 pci_read_config_dword(intel_i830_private.i830_dev,I810_GMADDR,&temp);
442 agp_bridge->gart_bus_addr = (temp & PCI_BASE_ADDRESS_MEM_MASK);
444 pci_read_config_word(agp_bridge->dev,I830_GMCH_CTRL,&gmch_ctrl);
445 gmch_ctrl |= I830_GMCH_ENABLED;
446 pci_write_config_word(agp_bridge->dev,I830_GMCH_CTRL,gmch_ctrl);
448 OUTREG32(intel_i830_private.registers,I810_PGETBL_CTL,agp_bridge->gatt_bus_addr | I810_PGETBL_ENABLED);
449 global_cache_flush();
451 if (agp_bridge->driver->needs_scratch_page)
452 for (i = intel_i830_private.gtt_entries; i < current_size->num_entries; i++)
453 OUTREG32(intel_i830_private.registers,I810_PTE_BASE + (i * 4),agp_bridge->scratch_page);
458 static void intel_i830_cleanup(void)
460 iounmap((void *) intel_i830_private.registers);
463 static int intel_i830_insert_entries(struct agp_memory *mem,off_t pg_start,
469 temp = agp_bridge->current_size;
470 num_entries = A_SIZE_FIX(temp)->num_entries;
472 if (pg_start < intel_i830_private.gtt_entries) {
473 printk (KERN_DEBUG PFX "pg_start == 0x%.8lx,intel_i830_private.gtt_entries == 0x%.8x\n",
474 pg_start,intel_i830_private.gtt_entries);
476 printk (KERN_INFO PFX "Trying to insert into local/stolen memory\n");
480 if ((pg_start + mem->page_count) > num_entries)
483 /* The i830 can't check the GTT for entries since its read only,
484 * depend on the caller to make the correct offset decisions.
487 if ((type != 0 && type != AGP_PHYS_MEMORY) ||
488 (mem->type != 0 && mem->type != AGP_PHYS_MEMORY))
491 global_cache_flush();
493 for (i = 0, j = pg_start; i < mem->page_count; i++, j++)
494 OUTREG32(intel_i830_private.registers,I810_PTE_BASE + (j * 4),
495 agp_bridge->driver->mask_memory(mem->memory[i], mem->type));
497 global_cache_flush();
499 agp_bridge->driver->tlb_flush(mem);
504 static int intel_i830_remove_entries(struct agp_memory *mem,off_t pg_start,
509 global_cache_flush();
511 if (pg_start < intel_i830_private.gtt_entries) {
512 printk (KERN_INFO PFX "Trying to disable local/stolen memory\n");
516 for (i = pg_start; i < (mem->page_count + pg_start); i++)
517 OUTREG32(intel_i830_private.registers,I810_PTE_BASE + (i * 4),agp_bridge->scratch_page);
519 global_cache_flush();
521 agp_bridge->driver->tlb_flush(mem);
526 static struct agp_memory *intel_i830_alloc_by_type(size_t pg_count,int type)
528 if (type == AGP_PHYS_MEMORY)
529 return(alloc_agpphysmem_i8xx(pg_count, type));
531 /* always return NULL for other allocation types for now */
535 static int intel_fetch_size(void)
539 struct aper_size_info_16 *values;
541 pci_read_config_word(agp_bridge->dev, INTEL_APSIZE, &temp);
542 values = A_SIZE_16(agp_bridge->driver->aperture_sizes);
544 for (i = 0; i < agp_bridge->driver->num_aperture_sizes; i++) {
545 if (temp == values[i].size_value) {
546 agp_bridge->previous_size = agp_bridge->current_size = (void *) (values + i);
547 agp_bridge->aperture_size_idx = i;
548 return values[i].size;
555 static int __intel_8xx_fetch_size(u8 temp)
558 struct aper_size_info_8 *values;
560 values = A_SIZE_8(agp_bridge->driver->aperture_sizes);
562 for (i = 0; i < agp_bridge->driver->num_aperture_sizes; i++) {
563 if (temp == values[i].size_value) {
564 agp_bridge->previous_size =
565 agp_bridge->current_size = (void *) (values + i);
566 agp_bridge->aperture_size_idx = i;
567 return values[i].size;
573 static int intel_8xx_fetch_size(void)
577 pci_read_config_byte(agp_bridge->dev, INTEL_APSIZE, &temp);
578 return __intel_8xx_fetch_size(temp);
581 static int intel_815_fetch_size(void)
585 /* Intel 815 chipsets have a _weird_ APSIZE register with only
586 * one non-reserved bit, so mask the others out ... */
587 pci_read_config_byte(agp_bridge->dev, INTEL_APSIZE, &temp);
590 return __intel_8xx_fetch_size(temp);
593 static void intel_tlbflush(struct agp_memory *mem)
595 pci_write_config_dword(agp_bridge->dev, INTEL_AGPCTRL, 0x2200);
596 pci_write_config_dword(agp_bridge->dev, INTEL_AGPCTRL, 0x2280);
600 static void intel_8xx_tlbflush(struct agp_memory *mem)
603 pci_read_config_dword(agp_bridge->dev, INTEL_AGPCTRL, &temp);
604 pci_write_config_dword(agp_bridge->dev, INTEL_AGPCTRL, temp & ~(1 << 7));
605 pci_read_config_dword(agp_bridge->dev, INTEL_AGPCTRL, &temp);
606 pci_write_config_dword(agp_bridge->dev, INTEL_AGPCTRL, temp | (1 << 7));
610 static void intel_cleanup(void)
613 struct aper_size_info_16 *previous_size;
615 previous_size = A_SIZE_16(agp_bridge->previous_size);
616 pci_read_config_word(agp_bridge->dev, INTEL_NBXCFG, &temp);
617 pci_write_config_word(agp_bridge->dev, INTEL_NBXCFG, temp & ~(1 << 9));
618 pci_write_config_word(agp_bridge->dev, INTEL_APSIZE, previous_size->size_value);
622 static void intel_8xx_cleanup(void)
625 struct aper_size_info_8 *previous_size;
627 previous_size = A_SIZE_8(agp_bridge->previous_size);
628 pci_read_config_word(agp_bridge->dev, INTEL_NBXCFG, &temp);
629 pci_write_config_word(agp_bridge->dev, INTEL_NBXCFG, temp & ~(1 << 9));
630 pci_write_config_byte(agp_bridge->dev, INTEL_APSIZE, previous_size->size_value);
634 static int intel_configure(void)
638 struct aper_size_info_16 *current_size;
640 current_size = A_SIZE_16(agp_bridge->current_size);
643 pci_write_config_word(agp_bridge->dev, INTEL_APSIZE, current_size->size_value);
645 /* address to map to */
646 pci_read_config_dword(agp_bridge->dev, AGP_APBASE, &temp);
647 agp_bridge->gart_bus_addr = (temp & PCI_BASE_ADDRESS_MEM_MASK);
649 /* attbase - aperture base */
650 pci_write_config_dword(agp_bridge->dev, INTEL_ATTBASE, agp_bridge->gatt_bus_addr);
653 pci_write_config_dword(agp_bridge->dev, INTEL_AGPCTRL, 0x2280);
656 pci_read_config_word(agp_bridge->dev, INTEL_NBXCFG, &temp2);
657 pci_write_config_word(agp_bridge->dev, INTEL_NBXCFG,
658 (temp2 & ~(1 << 10)) | (1 << 9));
659 /* clear any possible error conditions */
660 pci_write_config_byte(agp_bridge->dev, INTEL_ERRSTS + 1, 7);
664 static int intel_815_configure(void)
668 struct aper_size_info_8 *current_size;
670 /* attbase - aperture base */
671 /* the Intel 815 chipset spec. says that bits 29-31 in the
672 * ATTBASE register are reserved -> try not to write them */
673 if (agp_bridge->gatt_bus_addr & INTEL_815_ATTBASE_MASK) {
674 printk (KERN_EMERG PFX "gatt bus addr too high");
678 current_size = A_SIZE_8(agp_bridge->current_size);
681 pci_write_config_byte(agp_bridge->dev, INTEL_APSIZE,
682 current_size->size_value);
684 /* address to map to */
685 pci_read_config_dword(agp_bridge->dev, AGP_APBASE, &temp);
686 agp_bridge->gart_bus_addr = (temp & PCI_BASE_ADDRESS_MEM_MASK);
688 pci_read_config_dword(agp_bridge->dev, INTEL_ATTBASE, &addr);
689 addr &= INTEL_815_ATTBASE_MASK;
690 addr |= agp_bridge->gatt_bus_addr;
691 pci_write_config_dword(agp_bridge->dev, INTEL_ATTBASE, addr);
694 pci_write_config_dword(agp_bridge->dev, INTEL_AGPCTRL, 0x0000);
697 pci_read_config_byte(agp_bridge->dev, INTEL_815_APCONT, &temp2);
698 pci_write_config_byte(agp_bridge->dev, INTEL_815_APCONT, temp2 | (1 << 1));
700 /* clear any possible error conditions */
701 /* Oddness : this chipset seems to have no ERRSTS register ! */
705 static void intel_820_tlbflush(struct agp_memory *mem)
710 static void intel_820_cleanup(void)
713 struct aper_size_info_8 *previous_size;
715 previous_size = A_SIZE_8(agp_bridge->previous_size);
716 pci_read_config_byte(agp_bridge->dev, INTEL_I820_RDCR, &temp);
717 pci_write_config_byte(agp_bridge->dev, INTEL_I820_RDCR,
719 pci_write_config_byte(agp_bridge->dev, INTEL_APSIZE,
720 previous_size->size_value);
724 static int intel_820_configure(void)
728 struct aper_size_info_8 *current_size;
730 current_size = A_SIZE_8(agp_bridge->current_size);
733 pci_write_config_byte(agp_bridge->dev, INTEL_APSIZE, current_size->size_value);
735 /* address to map to */
736 pci_read_config_dword(agp_bridge->dev, AGP_APBASE, &temp);
737 agp_bridge->gart_bus_addr = (temp & PCI_BASE_ADDRESS_MEM_MASK);
739 /* attbase - aperture base */
740 pci_write_config_dword(agp_bridge->dev, INTEL_ATTBASE, agp_bridge->gatt_bus_addr);
743 pci_write_config_dword(agp_bridge->dev, INTEL_AGPCTRL, 0x0000);
745 /* global enable aperture access */
746 /* This flag is not accessed through MCHCFG register as in */
748 pci_read_config_byte(agp_bridge->dev, INTEL_I820_RDCR, &temp2);
749 pci_write_config_byte(agp_bridge->dev, INTEL_I820_RDCR, temp2 | (1 << 1));
750 /* clear any possible AGP-related error conditions */
751 pci_write_config_word(agp_bridge->dev, INTEL_I820_ERRSTS, 0x001c);
755 static int intel_840_configure(void)
759 struct aper_size_info_8 *current_size;
761 current_size = A_SIZE_8(agp_bridge->current_size);
764 pci_write_config_byte(agp_bridge->dev, INTEL_APSIZE, current_size->size_value);
766 /* address to map to */
767 pci_read_config_dword(agp_bridge->dev, AGP_APBASE, &temp);
768 agp_bridge->gart_bus_addr = (temp & PCI_BASE_ADDRESS_MEM_MASK);
770 /* attbase - aperture base */
771 pci_write_config_dword(agp_bridge->dev, INTEL_ATTBASE, agp_bridge->gatt_bus_addr);
774 pci_write_config_dword(agp_bridge->dev, INTEL_AGPCTRL, 0x0000);
777 pci_read_config_word(agp_bridge->dev, INTEL_I840_MCHCFG, &temp2);
778 pci_write_config_word(agp_bridge->dev, INTEL_I840_MCHCFG, temp2 | (1 << 9));
779 /* clear any possible error conditions */
780 pci_write_config_word(agp_bridge->dev, INTEL_I840_ERRSTS, 0xc000);
784 static int intel_845_configure(void)
788 struct aper_size_info_8 *current_size;
790 current_size = A_SIZE_8(agp_bridge->current_size);
793 pci_write_config_byte(agp_bridge->dev, INTEL_APSIZE, current_size->size_value);
795 /* address to map to */
796 pci_read_config_dword(agp_bridge->dev, AGP_APBASE, &temp);
797 agp_bridge->gart_bus_addr = (temp & PCI_BASE_ADDRESS_MEM_MASK);
799 /* attbase - aperture base */
800 pci_write_config_dword(agp_bridge->dev, INTEL_ATTBASE, agp_bridge->gatt_bus_addr);
803 pci_write_config_dword(agp_bridge->dev, INTEL_AGPCTRL, 0x0000);
806 pci_read_config_byte(agp_bridge->dev, INTEL_I845_AGPM, &temp2);
807 pci_write_config_byte(agp_bridge->dev, INTEL_I845_AGPM, temp2 | (1 << 1));
808 /* clear any possible error conditions */
809 pci_write_config_word(agp_bridge->dev, INTEL_I845_ERRSTS, 0x001c);
813 static int intel_850_configure(void)
817 struct aper_size_info_8 *current_size;
819 current_size = A_SIZE_8(agp_bridge->current_size);
822 pci_write_config_byte(agp_bridge->dev, INTEL_APSIZE, current_size->size_value);
824 /* address to map to */
825 pci_read_config_dword(agp_bridge->dev, AGP_APBASE, &temp);
826 agp_bridge->gart_bus_addr = (temp & PCI_BASE_ADDRESS_MEM_MASK);
828 /* attbase - aperture base */
829 pci_write_config_dword(agp_bridge->dev, INTEL_ATTBASE, agp_bridge->gatt_bus_addr);
832 pci_write_config_dword(agp_bridge->dev, INTEL_AGPCTRL, 0x0000);
835 pci_read_config_word(agp_bridge->dev, INTEL_I850_MCHCFG, &temp2);
836 pci_write_config_word(agp_bridge->dev, INTEL_I850_MCHCFG, temp2 | (1 << 9));
837 /* clear any possible AGP-related error conditions */
838 pci_write_config_word(agp_bridge->dev, INTEL_I850_ERRSTS, 0x001c);
842 static int intel_860_configure(void)
846 struct aper_size_info_8 *current_size;
848 current_size = A_SIZE_8(agp_bridge->current_size);
851 pci_write_config_byte(agp_bridge->dev, INTEL_APSIZE, current_size->size_value);
853 /* address to map to */
854 pci_read_config_dword(agp_bridge->dev, AGP_APBASE, &temp);
855 agp_bridge->gart_bus_addr = (temp & PCI_BASE_ADDRESS_MEM_MASK);
857 /* attbase - aperture base */
858 pci_write_config_dword(agp_bridge->dev, INTEL_ATTBASE, agp_bridge->gatt_bus_addr);
861 pci_write_config_dword(agp_bridge->dev, INTEL_AGPCTRL, 0x0000);
864 pci_read_config_word(agp_bridge->dev, INTEL_I860_MCHCFG, &temp2);
865 pci_write_config_word(agp_bridge->dev, INTEL_I860_MCHCFG, temp2 | (1 << 9));
866 /* clear any possible AGP-related error conditions */
867 pci_write_config_word(agp_bridge->dev, INTEL_I860_ERRSTS, 0xf700);
871 static int intel_830mp_configure(void)
875 struct aper_size_info_8 *current_size;
877 current_size = A_SIZE_8(agp_bridge->current_size);
880 pci_write_config_byte(agp_bridge->dev, INTEL_APSIZE, current_size->size_value);
882 /* address to map to */
883 pci_read_config_dword(agp_bridge->dev, AGP_APBASE, &temp);
884 agp_bridge->gart_bus_addr = (temp & PCI_BASE_ADDRESS_MEM_MASK);
886 /* attbase - aperture base */
887 pci_write_config_dword(agp_bridge->dev, INTEL_ATTBASE, agp_bridge->gatt_bus_addr);
890 pci_write_config_dword(agp_bridge->dev, INTEL_AGPCTRL, 0x0000);
893 pci_read_config_word(agp_bridge->dev, INTEL_NBXCFG, &temp2);
894 pci_write_config_word(agp_bridge->dev, INTEL_NBXCFG, temp2 | (1 << 9));
895 /* clear any possible AGP-related error conditions */
896 pci_write_config_word(agp_bridge->dev, INTEL_I830_ERRSTS, 0x1c);
900 static int intel_7505_configure(void)
904 struct aper_size_info_8 *current_size;
906 current_size = A_SIZE_8(agp_bridge->current_size);
909 pci_write_config_byte(agp_bridge->dev, INTEL_APSIZE, current_size->size_value);
911 /* address to map to */
912 pci_read_config_dword(agp_bridge->dev, AGP_APBASE, &temp);
913 agp_bridge->gart_bus_addr = (temp & PCI_BASE_ADDRESS_MEM_MASK);
915 /* attbase - aperture base */
916 pci_write_config_dword(agp_bridge->dev, INTEL_ATTBASE, agp_bridge->gatt_bus_addr);
919 pci_write_config_dword(agp_bridge->dev, INTEL_AGPCTRL, 0x0000);
922 pci_read_config_word(agp_bridge->dev, INTEL_I7505_MCHCFG, &temp2);
923 pci_write_config_word(agp_bridge->dev, INTEL_I7505_MCHCFG, temp2 | (1 << 9));
929 static struct gatt_mask intel_generic_masks[] =
931 {.mask = 0x00000017, .type = 0}
934 static struct aper_size_info_8 intel_815_sizes[2] =
940 static struct aper_size_info_8 intel_8xx_sizes[7] =
951 static struct aper_size_info_16 intel_generic_sizes[7] =
962 static struct aper_size_info_8 intel_830mp_sizes[4] =
970 static struct agp_bridge_driver intel_generic_driver = {
971 .owner = THIS_MODULE,
972 .aperture_sizes = intel_generic_sizes,
973 .size_type = U16_APER_SIZE,
974 .num_aperture_sizes = 7,
975 .configure = intel_configure,
976 .fetch_size = intel_fetch_size,
977 .cleanup = intel_cleanup,
978 .tlb_flush = intel_tlbflush,
979 .mask_memory = agp_generic_mask_memory,
980 .masks = intel_generic_masks,
981 .agp_enable = agp_generic_enable,
982 .cache_flush = global_cache_flush,
983 .create_gatt_table = agp_generic_create_gatt_table,
984 .free_gatt_table = agp_generic_free_gatt_table,
985 .insert_memory = agp_generic_insert_memory,
986 .remove_memory = agp_generic_remove_memory,
987 .alloc_by_type = agp_generic_alloc_by_type,
988 .free_by_type = agp_generic_free_by_type,
989 .agp_alloc_page = agp_generic_alloc_page,
990 .agp_destroy_page = agp_generic_destroy_page,
993 static struct agp_bridge_driver intel_810_driver = {
994 .owner = THIS_MODULE,
995 .aperture_sizes = intel_i810_sizes,
996 .size_type = FIXED_APER_SIZE,
997 .num_aperture_sizes = 2,
998 .needs_scratch_page = TRUE,
999 .configure = intel_i810_configure,
1000 .fetch_size = intel_i810_fetch_size,
1001 .cleanup = intel_i810_cleanup,
1002 .tlb_flush = intel_i810_tlbflush,
1003 .mask_memory = intel_i810_mask_memory,
1004 .masks = intel_i810_masks,
1005 .agp_enable = intel_i810_agp_enable,
1006 .cache_flush = global_cache_flush,
1007 .create_gatt_table = agp_generic_create_gatt_table,
1008 .free_gatt_table = agp_generic_free_gatt_table,
1009 .insert_memory = intel_i810_insert_entries,
1010 .remove_memory = intel_i810_remove_entries,
1011 .alloc_by_type = intel_i810_alloc_by_type,
1012 .free_by_type = intel_i810_free_by_type,
1013 .agp_alloc_page = agp_generic_alloc_page,
1014 .agp_destroy_page = agp_generic_destroy_page,
1017 static struct agp_bridge_driver intel_815_driver = {
1018 .owner = THIS_MODULE,
1019 .aperture_sizes = intel_815_sizes,
1020 .size_type = U8_APER_SIZE,
1021 .num_aperture_sizes = 2,
1022 .configure = intel_815_configure,
1023 .fetch_size = intel_815_fetch_size,
1024 .cleanup = intel_8xx_cleanup,
1025 .tlb_flush = intel_8xx_tlbflush,
1026 .mask_memory = agp_generic_mask_memory,
1027 .masks = intel_generic_masks,
1028 .agp_enable = agp_generic_enable,
1029 .cache_flush = global_cache_flush,
1030 .create_gatt_table = agp_generic_create_gatt_table,
1031 .free_gatt_table = agp_generic_free_gatt_table,
1032 .insert_memory = agp_generic_insert_memory,
1033 .remove_memory = agp_generic_remove_memory,
1034 .alloc_by_type = agp_generic_alloc_by_type,
1035 .free_by_type = agp_generic_free_by_type,
1036 .agp_alloc_page = agp_generic_alloc_page,
1037 .agp_destroy_page = agp_generic_destroy_page,
1040 static struct agp_bridge_driver intel_830_driver = {
1041 .owner = THIS_MODULE,
1042 .aperture_sizes = intel_i830_sizes,
1043 .size_type = FIXED_APER_SIZE,
1044 .num_aperture_sizes = 2,
1045 .needs_scratch_page = TRUE,
1046 .configure = intel_i830_configure,
1047 .fetch_size = intel_i830_fetch_size,
1048 .cleanup = intel_i830_cleanup,
1049 .tlb_flush = intel_i810_tlbflush,
1050 .mask_memory = intel_i810_mask_memory,
1051 .masks = intel_i810_masks,
1052 .agp_enable = intel_i810_agp_enable,
1053 .cache_flush = global_cache_flush,
1054 .create_gatt_table = intel_i830_create_gatt_table,
1055 .free_gatt_table = intel_i830_free_gatt_table,
1056 .insert_memory = intel_i830_insert_entries,
1057 .remove_memory = intel_i830_remove_entries,
1058 .alloc_by_type = intel_i830_alloc_by_type,
1059 .free_by_type = intel_i810_free_by_type,
1060 .agp_alloc_page = agp_generic_alloc_page,
1061 .agp_destroy_page = agp_generic_destroy_page,
1064 static struct agp_bridge_driver intel_820_driver = {
1065 .owner = THIS_MODULE,
1066 .aperture_sizes = intel_8xx_sizes,
1067 .size_type = U8_APER_SIZE,
1068 .num_aperture_sizes = 7,
1069 .configure = intel_820_configure,
1070 .fetch_size = intel_8xx_fetch_size,
1071 .cleanup = intel_820_cleanup,
1072 .tlb_flush = intel_820_tlbflush,
1073 .mask_memory = agp_generic_mask_memory,
1074 .masks = intel_generic_masks,
1075 .agp_enable = agp_generic_enable,
1076 .cache_flush = global_cache_flush,
1077 .create_gatt_table = agp_generic_create_gatt_table,
1078 .free_gatt_table = agp_generic_free_gatt_table,
1079 .insert_memory = agp_generic_insert_memory,
1080 .remove_memory = agp_generic_remove_memory,
1081 .alloc_by_type = agp_generic_alloc_by_type,
1082 .free_by_type = agp_generic_free_by_type,
1083 .agp_alloc_page = agp_generic_alloc_page,
1084 .agp_destroy_page = agp_generic_destroy_page,
1087 static struct agp_bridge_driver intel_830mp_driver = {
1088 .owner = THIS_MODULE,
1089 .aperture_sizes = intel_830mp_sizes,
1090 .size_type = U8_APER_SIZE,
1091 .num_aperture_sizes = 4,
1092 .configure = intel_830mp_configure,
1093 .fetch_size = intel_8xx_fetch_size,
1094 .cleanup = intel_8xx_cleanup,
1095 .tlb_flush = intel_8xx_tlbflush,
1096 .mask_memory = agp_generic_mask_memory,
1097 .masks = intel_generic_masks,
1098 .agp_enable = agp_generic_enable,
1099 .cache_flush = global_cache_flush,
1100 .create_gatt_table = agp_generic_create_gatt_table,
1101 .free_gatt_table = agp_generic_free_gatt_table,
1102 .insert_memory = agp_generic_insert_memory,
1103 .remove_memory = agp_generic_remove_memory,
1104 .alloc_by_type = agp_generic_alloc_by_type,
1105 .free_by_type = agp_generic_free_by_type,
1106 .agp_alloc_page = agp_generic_alloc_page,
1107 .agp_destroy_page = agp_generic_destroy_page,
1110 static struct agp_bridge_driver intel_840_driver = {
1111 .owner = THIS_MODULE,
1112 .aperture_sizes = intel_8xx_sizes,
1113 .size_type = U8_APER_SIZE,
1114 .num_aperture_sizes = 7,
1115 .configure = intel_840_configure,
1116 .fetch_size = intel_8xx_fetch_size,
1117 .cleanup = intel_8xx_cleanup,
1118 .tlb_flush = intel_8xx_tlbflush,
1119 .mask_memory = agp_generic_mask_memory,
1120 .masks = intel_generic_masks,
1121 .agp_enable = agp_generic_enable,
1122 .cache_flush = global_cache_flush,
1123 .create_gatt_table = agp_generic_create_gatt_table,
1124 .free_gatt_table = agp_generic_free_gatt_table,
1125 .insert_memory = agp_generic_insert_memory,
1126 .remove_memory = agp_generic_remove_memory,
1127 .alloc_by_type = agp_generic_alloc_by_type,
1128 .free_by_type = agp_generic_free_by_type,
1129 .agp_alloc_page = agp_generic_alloc_page,
1130 .agp_destroy_page = agp_generic_destroy_page,
1133 static struct agp_bridge_driver intel_845_driver = {
1134 .owner = THIS_MODULE,
1135 .aperture_sizes = intel_8xx_sizes,
1136 .size_type = U8_APER_SIZE,
1137 .num_aperture_sizes = 7,
1138 .configure = intel_845_configure,
1139 .fetch_size = intel_8xx_fetch_size,
1140 .cleanup = intel_8xx_cleanup,
1141 .tlb_flush = intel_8xx_tlbflush,
1142 .mask_memory = agp_generic_mask_memory,
1143 .masks = intel_generic_masks,
1144 .agp_enable = agp_generic_enable,
1145 .cache_flush = global_cache_flush,
1146 .create_gatt_table = agp_generic_create_gatt_table,
1147 .free_gatt_table = agp_generic_free_gatt_table,
1148 .insert_memory = agp_generic_insert_memory,
1149 .remove_memory = agp_generic_remove_memory,
1150 .alloc_by_type = agp_generic_alloc_by_type,
1151 .free_by_type = agp_generic_free_by_type,
1152 .agp_alloc_page = agp_generic_alloc_page,
1153 .agp_destroy_page = agp_generic_destroy_page,
1156 static struct agp_bridge_driver intel_850_driver = {
1157 .owner = THIS_MODULE,
1158 .aperture_sizes = intel_8xx_sizes,
1159 .size_type = U8_APER_SIZE,
1160 .num_aperture_sizes = 7,
1161 .configure = intel_850_configure,
1162 .fetch_size = intel_8xx_fetch_size,
1163 .cleanup = intel_8xx_cleanup,
1164 .tlb_flush = intel_8xx_tlbflush,
1165 .mask_memory = agp_generic_mask_memory,
1166 .masks = intel_generic_masks,
1167 .agp_enable = agp_generic_enable,
1168 .cache_flush = global_cache_flush,
1169 .create_gatt_table = agp_generic_create_gatt_table,
1170 .free_gatt_table = agp_generic_free_gatt_table,
1171 .insert_memory = agp_generic_insert_memory,
1172 .remove_memory = agp_generic_remove_memory,
1173 .alloc_by_type = agp_generic_alloc_by_type,
1174 .free_by_type = agp_generic_free_by_type,
1175 .agp_alloc_page = agp_generic_alloc_page,
1176 .agp_destroy_page = agp_generic_destroy_page,
1179 static struct agp_bridge_driver intel_860_driver = {
1180 .owner = THIS_MODULE,
1181 .aperture_sizes = intel_8xx_sizes,
1182 .size_type = U8_APER_SIZE,
1183 .num_aperture_sizes = 7,
1184 .configure = intel_860_configure,
1185 .fetch_size = intel_8xx_fetch_size,
1186 .cleanup = intel_8xx_cleanup,
1187 .tlb_flush = intel_8xx_tlbflush,
1188 .mask_memory = agp_generic_mask_memory,
1189 .masks = intel_generic_masks,
1190 .agp_enable = agp_generic_enable,
1191 .cache_flush = global_cache_flush,
1192 .create_gatt_table = agp_generic_create_gatt_table,
1193 .free_gatt_table = agp_generic_free_gatt_table,
1194 .insert_memory = agp_generic_insert_memory,
1195 .remove_memory = agp_generic_remove_memory,
1196 .alloc_by_type = agp_generic_alloc_by_type,
1197 .free_by_type = agp_generic_free_by_type,
1198 .agp_alloc_page = agp_generic_alloc_page,
1199 .agp_destroy_page = agp_generic_destroy_page,
1202 static struct agp_bridge_driver intel_7505_driver = {
1203 .owner = THIS_MODULE,
1204 .aperture_sizes = intel_8xx_sizes,
1205 .size_type = U8_APER_SIZE,
1206 .num_aperture_sizes = 7,
1207 .configure = intel_7505_configure,
1208 .fetch_size = intel_8xx_fetch_size,
1209 .cleanup = intel_8xx_cleanup,
1210 .tlb_flush = intel_8xx_tlbflush,
1211 .mask_memory = agp_generic_mask_memory,
1212 .masks = intel_generic_masks,
1213 .agp_enable = agp_generic_enable,
1214 .cache_flush = global_cache_flush,
1215 .create_gatt_table = agp_generic_create_gatt_table,
1216 .free_gatt_table = agp_generic_free_gatt_table,
1217 .insert_memory = agp_generic_insert_memory,
1218 .remove_memory = agp_generic_remove_memory,
1219 .alloc_by_type = agp_generic_alloc_by_type,
1220 .free_by_type = agp_generic_free_by_type,
1221 .agp_alloc_page = agp_generic_alloc_page,
1222 .agp_destroy_page = agp_generic_destroy_page,
1225 static int find_i810(u16 device, const char *name)
1227 struct pci_dev *i810_dev;
1229 i810_dev = pci_find_device(PCI_VENDOR_ID_INTEL, device, NULL);
1231 printk(KERN_ERR PFX "Detected an Intel %s Chipset, "
1232 "but could not find the secondary device.\n",
1237 intel_i810_private.i810_dev = i810_dev;
1241 static int find_i830(u16 device)
1243 struct pci_dev *i830_dev;
1245 i830_dev = pci_find_device(PCI_VENDOR_ID_INTEL, device, NULL);
1246 if (i830_dev && PCI_FUNC(i830_dev->devfn) != 0) {
1247 i830_dev = pci_find_device(PCI_VENDOR_ID_INTEL,
1254 intel_i830_private.i830_dev = i830_dev;
1258 static int __devinit agp_intel_probe(struct pci_dev *pdev,
1259 const struct pci_device_id *ent)
1261 struct agp_bridge_data *bridge;
1262 char *name = "(unknown)";
1266 cap_ptr = pci_find_capability(pdev, PCI_CAP_ID_AGP);
1268 bridge = agp_alloc_bridge();
1272 switch (pdev->device) {
1273 case PCI_DEVICE_ID_INTEL_82443LX_0:
1274 bridge->driver = &intel_generic_driver;
1277 case PCI_DEVICE_ID_INTEL_82443BX_0:
1278 bridge->driver = &intel_generic_driver;
1281 case PCI_DEVICE_ID_INTEL_82443GX_0:
1282 bridge->driver = &intel_generic_driver;
1285 case PCI_DEVICE_ID_INTEL_82810_MC1:
1286 if (!find_i810(PCI_DEVICE_ID_INTEL_82810_IG1, "i810"))
1288 bridge->driver = &intel_810_driver;
1291 case PCI_DEVICE_ID_INTEL_82810_MC3:
1292 if (!find_i810(PCI_DEVICE_ID_INTEL_82810_IG3, "i810 DC100"))
1294 bridge->driver = &intel_810_driver;
1295 name = "i810 DC100";
1297 case PCI_DEVICE_ID_INTEL_82810E_MC:
1298 if (!find_i810(PCI_DEVICE_ID_INTEL_82810E_IG, "i810 E"))
1300 bridge->driver = &intel_810_driver;
1303 case PCI_DEVICE_ID_INTEL_82815_MC:
1305 * The i815 can operate either as an i810 style
1306 * integrated device, or as an AGP4X motherboard.
1308 if (find_i810(PCI_DEVICE_ID_INTEL_82815_CGC, "i815"))
1309 bridge->driver = &intel_810_driver;
1311 bridge->driver = &intel_815_driver;
1314 case PCI_DEVICE_ID_INTEL_82820_HB:
1315 case PCI_DEVICE_ID_INTEL_82820_UP_HB:
1316 bridge->driver = &intel_820_driver;
1319 case PCI_DEVICE_ID_INTEL_82830_HB:
1320 if (find_i830(PCI_DEVICE_ID_INTEL_82830_CGC)) {
1321 bridge->driver = &intel_830_driver;
1323 bridge->driver = &intel_830mp_driver;
1327 case PCI_DEVICE_ID_INTEL_82840_HB:
1328 bridge->driver = &intel_840_driver;
1331 case PCI_DEVICE_ID_INTEL_82845_HB:
1332 bridge->driver = &intel_845_driver;
1335 case PCI_DEVICE_ID_INTEL_82845G_HB:
1336 if (find_i830(PCI_DEVICE_ID_INTEL_82845G_IG)) {
1337 bridge->driver = &intel_830_driver;
1339 bridge->driver = &intel_845_driver;
1343 case PCI_DEVICE_ID_INTEL_82850_HB:
1344 bridge->driver = &intel_850_driver;
1347 case PCI_DEVICE_ID_INTEL_82855PM_HB:
1348 bridge->driver = &intel_845_driver;
1351 case PCI_DEVICE_ID_INTEL_82855GM_HB:
1352 if (find_i830(PCI_DEVICE_ID_INTEL_82855GM_IG)) {
1353 bridge->driver = &intel_830_driver;
1356 bridge->driver = &intel_845_driver;
1360 case PCI_DEVICE_ID_INTEL_82860_HB:
1361 bridge->driver = &intel_860_driver;
1364 case PCI_DEVICE_ID_INTEL_82865_HB:
1365 if (find_i830(PCI_DEVICE_ID_INTEL_82865_IG)) {
1366 bridge->driver = &intel_830_driver;
1368 bridge->driver = &intel_845_driver;
1372 case PCI_DEVICE_ID_INTEL_82875_HB:
1373 bridge->driver = &intel_845_driver;
1376 case PCI_DEVICE_ID_INTEL_7505_0:
1377 bridge->driver = &intel_7505_driver;
1380 case PCI_DEVICE_ID_INTEL_7205_0:
1381 bridge->driver = &intel_7505_driver;
1386 printk(KERN_WARNING PFX "Unsupported Intel chipset (device id: %04x)\n",
1388 agp_put_bridge(bridge);
1393 bridge->capndx = cap_ptr;
1395 if (bridge->driver == &intel_810_driver)
1396 bridge->dev_private_data = &intel_i810_private;
1397 else if (bridge->driver == &intel_830_driver)
1398 bridge->dev_private_data = &intel_i830_private;
1400 printk(KERN_INFO PFX "Detected an Intel %s Chipset.\n", name);
1403 * The following fixes the case where the BIOS has "forgotten" to
1404 * provide an address range for the GART.
1405 * 20030610 - hamish@zot.org
1407 r = &pdev->resource[0];
1408 if (!r->start && r->end) {
1409 if(pci_assign_resource(pdev, 0)) {
1410 printk(KERN_ERR PFX "could not assign resource 0\n");
1411 agp_put_bridge(bridge);
1417 * If the device has not been properly setup, the following will catch
1418 * the problem and should stop the system from crashing.
1419 * 20030610 - hamish@zot.org
1421 if (pci_enable_device(pdev)) {
1422 printk(KERN_ERR PFX "Unable to Enable PCI device\n");
1423 agp_put_bridge(bridge);
1427 /* Fill in the mode register */
1429 pci_read_config_dword(pdev,
1430 bridge->capndx+PCI_AGP_STATUS,
1434 pci_set_drvdata(pdev, bridge);
1435 return agp_add_bridge(bridge);
1437 agp_put_bridge(bridge);
1441 static void __devexit agp_intel_remove(struct pci_dev *pdev)
1443 struct agp_bridge_data *bridge = pci_get_drvdata(pdev);
1445 agp_remove_bridge(bridge);
1446 agp_put_bridge(bridge);
1449 static int agp_intel_resume(struct pci_dev *pdev)
1451 struct agp_bridge_data *bridge = pci_get_drvdata(pdev);
1453 pci_restore_state(pdev, pdev->saved_config_space);
1455 if (bridge->driver == &intel_generic_driver)
1457 else if (bridge->driver == &intel_845_driver)
1458 intel_845_configure();
1459 else if (bridge->driver == &intel_830mp_driver)
1460 intel_830mp_configure();
1465 static struct pci_device_id agp_intel_pci_table[] = {
1468 .class = (PCI_CLASS_BRIDGE_HOST << 8), \
1470 .vendor = PCI_VENDOR_ID_INTEL, \
1472 .subvendor = PCI_ANY_ID, \
1473 .subdevice = PCI_ANY_ID, \
1475 ID(PCI_DEVICE_ID_INTEL_82443LX_0),
1476 ID(PCI_DEVICE_ID_INTEL_82443BX_0),
1477 ID(PCI_DEVICE_ID_INTEL_82443GX_0),
1478 ID(PCI_DEVICE_ID_INTEL_82810_MC1),
1479 ID(PCI_DEVICE_ID_INTEL_82810_MC3),
1480 ID(PCI_DEVICE_ID_INTEL_82810E_MC),
1481 ID(PCI_DEVICE_ID_INTEL_82815_MC),
1482 ID(PCI_DEVICE_ID_INTEL_82820_HB),
1483 ID(PCI_DEVICE_ID_INTEL_82820_UP_HB),
1484 ID(PCI_DEVICE_ID_INTEL_82830_HB),
1485 ID(PCI_DEVICE_ID_INTEL_82840_HB),
1486 ID(PCI_DEVICE_ID_INTEL_82845_HB),
1487 ID(PCI_DEVICE_ID_INTEL_82845G_HB),
1488 ID(PCI_DEVICE_ID_INTEL_82850_HB),
1489 ID(PCI_DEVICE_ID_INTEL_82855PM_HB),
1490 ID(PCI_DEVICE_ID_INTEL_82855GM_HB),
1491 ID(PCI_DEVICE_ID_INTEL_82860_HB),
1492 ID(PCI_DEVICE_ID_INTEL_82865_HB),
1493 ID(PCI_DEVICE_ID_INTEL_82875_HB),
1494 ID(PCI_DEVICE_ID_INTEL_7505_0),
1495 ID(PCI_DEVICE_ID_INTEL_7205_0),
1499 MODULE_DEVICE_TABLE(pci, agp_intel_pci_table);
1501 static struct pci_driver agp_intel_pci_driver = {
1502 .name = "agpgart-intel",
1503 .id_table = agp_intel_pci_table,
1504 .probe = agp_intel_probe,
1505 .remove = agp_intel_remove,
1506 .resume = agp_intel_resume,
1509 /* intel_agp_init() must not be declared static for explicit
1510 early initialization to work (ie i810fb) */
1511 int __init agp_intel_init(void)
1513 static int agp_initialised=0;
1515 if (agp_initialised == 1)
1519 return pci_module_init(&agp_intel_pci_driver);
1522 static void __exit agp_intel_cleanup(void)
1524 pci_unregister_driver(&agp_intel_pci_driver);
1527 module_init(agp_intel_init);
1528 module_exit(agp_intel_cleanup);
1530 MODULE_AUTHOR("Dave Jones <davej@codemonkey.org.uk>");
1531 MODULE_LICENSE("GPL and additional rights");