drivers/char/agp/intel-agp.c

   1 /*
   2  * Intel AGPGART routines.
   3  */
   4
   5 /*
   6  * Intel(R) 855GM/852GM and 865G support added by David Dawes
   7  * <dawes@tungstengraphics.com>.
   8  *
   9  * Intel(R) 915G support added by Alan Hourihane
  10  * <alanh@tungstengraphics.com>.
  11  */
  12
  13 #include <linux/module.h>
  14 #include <linux/pci.h>
  15 #include <linux/init.h>
  16 #include <linux/pagemap.h>
  17 #include <linux/agp_backend.h>
  18 #include "agp.h"
  19
  20 /* Intel 815 register */
  21 #define INTEL_815_APCONT        0x51
  22 #define INTEL_815_ATTBASE_MASK  ~0x1FFFFFFF
  23
  24 /* Intel i820 registers */
  25 #define INTEL_I820_RDCR         0x51
  26 #define INTEL_I820_ERRSTS       0xc8
  27
  28 /* Intel i840 registers */
  29 #define INTEL_I840_MCHCFG       0x50
  30 #define INTEL_I840_ERRSTS       0xc8
  31
  32 /* Intel i850 registers */
  33 #define INTEL_I850_MCHCFG       0x50
  34 #define INTEL_I850_ERRSTS       0xc8
  35
  36 /* intel 915G registers */
  37 #define I915_GMADDR     0x18
  38 #define I915_MMADDR     0x10
  39 #define I915_PTEADDR    0x1C
  40 #define I915_GMCH_GMS_STOLEN_48M        (0x6 << 4)
  41 #define I915_GMCH_GMS_STOLEN_64M        (0x7 << 4)
  42
  43
  44 /* Intel 7505 registers */
  45 #define INTEL_I7505_APSIZE      0x74
  46 #define INTEL_I7505_NCAPID      0x60
  47 #define INTEL_I7505_NISTAT      0x6c
  48 #define INTEL_I7505_ATTBASE     0x78
  49 #define INTEL_I7505_ERRSTS      0x42
  50 #define INTEL_I7505_AGPCTRL     0x70
  51 #define INTEL_I7505_MCHCFG      0x50
  52
  53 static struct aper_size_info_fixed intel_i810_sizes[] =
  54 {
  55         {64, 16384, 4},
  56         /* The 32M mode still requires a 64k gatt */
  57         {32, 8192, 4}
  58 };
  59
  60 #define AGP_DCACHE_MEMORY       1
  61 #define AGP_PHYS_MEMORY         2
  62
  63 static struct gatt_mask intel_i810_masks[] =
  64 {
  65         {.mask = I810_PTE_VALID, .type = 0},
  66         {.mask = (I810_PTE_VALID | I810_PTE_LOCAL), .type = AGP_DCACHE_MEMORY},
  67         {.mask = I810_PTE_VALID, .type = 0}
  68 };
  69
  70 static struct _intel_i810_private {
  71         struct pci_dev *i810_dev;       /* device one */
  72         volatile u8 __iomem *registers;
  73         int num_dcache_entries;
  74 } intel_i810_private;
  75
  76 static int intel_i810_fetch_size(void)
  77 {
  78         u32 smram_miscc;
  79         struct aper_size_info_fixed *values;
  80
  81         pci_read_config_dword(agp_bridge->dev, I810_SMRAM_MISCC, &smram_miscc);
  82         values = A_SIZE_FIX(agp_bridge->driver->aperture_sizes);
  83
  84         if ((smram_miscc & I810_GMS) == I810_GMS_DISABLE) {
  85                 printk(KERN_WARNING PFX "i810 is disabled\n");
  86                 return 0;
  87         }
  88         if ((smram_miscc & I810_GFX_MEM_WIN_SIZE) == I810_GFX_MEM_WIN_32M) {
  89                 agp_bridge->previous_size =
  90                         agp_bridge->current_size = (void *) (values + 1);
  91                 agp_bridge->aperture_size_idx = 1;
  92                 return values[1].size;
  93         } else {
  94                 agp_bridge->previous_size =
  95                         agp_bridge->current_size = (void *) (values);
  96                 agp_bridge->aperture_size_idx = 0;
  97                 return values[0].size;
  98         }
  99
 100         return 0;
 101 }
 102
 103 static int intel_i810_configure(void)
 104 {
 105         struct aper_size_info_fixed *current_size;
 106         u32 temp;
 107         int i;
 108
 109         current_size = A_SIZE_FIX(agp_bridge->current_size);
 110
 111         pci_read_config_dword(intel_i810_private.i810_dev, I810_MMADDR, &temp);
 112         temp &= 0xfff80000;
 113
 114         intel_i810_private.registers = ioremap(temp, 128 * 4096);
 115         if (!intel_i810_private.registers) {
 116                 printk(KERN_ERR PFX "Unable to remap memory.\n");
 117                 return -ENOMEM;
 118         }
 119
 120         if ((readl(intel_i810_private.registers+I810_DRAM_CTL)
 121                 & I810_DRAM_ROW_0) == I810_DRAM_ROW_0_SDRAM) {
 122                 /* This will need to be dynamically assigned */
 123                 printk(KERN_INFO PFX "detected 4MB dedicated video ram.\n");
 124                 intel_i810_private.num_dcache_entries = 1024;
 125         }
 126         pci_read_config_dword(intel_i810_private.i810_dev, I810_GMADDR, &temp);
 127         agp_bridge->gart_bus_addr = (temp & PCI_BASE_ADDRESS_MEM_MASK);
 128         writel(agp_bridge->gatt_bus_addr | I810_PGETBL_ENABLED, intel_i810_private.registers+I810_PGETBL_CTL);
 129         readl(intel_i810_private.registers+I810_PGETBL_CTL);    /* PCI Posting. */
 130
 131         if (agp_bridge->driver->needs_scratch_page) {
 132                 for (i = 0; i < current_size->num_entries; i++) {
 133                         writel(agp_bridge->scratch_page, intel_i810_private.registers+I810_PTE_BASE+(i*4));
 134                         readl(intel_i810_private.registers+I810_PTE_BASE+(i*4));        /* PCI posting. */
 135                 }
 136         }
 137         global_cache_flush();
 138         return 0;
 139 }
 140
 141 static void intel_i810_cleanup(void)
 142 {
 143         writel(0, intel_i810_private.registers+I810_PGETBL_CTL);
 144         readl(intel_i810_private.registers);    /* PCI Posting. */
 145         iounmap(intel_i810_private.registers);
 146 }
 147
 148 static void intel_i810_tlbflush(struct agp_memory *mem)
 149 {
 150         return;
 151 }
 152
 153 static void intel_i810_agp_enable(u32 mode)
 154 {
 155         return;
 156 }
 157
 158 /* Exists to support ARGB cursors */
 159 static void *i8xx_alloc_pages(void)
 160 {
 161         struct page * page;
 162
 163         page = alloc_pages(GFP_KERNEL, 2);
 164         if (page == NULL)
 165                 return NULL;
 166
 167         if (change_page_attr(page, 4, PAGE_KERNEL_NOCACHE) < 0) {
 168                 global_flush_tlb();
 169                 __free_page(page);
 170                 return NULL;
 171         }
 172         global_flush_tlb();
 173         get_page(page);
 174         SetPageLocked(page);
 175         atomic_inc(&agp_bridge->current_memory_agp);
 176         return page_address(page);
 177 }
 178
 179 static void i8xx_destroy_pages(void *addr)
 180 {
 181         struct page *page;
 182
 183         if (addr == NULL)
 184                 return;
 185
 186         page = virt_to_page(addr);
 187         change_page_attr(page, 4, PAGE_KERNEL);
 188         global_flush_tlb();
 189         put_page(page);
 190         unlock_page(page);
 191         free_pages((unsigned long)addr, 2);
 192         atomic_dec(&agp_bridge->current_memory_agp);
 193 }
 194
 195 static int intel_i810_insert_entries(struct agp_memory *mem, off_t pg_start,
 196                                 int type)
 197 {
 198         int i, j, num_entries;
 199         void *temp;
 200
 201         temp = agp_bridge->current_size;
 202         num_entries = A_SIZE_FIX(temp)->num_entries;
 203
 204         if ((pg_start + mem->page_count) > num_entries) {
 205                 return -EINVAL;
 206         }
 207         for (j = pg_start; j < (pg_start + mem->page_count); j++) {
 208                 if (!PGE_EMPTY(agp_bridge, readl(agp_bridge->gatt_table+j)))
 209                         return -EBUSY;
 210         }
 211
 212         if (type != 0 || mem->type != 0) {
 213                 if ((type == AGP_DCACHE_MEMORY) && (mem->type == AGP_DCACHE_MEMORY)) {
 214                         /* special insert */
 215                         global_cache_flush();
 216                         for (i = pg_start; i < (pg_start + mem->page_count); i++) {
 217                                 writel((i*4096)|I810_PTE_LOCAL|I810_PTE_VALID, intel_i810_private.registers+I810_PTE_BASE+(i*4));
 218                                 readl(intel_i810_private.registers+I810_PTE_BASE+(i*4));        /* PCI Posting. */
 219                         }
 220                         global_cache_flush();
 221                         agp_bridge->driver->tlb_flush(mem);
 222                         return 0;
 223                 }
 224                 if((type == AGP_PHYS_MEMORY) && (mem->type == AGP_PHYS_MEMORY))
 225                         goto insert;
 226                 return -EINVAL;
 227         }
 228
 229 insert:
 230         global_cache_flush();
 231         for (i = 0, j = pg_start; i < mem->page_count; i++, j++) {
 232                 writel(agp_bridge->driver->mask_memory(mem->memory[i], mem->type),
 233                                 intel_i810_private.registers+I810_PTE_BASE+(j*4));
 234                 readl(intel_i810_private.registers+I810_PTE_BASE+(j*4));        /* PCI Posting. */
 235         }
 236         global_cache_flush();
 237
 238         agp_bridge->driver->tlb_flush(mem);
 239         return 0;
 240 }
 241
 242 static int intel_i810_remove_entries(struct agp_memory *mem, off_t pg_start,
 243                                 int type)
 244 {
 245         int i;
 246
 247         for (i = pg_start; i < (mem->page_count + pg_start); i++) {
 248                 writel(agp_bridge->scratch_page, intel_i810_private.registers+I810_PTE_BASE+(i*4));
 249                 readl(intel_i810_private.registers+I810_PTE_BASE+(i*4));        /* PCI Posting. */
 250         }
 251         global_cache_flush();
 252         agp_bridge->driver->tlb_flush(mem);
 253         return 0;
 254 }
 255
 256 /*
 257  * The i810/i830 requires a physical address to program its mouse
 258  * pointer into hardware.
 259  * However the Xserver still writes to it through the agp aperture.
 260  */
 261 static struct agp_memory *alloc_agpphysmem_i8xx(size_t pg_count, int type)
 262 {
 263         struct agp_memory *new;
 264         void *addr;
 265
 266         if (pg_count != 1 && pg_count != 4)
 267                 return NULL;
 268
 269         switch (pg_count) {
 270         case 1: addr = agp_bridge->driver->agp_alloc_page();
 271                 break;
 272         case 4:
 273                 /* kludge to get 4 physical pages for ARGB cursor */
 274                 addr = i8xx_alloc_pages();
 275                 break;
 276         default:
 277                 return NULL;
 278         }
 279
 280         if (addr == NULL)
 281                 return NULL;
 282
 283         new = agp_create_memory(pg_count);
 284         if (new == NULL)
 285                 return NULL;
 286
 287         new->memory[0] = virt_to_phys(addr);
 288         if (pg_count == 4) {
 289                 /* kludge to get 4 physical pages for ARGB cursor */
 290                 new->memory[1] = new->memory[0] + PAGE_SIZE;
 291                 new->memory[2] = new->memory[1] + PAGE_SIZE;
 292                 new->memory[3] = new->memory[2] + PAGE_SIZE;
 293         }
 294         new->page_count = pg_count;
 295         new->num_scratch_pages = pg_count;
 296         new->type = AGP_PHYS_MEMORY;
 297         new->physical = new->memory[0];
 298         return new;
 299 }
 300
 301 static struct agp_memory *intel_i810_alloc_by_type(size_t pg_count, int type)
 302 {
 303         struct agp_memory *new;
 304
 305         if (type == AGP_DCACHE_MEMORY) {
 306                 if (pg_count != intel_i810_private.num_dcache_entries)
 307                         return NULL;
 308
 309                 new = agp_create_memory(1);
 310                 if (new == NULL)
 311                         return NULL;
 312
 313                 new->type = AGP_DCACHE_MEMORY;
 314                 new->page_count = pg_count;
 315                 new->num_scratch_pages = 0;
 316                 vfree(new->memory);
 317                 return new;
 318         }
 319         if (type == AGP_PHYS_MEMORY)
 320                 return alloc_agpphysmem_i8xx(pg_count, type);
 321
 322         return NULL;
 323 }
 324
 325 static void intel_i810_free_by_type(struct agp_memory *curr)
 326 {
 327         agp_free_key(curr->key);
 328         if(curr->type == AGP_PHYS_MEMORY) {
 329                 if (curr->page_count == 4)
 330                         i8xx_destroy_pages(phys_to_virt(curr->memory[0]));
 331                 else
 332                         agp_bridge->driver->agp_destroy_page(
 333                                  phys_to_virt(curr->memory[0]));
 334                 vfree(curr->memory);
 335         }
 336         kfree(curr);
 337 }
 338
 339 static unsigned long intel_i810_mask_memory(unsigned long addr, int type)
 340 {
 341         /* Type checking must be done elsewhere */
 342         return addr | agp_bridge->driver->masks[type].mask;
 343 }
 344
 345 static struct aper_size_info_fixed intel_i830_sizes[] =
 346 {
 347         {128, 32768, 5},
 348         /* The 64M mode still requires a 128k gatt */
 349         {64, 16384, 5},
 350         {256, 65536, 6},
 351 };
 352
 353 static struct _intel_i830_private {
 354         struct pci_dev *i830_dev;               /* device one */
 355         volatile u8 __iomem *registers;
 356         volatile u32 __iomem *gtt;              /* I915G */
 357         int gtt_entries;
 358 } intel_i830_private;
 359
 360 static void intel_i830_init_gtt_entries(void)
 361 {
 362         u16 gmch_ctrl;
 363         int gtt_entries;
 364         u8 rdct;
 365         int local = 0;
 366         static const int ddt[4] = { 0, 16, 32, 64 };
 367         int size;
 368
 369         pci_read_config_word(agp_bridge->dev,I830_GMCH_CTRL,&gmch_ctrl);
 370
 371         /* We obtain the size of the GTT, which is also stored (for some
 372          * reason) at the top of stolen memory. Then we add 4KB to that
 373          * for the video BIOS popup, which is also stored in there. */
 374         size = agp_bridge->driver->fetch_size() + 4;
 375
 376         if (agp_bridge->dev->device == PCI_DEVICE_ID_INTEL_82830_HB ||
 377             agp_bridge->dev->device == PCI_DEVICE_ID_INTEL_82845G_HB) {
 378                 switch (gmch_ctrl & I830_GMCH_GMS_MASK) {
 379                 case I830_GMCH_GMS_STOLEN_512:
 380                         gtt_entries = KB(512) - KB(size);
 381                         break;
 382                 case I830_GMCH_GMS_STOLEN_1024:
 383                         gtt_entries = MB(1) - KB(size);
 384                         break;
 385                 case I830_GMCH_GMS_STOLEN_8192:
 386                         gtt_entries = MB(8) - KB(size);
 387                         break;
 388                 case I830_GMCH_GMS_LOCAL:
 389                         rdct = readb(intel_i830_private.registers+I830_RDRAM_CHANNEL_TYPE);
 390                         gtt_entries = (I830_RDRAM_ND(rdct) + 1) *
 391                                         MB(ddt[I830_RDRAM_DDT(rdct)]);
 392                         local = 1;
 393                         break;
 394                 default:
 395                         gtt_entries = 0;
 396                         break;
 397                 }
 398         } else {
 399                 switch (gmch_ctrl & I830_GMCH_GMS_MASK) {
 400                 case I855_GMCH_GMS_STOLEN_1M:
 401                         gtt_entries = MB(1) - KB(size);
 402                         break;
 403                 case I855_GMCH_GMS_STOLEN_4M:
 404                         gtt_entries = MB(4) - KB(size);
 405                         break;
 406                 case I855_GMCH_GMS_STOLEN_8M:
 407                         gtt_entries = MB(8) - KB(size);
 408                         break;
 409                 case I855_GMCH_GMS_STOLEN_16M:
 410                         gtt_entries = MB(16) - KB(size);
 411                         break;
 412                 case I855_GMCH_GMS_STOLEN_32M:
 413                         gtt_entries = MB(32) - KB(size);
 414                         break;
 415                 case I915_GMCH_GMS_STOLEN_48M:
 416                         /* Check it's really I915G */
 417                         if (agp_bridge->dev->device == PCI_DEVICE_ID_INTEL_82915G_HB)
 418                                 gtt_entries = MB(48) - KB(size);
 419                         else
 420                                 gtt_entries = 0;
 421                         break;
 422                 case I915_GMCH_GMS_STOLEN_64M:
 423                         /* Check it's really I915G */
 424                         if (agp_bridge->dev->device == PCI_DEVICE_ID_INTEL_82915G_HB)
 425                                 gtt_entries = MB(64) - KB(size);
 426                         else
 427                                 gtt_entries = 0;
 428                 default:
 429                         gtt_entries = 0;
 430                         break;
 431                 }
 432         }
 433         if (gtt_entries > 0)
 434                 printk(KERN_INFO PFX "Detected %dK %s memory.\n",
 435                        gtt_entries / KB(1), local ? "local" : "stolen");
 436         else
 437                 printk(KERN_INFO PFX
 438                        "No pre-allocated video memory detected.\n");
 439         gtt_entries /= KB(4);
 440
 441         intel_i830_private.gtt_entries = gtt_entries;
 442 }
 443
 444 /* The intel i830 automatically initializes the agp aperture during POST.
 445  * Use the memory already set aside for in the GTT.
 446  */
 447 static int intel_i830_create_gatt_table(void)
 448 {
 449         int page_order;
 450         struct aper_size_info_fixed *size;
 451         int num_entries;
 452         u32 temp;
 453
 454         size = agp_bridge->current_size;
 455         page_order = size->page_order;
 456         num_entries = size->num_entries;
 457         agp_bridge->gatt_table_real = NULL;
 458
 459         pci_read_config_dword(intel_i830_private.i830_dev,I810_MMADDR,&temp);
 460         temp &= 0xfff80000;
 461
 462         intel_i830_private.registers = ioremap(temp,128 * 4096);
 463         if (!intel_i830_private.registers)
 464                 return -ENOMEM;
 465
 466         temp = readl(intel_i830_private.registers+I810_PGETBL_CTL) & 0xfffff000;
 467         global_cache_flush();   /* FIXME: ?? */
 468
 469         /* we have to call this as early as possible after the MMIO base address is known */
 470         intel_i830_init_gtt_entries();
 471
 472         agp_bridge->gatt_table = NULL;
 473
 474         agp_bridge->gatt_bus_addr = temp;
 475
 476         return 0;
 477 }
 478
 479 /* Return the gatt table to a sane state. Use the top of stolen
 480  * memory for the GTT.
 481  */
 482 static int intel_i830_free_gatt_table(void)
 483 {
 484         return 0;
 485 }
 486
 487 static int intel_i830_fetch_size(void)
 488 {
 489         u16 gmch_ctrl;
 490         struct aper_size_info_fixed *values;
 491
 492         values = A_SIZE_FIX(agp_bridge->driver->aperture_sizes);
 493
 494         if (agp_bridge->dev->device != PCI_DEVICE_ID_INTEL_82830_HB &&
 495             agp_bridge->dev->device != PCI_DEVICE_ID_INTEL_82845G_HB) {
 496                 /* 855GM/852GM/865G has 128MB aperture size */
 497                 agp_bridge->previous_size = agp_bridge->current_size = (void *) values;
 498                 agp_bridge->aperture_size_idx = 0;
 499                 return values[0].size;
 500         }
 501
 502         pci_read_config_word(agp_bridge->dev,I830_GMCH_CTRL,&gmch_ctrl);
 503
 504         if ((gmch_ctrl & I830_GMCH_MEM_MASK) == I830_GMCH_MEM_128M) {
 505                 agp_bridge->previous_size = agp_bridge->current_size = (void *) values;
 506                 agp_bridge->aperture_size_idx = 0;
 507                 return values[0].size;
 508         } else {
 509                 agp_bridge->previous_size = agp_bridge->current_size = (void *) (values + 1);
 510                 agp_bridge->aperture_size_idx = 1;
 511                 return values[1].size;
 512         }
 513
 514         return 0;
 515 }
 516
 517 static int intel_i830_configure(void)
 518 {
 519         struct aper_size_info_fixed *current_size;
 520         u32 temp;
 521         u16 gmch_ctrl;
 522         int i;
 523
 524         current_size = A_SIZE_FIX(agp_bridge->current_size);
 525
 526         pci_read_config_dword(intel_i830_private.i830_dev,I810_GMADDR,&temp);
 527         agp_bridge->gart_bus_addr = (temp & PCI_BASE_ADDRESS_MEM_MASK);
 528
 529         pci_read_config_word(agp_bridge->dev,I830_GMCH_CTRL,&gmch_ctrl);
 530         gmch_ctrl |= I830_GMCH_ENABLED;
 531         pci_write_config_word(agp_bridge->dev,I830_GMCH_CTRL,gmch_ctrl);
 532
 533         writel(agp_bridge->gatt_bus_addr|I810_PGETBL_ENABLED, intel_i830_private.registers+I810_PGETBL_CTL);
 534         readl(intel_i830_private.registers+I810_PGETBL_CTL);    /* PCI Posting. */
 535
 536         if (agp_bridge->driver->needs_scratch_page) {
 537                 for (i = intel_i830_private.gtt_entries; i < current_size->num_entries; i++) {
 538                         writel(agp_bridge->scratch_page, intel_i830_private.registers+I810_PTE_BASE+(i*4));
 539                         readl(intel_i830_private.registers+I810_PTE_BASE+(i*4));        /* PCI Posting. */
 540                 }
 541         }
 542
 543         global_cache_flush();
 544         return 0;
 545 }
 546
 547 static void intel_i830_cleanup(void)
 548 {
 549         iounmap(intel_i830_private.registers);
 550 }
 551
 552 static int intel_i830_insert_entries(struct agp_memory *mem,off_t pg_start, int type)
 553 {
 554         int i,j,num_entries;
 555         void *temp;
 556
 557         temp = agp_bridge->current_size;
 558         num_entries = A_SIZE_FIX(temp)->num_entries;
 559
 560         if (pg_start < intel_i830_private.gtt_entries) {
 561                 printk (KERN_DEBUG PFX "pg_start == 0x%.8lx,intel_i830_private.gtt_entries == 0x%.8x\n",
 562                                 pg_start,intel_i830_private.gtt_entries);
 563
 564                 printk (KERN_INFO PFX "Trying to insert into local/stolen memory\n");
 565                 return -EINVAL;
 566         }
 567
 568         if ((pg_start + mem->page_count) > num_entries)
 569                 return -EINVAL;
 570
 571         /* The i830 can't check the GTT for entries since its read only,
 572          * depend on the caller to make the correct offset decisions.
 573          */
 574
 575         if ((type != 0 && type != AGP_PHYS_MEMORY) ||
 576                 (mem->type != 0 && mem->type != AGP_PHYS_MEMORY))
 577                 return -EINVAL;
 578
 579         global_cache_flush();   /* FIXME: Necessary ?*/
 580
 581         for (i = 0, j = pg_start; i < mem->page_count; i++, j++) {
 582                 writel(agp_bridge->driver->mask_memory(mem->memory[i], mem->type),
 583                                 intel_i830_private.registers+I810_PTE_BASE+(j*4));
 584                 readl(intel_i830_private.registers+I810_PTE_BASE+(j*4));        /* PCI Posting. */
 585         }
 586
 587         global_cache_flush();
 588         agp_bridge->driver->tlb_flush(mem);
 589         return 0;
 590 }
 591
 592 static int intel_i830_remove_entries(struct agp_memory *mem,off_t pg_start,
 593                                 int type)
 594 {
 595         int i;
 596
 597         global_cache_flush();
 598
 599         if (pg_start < intel_i830_private.gtt_entries) {
 600                 printk (KERN_INFO PFX "Trying to disable local/stolen memory\n");
 601                 return -EINVAL;
 602         }
 603
 604         for (i = pg_start; i < (mem->page_count + pg_start); i++) {
 605                 writel(agp_bridge->scratch_page, intel_i830_private.registers+I810_PTE_BASE+(i*4));
 606                 readl(intel_i830_private.registers+I810_PTE_BASE+(i*4));        /* PCI Posting. */
 607         }
 608
 609         global_cache_flush();
 610         agp_bridge->driver->tlb_flush(mem);
 611         return 0;
 612 }
 613
 614 static struct agp_memory *intel_i830_alloc_by_type(size_t pg_count,int type)
 615 {
 616         if (type == AGP_PHYS_MEMORY)
 617                 return alloc_agpphysmem_i8xx(pg_count, type);
 618
 619         /* always return NULL for other allocation types for now */
 620         return NULL;
 621 }
 622
 623 static int intel_i915_configure(void)
 624 {
 625         struct aper_size_info_fixed *current_size;
 626         u32 temp;
 627         u16 gmch_ctrl;
 628         int i;
 629
 630         current_size = A_SIZE_FIX(agp_bridge->current_size);
 631
 632         pci_read_config_dword(intel_i830_private.i830_dev, I915_GMADDR, &temp);
 633
 634         agp_bridge->gart_bus_addr = (temp & PCI_BASE_ADDRESS_MEM_MASK);
 635
 636         pci_read_config_word(agp_bridge->dev,I830_GMCH_CTRL,&gmch_ctrl);
 637         gmch_ctrl |= I830_GMCH_ENABLED;
 638         pci_write_config_word(agp_bridge->dev,I830_GMCH_CTRL,gmch_ctrl);
 639
 640         writel(agp_bridge->gatt_bus_addr | I810_PGETBL_ENABLED, intel_i830_private.registers);
 641         readl(intel_i830_private.registers+I810_PGETBL_CTL);    /* PCI Posting. */
 642
 643         if (agp_bridge->driver->needs_scratch_page) {
 644                 for (i = intel_i830_private.gtt_entries; i < current_size->num_entries; i++) {
 645                         writel(agp_bridge->scratch_page, intel_i830_private.gtt+i);
 646                         readl(intel_i830_private.gtt+i);        /* PCI Posting. */
 647                 }
 648         }
 649
 650         global_cache_flush();
 651         return 0;
 652 }
 653
 654 static void intel_i915_cleanup(void)
 655 {
 656         iounmap(intel_i830_private.gtt);
 657         iounmap(intel_i830_private.registers);
 658 }
 659
 660 static int intel_i915_insert_entries(struct agp_memory *mem,off_t pg_start,
 661                                 int type)
 662 {
 663         int i,j,num_entries;
 664         void *temp;
 665
 666         temp = agp_bridge->current_size;
 667         num_entries = A_SIZE_FIX(temp)->num_entries;
 668
 669         if (pg_start < intel_i830_private.gtt_entries) {
 670                 printk (KERN_DEBUG PFX "pg_start == 0x%.8lx,intel_i830_private.gtt_entries == 0x%.8x\n",
 671                                 pg_start,intel_i830_private.gtt_entries);
 672
 673                 printk (KERN_INFO PFX "Trying to insert into local/stolen memory\n");
 674                 return -EINVAL;
 675         }
 676
 677         if ((pg_start + mem->page_count) > num_entries)
 678                 return -EINVAL;
 679
 680         /* The i830 can't check the GTT for entries since its read only,
 681          * depend on the caller to make the correct offset decisions.
 682          */
 683
 684         if ((type != 0 && type != AGP_PHYS_MEMORY) ||
 685                 (mem->type != 0 && mem->type != AGP_PHYS_MEMORY))
 686                 return -EINVAL;
 687
 688         global_cache_flush();
 689
 690         for (i = 0, j = pg_start; i < mem->page_count; i++, j++) {
 691                 writel(agp_bridge->driver->mask_memory(mem->memory[i], mem->type), intel_i830_private.gtt+j);
 692                 readl(intel_i830_private.gtt+j);        /* PCI Posting. */
 693         }
 694
 695         global_cache_flush();
 696         agp_bridge->driver->tlb_flush(mem);
 697         return 0;
 698 }
 699
 700 static int intel_i915_remove_entries(struct agp_memory *mem,off_t pg_start,
 701                                 int type)
 702 {
 703         int i;
 704
 705         global_cache_flush();
 706
 707         if (pg_start < intel_i830_private.gtt_entries) {
 708                 printk (KERN_INFO PFX "Trying to disable local/stolen memory\n");
 709                 return -EINVAL;
 710         }
 711
 712         for (i = pg_start; i < (mem->page_count + pg_start); i++) {
 713                 writel(agp_bridge->scratch_page, intel_i830_private.gtt+i);
 714                 readl(intel_i830_private.gtt+i);
 715         }
 716
 717         global_cache_flush();
 718         agp_bridge->driver->tlb_flush(mem);
 719         return 0;
 720 }
 721
 722 static int intel_i915_fetch_size(void)
 723 {
 724         struct aper_size_info_fixed *values;
 725         u32 temp, offset = 0;
 726
 727 #define I915_256MB_ADDRESS_MASK (1<<27)
 728
 729         values = A_SIZE_FIX(agp_bridge->driver->aperture_sizes);
 730
 731         pci_read_config_dword(intel_i830_private.i830_dev, I915_GMADDR, &temp);
 732         if (temp & I915_256MB_ADDRESS_MASK)
 733                 offset = 0;     /* 128MB aperture */
 734         else
 735                 offset = 2;     /* 256MB aperture */
 736         agp_bridge->previous_size = agp_bridge->current_size = (void *)(values + offset);
 737         return values[offset].size;
 738 }
 739
 740 /* The intel i915 automatically initializes the agp aperture during POST.
 741  * Use the memory already set aside for in the GTT.
 742  */
 743 static int intel_i915_create_gatt_table(void)
 744 {
 745         int page_order;
 746         struct aper_size_info_fixed *size;
 747         int num_entries;
 748         u32 temp, temp2;
 749
 750         size = agp_bridge->current_size;
 751         page_order = size->page_order;
 752         num_entries = size->num_entries;
 753         agp_bridge->gatt_table_real = NULL;
 754
 755         pci_read_config_dword(intel_i830_private.i830_dev, I915_MMADDR, &temp);
 756         pci_read_config_dword(intel_i830_private.i830_dev, I915_PTEADDR,&temp2);
 757
 758         intel_i830_private.gtt = ioremap(temp2, 256 * 1024);
 759         if (!intel_i830_private.gtt)
 760                 return -ENOMEM;
 761
 762         temp &= 0xfff80000;
 763
 764         intel_i830_private.registers = ioremap(temp,128 * 4096);
 765         if (!intel_i830_private.registers)
 766                 return -ENOMEM;
 767
 768         temp = readl(intel_i830_private.registers+I810_PGETBL_CTL) & 0xfffff000;
 769         global_cache_flush();   /* FIXME: ? */
 770
 771         /* we have to call this as early as possible after the MMIO base address is known */
 772         intel_i830_init_gtt_entries();
 773
 774         agp_bridge->gatt_table = NULL;
 775
 776         agp_bridge->gatt_bus_addr = temp;
 777
 778         return 0;
 779 }
 780
 781 static int intel_fetch_size(void)
 782 {
 783         int i;
 784         u16 temp;
 785         struct aper_size_info_16 *values;
 786
 787         pci_read_config_word(agp_bridge->dev, INTEL_APSIZE, &temp);
 788         values = A_SIZE_16(agp_bridge->driver->aperture_sizes);
 789
 790         for (i = 0; i < agp_bridge->driver->num_aperture_sizes; i++) {
 791                 if (temp == values[i].size_value) {
 792                         agp_bridge->previous_size = agp_bridge->current_size = (void *) (values + i);
 793                         agp_bridge->aperture_size_idx = i;
 794                         return values[i].size;
 795                 }
 796         }
 797
 798         return 0;
 799 }
 800
 801 static int __intel_8xx_fetch_size(u8 temp)
 802 {
 803         int i;
 804         struct aper_size_info_8 *values;
 805
 806         values = A_SIZE_8(agp_bridge->driver->aperture_sizes);
 807
 808         for (i = 0; i < agp_bridge->driver->num_aperture_sizes; i++) {
 809                 if (temp == values[i].size_value) {
 810                         agp_bridge->previous_size =
 811                                 agp_bridge->current_size = (void *) (values + i);
 812                         agp_bridge->aperture_size_idx = i;
 813                         return values[i].size;
 814                 }
 815         }
 816         return 0;
 817 }
 818
 819 static int intel_8xx_fetch_size(void)
 820 {
 821         u8 temp;
 822
 823         pci_read_config_byte(agp_bridge->dev, INTEL_APSIZE, &temp);
 824         return __intel_8xx_fetch_size(temp);
 825 }
 826
 827 static int intel_815_fetch_size(void)
 828 {
 829         u8 temp;
 830
 831         /* Intel 815 chipsets have a _weird_ APSIZE register with only
 832          * one non-reserved bit, so mask the others out ... */
 833         pci_read_config_byte(agp_bridge->dev, INTEL_APSIZE, &temp);
 834         temp &= (1 << 3);
 835
 836         return __intel_8xx_fetch_size(temp);
 837 }
 838
 839 static void intel_tlbflush(struct agp_memory *mem)
 840 {
 841         pci_write_config_dword(agp_bridge->dev, INTEL_AGPCTRL, 0x2200);
 842         pci_write_config_dword(agp_bridge->dev, INTEL_AGPCTRL, 0x2280);
 843 }
 844
 845
 846 static void intel_8xx_tlbflush(struct agp_memory *mem)
 847 {
 848         u32 temp;
 849         pci_read_config_dword(agp_bridge->dev, INTEL_AGPCTRL, &temp);
 850         pci_write_config_dword(agp_bridge->dev, INTEL_AGPCTRL, temp & ~(1 << 7));
 851         pci_read_config_dword(agp_bridge->dev, INTEL_AGPCTRL, &temp);
 852         pci_write_config_dword(agp_bridge->dev, INTEL_AGPCTRL, temp | (1 << 7));
 853 }
 854
 855
 856 static void intel_cleanup(void)
 857 {
 858         u16 temp;
 859         struct aper_size_info_16 *previous_size;
 860
 861         previous_size = A_SIZE_16(agp_bridge->previous_size);
 862         pci_read_config_word(agp_bridge->dev, INTEL_NBXCFG, &temp);
 863         pci_write_config_word(agp_bridge->dev, INTEL_NBXCFG, temp & ~(1 << 9));
 864         pci_write_config_word(agp_bridge->dev, INTEL_APSIZE, previous_size->size_value);
 865 }
 866
 867
 868 static void intel_8xx_cleanup(void)
 869 {
 870         u16 temp;
 871         struct aper_size_info_8 *previous_size;
 872
 873         previous_size = A_SIZE_8(agp_bridge->previous_size);
 874         pci_read_config_word(agp_bridge->dev, INTEL_NBXCFG, &temp);
 875         pci_write_config_word(agp_bridge->dev, INTEL_NBXCFG, temp & ~(1 << 9));
 876         pci_write_config_byte(agp_bridge->dev, INTEL_APSIZE, previous_size->size_value);
 877 }
 878
 879
 880 static int intel_configure(void)
 881 {
 882         u32 temp;
 883         u16 temp2;
 884         struct aper_size_info_16 *current_size;
 885
 886         current_size = A_SIZE_16(agp_bridge->current_size);
 887
 888         /* aperture size */
 889         pci_write_config_word(agp_bridge->dev, INTEL_APSIZE, current_size->size_value);
 890
 891         /* address to map to */
 892         pci_read_config_dword(agp_bridge->dev, AGP_APBASE, &temp);
 893         agp_bridge->gart_bus_addr = (temp & PCI_BASE_ADDRESS_MEM_MASK);
 894
 895         /* attbase - aperture base */
 896         pci_write_config_dword(agp_bridge->dev, INTEL_ATTBASE, agp_bridge->gatt_bus_addr);
 897
 898         /* agpctrl */
 899         pci_write_config_dword(agp_bridge->dev, INTEL_AGPCTRL, 0x2280);
 900
 901         /* paccfg/nbxcfg */
 902         pci_read_config_word(agp_bridge->dev, INTEL_NBXCFG, &temp2);
 903         pci_write_config_word(agp_bridge->dev, INTEL_NBXCFG,
 904                         (temp2 & ~(1 << 10)) | (1 << 9));
 905         /* clear any possible error conditions */
 906         pci_write_config_byte(agp_bridge->dev, INTEL_ERRSTS + 1, 7);
 907         return 0;
 908 }
 909
 910 static int intel_815_configure(void)
 911 {
 912         u32 temp, addr;
 913         u8 temp2;
 914         struct aper_size_info_8 *current_size;
 915
 916         /* attbase - aperture base */
 917         /* the Intel 815 chipset spec. says that bits 29-31 in the
 918         * ATTBASE register are reserved -> try not to write them */
 919         if (agp_bridge->gatt_bus_addr & INTEL_815_ATTBASE_MASK) {
 920                 printk (KERN_EMERG PFX "gatt bus addr too high");
 921                 return -EINVAL;
 922         }
 923
 924         current_size = A_SIZE_8(agp_bridge->current_size);
 925
 926         /* aperture size */
 927         pci_write_config_byte(agp_bridge->dev, INTEL_APSIZE,
 928                         current_size->size_value);
 929
 930         /* address to map to */
 931         pci_read_config_dword(agp_bridge->dev, AGP_APBASE, &temp);
 932         agp_bridge->gart_bus_addr = (temp & PCI_BASE_ADDRESS_MEM_MASK);
 933
 934         pci_read_config_dword(agp_bridge->dev, INTEL_ATTBASE, &addr);
 935         addr &= INTEL_815_ATTBASE_MASK;
 936         addr |= agp_bridge->gatt_bus_addr;
 937         pci_write_config_dword(agp_bridge->dev, INTEL_ATTBASE, addr);
 938
 939         /* agpctrl */
 940         pci_write_config_dword(agp_bridge->dev, INTEL_AGPCTRL, 0x0000);
 941
 942         /* apcont */
 943         pci_read_config_byte(agp_bridge->dev, INTEL_815_APCONT, &temp2);
 944         pci_write_config_byte(agp_bridge->dev, INTEL_815_APCONT, temp2 | (1 << 1));
 945
 946         /* clear any possible error conditions */
 947         /* Oddness : this chipset seems to have no ERRSTS register ! */
 948         return 0;
 949 }
 950
 951 static void intel_820_tlbflush(struct agp_memory *mem)
 952 {
 953         return;
 954 }
 955
 956 static void intel_820_cleanup(void)
 957 {
 958         u8 temp;
 959         struct aper_size_info_8 *previous_size;
 960
 961         previous_size = A_SIZE_8(agp_bridge->previous_size);
 962         pci_read_config_byte(agp_bridge->dev, INTEL_I820_RDCR, &temp);
 963         pci_write_config_byte(agp_bridge->dev, INTEL_I820_RDCR,
 964                         temp & ~(1 << 1));
 965         pci_write_config_byte(agp_bridge->dev, INTEL_APSIZE,
 966                         previous_size->size_value);
 967 }
 968
 969
 970 static int intel_820_configure(void)
 971 {
 972         u32 temp;
 973         u8 temp2;
 974         struct aper_size_info_8 *current_size;
 975
 976         current_size = A_SIZE_8(agp_bridge->current_size);
 977
 978         /* aperture size */
 979         pci_write_config_byte(agp_bridge->dev, INTEL_APSIZE, current_size->size_value);
 980
 981         /* address to map to */
 982         pci_read_config_dword(agp_bridge->dev, AGP_APBASE, &temp);
 983         agp_bridge->gart_bus_addr = (temp & PCI_BASE_ADDRESS_MEM_MASK);
 984
 985         /* attbase - aperture base */
 986         pci_write_config_dword(agp_bridge->dev, INTEL_ATTBASE, agp_bridge->gatt_bus_addr);
 987
 988         /* agpctrl */
 989         pci_write_config_dword(agp_bridge->dev, INTEL_AGPCTRL, 0x0000);
 990
 991         /* global enable aperture access */
 992         /* This flag is not accessed through MCHCFG register as in */
 993         /* i850 chipset. */
 994         pci_read_config_byte(agp_bridge->dev, INTEL_I820_RDCR, &temp2);
 995         pci_write_config_byte(agp_bridge->dev, INTEL_I820_RDCR, temp2 | (1 << 1));
 996         /* clear any possible AGP-related error conditions */
 997         pci_write_config_word(agp_bridge->dev, INTEL_I820_ERRSTS, 0x001c);
 998         return 0;
 999 }
1000
1001 static int intel_840_configure(void)
1002 {
1003         u32 temp;
1004         u16 temp2;
1005         struct aper_size_info_8 *current_size;
1006
1007         current_size = A_SIZE_8(agp_bridge->current_size);
1008
1009         /* aperture size */
1010         pci_write_config_byte(agp_bridge->dev, INTEL_APSIZE, current_size->size_value);
1011
1012         /* address to map to */
1013         pci_read_config_dword(agp_bridge->dev, AGP_APBASE, &temp);
1014         agp_bridge->gart_bus_addr = (temp & PCI_BASE_ADDRESS_MEM_MASK);
1015
1016         /* attbase - aperture base */
1017         pci_write_config_dword(agp_bridge->dev, INTEL_ATTBASE, agp_bridge->gatt_bus_addr);
1018
1019         /* agpctrl */
1020         pci_write_config_dword(agp_bridge->dev, INTEL_AGPCTRL, 0x0000);
1021
1022         /* mcgcfg */
1023         pci_read_config_word(agp_bridge->dev, INTEL_I840_MCHCFG, &temp2);
1024         pci_write_config_word(agp_bridge->dev, INTEL_I840_MCHCFG, temp2 | (1 << 9));
1025         /* clear any possible error conditions */
1026         pci_write_config_word(agp_bridge->dev, INTEL_I840_ERRSTS, 0xc000);
1027         return 0;
1028 }
1029
1030 static int intel_845_configure(void)
1031 {
1032         u32 temp;
1033         u8 temp2;
1034         struct aper_size_info_8 *current_size;
1035
1036         current_size = A_SIZE_8(agp_bridge->current_size);
1037
1038         /* aperture size */
1039         pci_write_config_byte(agp_bridge->dev, INTEL_APSIZE, current_size->size_value);
1040
1041         /* address to map to */
1042         pci_read_config_dword(agp_bridge->dev, AGP_APBASE, &temp);
1043         agp_bridge->gart_bus_addr = (temp & PCI_BASE_ADDRESS_MEM_MASK);
1044
1045         /* attbase - aperture base */
1046         pci_write_config_dword(agp_bridge->dev, INTEL_ATTBASE, agp_bridge->gatt_bus_addr);
1047
1048         /* agpctrl */
1049         pci_write_config_dword(agp_bridge->dev, INTEL_AGPCTRL, 0x0000);
1050
1051         /* agpm */
1052         pci_read_config_byte(agp_bridge->dev, INTEL_I845_AGPM, &temp2);
1053         pci_write_config_byte(agp_bridge->dev, INTEL_I845_AGPM, temp2 | (1 << 1));
1054         /* clear any possible error conditions */
1055         pci_write_config_word(agp_bridge->dev, INTEL_I845_ERRSTS, 0x001c);
1056         return 0;
1057 }
1058
1059 static int intel_850_configure(void)
1060 {
1061         u32 temp;
1062         u16 temp2;
1063         struct aper_size_info_8 *current_size;
1064
1065         current_size = A_SIZE_8(agp_bridge->current_size);
1066
1067         /* aperture size */
1068         pci_write_config_byte(agp_bridge->dev, INTEL_APSIZE, current_size->size_value);
1069
1070         /* address to map to */
1071         pci_read_config_dword(agp_bridge->dev, AGP_APBASE, &temp);
1072         agp_bridge->gart_bus_addr = (temp & PCI_BASE_ADDRESS_MEM_MASK);
1073
1074         /* attbase - aperture base */
1075         pci_write_config_dword(agp_bridge->dev, INTEL_ATTBASE, agp_bridge->gatt_bus_addr);
1076
1077         /* agpctrl */
1078         pci_write_config_dword(agp_bridge->dev, INTEL_AGPCTRL, 0x0000);
1079
1080         /* mcgcfg */
1081         pci_read_config_word(agp_bridge->dev, INTEL_I850_MCHCFG, &temp2);
1082         pci_write_config_word(agp_bridge->dev, INTEL_I850_MCHCFG, temp2 | (1 << 9));
1083         /* clear any possible AGP-related error conditions */
1084         pci_write_config_word(agp_bridge->dev, INTEL_I850_ERRSTS, 0x001c);
1085         return 0;
1086 }
1087
1088 static int intel_860_configure(void)
1089 {
1090         u32 temp;
1091         u16 temp2;
1092         struct aper_size_info_8 *current_size;
1093
1094         current_size = A_SIZE_8(agp_bridge->current_size);
1095
1096         /* aperture size */
1097         pci_write_config_byte(agp_bridge->dev, INTEL_APSIZE, current_size->size_value);
1098
1099         /* address to map to */
1100         pci_read_config_dword(agp_bridge->dev, AGP_APBASE, &temp);
1101         agp_bridge->gart_bus_addr = (temp & PCI_BASE_ADDRESS_MEM_MASK);
1102
1103         /* attbase - aperture base */
1104         pci_write_config_dword(agp_bridge->dev, INTEL_ATTBASE, agp_bridge->gatt_bus_addr);
1105
1106         /* agpctrl */
1107         pci_write_config_dword(agp_bridge->dev, INTEL_AGPCTRL, 0x0000);
1108
1109         /* mcgcfg */
1110         pci_read_config_word(agp_bridge->dev, INTEL_I860_MCHCFG, &temp2);
1111         pci_write_config_word(agp_bridge->dev, INTEL_I860_MCHCFG, temp2 | (1 << 9));
1112         /* clear any possible AGP-related error conditions */
1113         pci_write_config_word(agp_bridge->dev, INTEL_I860_ERRSTS, 0xf700);
1114         return 0;
1115 }
1116
1117 static int intel_830mp_configure(void)
1118 {
1119         u32 temp;
1120         u16 temp2;
1121         struct aper_size_info_8 *current_size;
1122
1123         current_size = A_SIZE_8(agp_bridge->current_size);
1124
1125         /* aperture size */
1126         pci_write_config_byte(agp_bridge->dev, INTEL_APSIZE, current_size->size_value);
1127
1128         /* address to map to */
1129         pci_read_config_dword(agp_bridge->dev, AGP_APBASE, &temp);
1130         agp_bridge->gart_bus_addr = (temp & PCI_BASE_ADDRESS_MEM_MASK);
1131
1132         /* attbase - aperture base */
1133         pci_write_config_dword(agp_bridge->dev, INTEL_ATTBASE, agp_bridge->gatt_bus_addr);
1134
1135         /* agpctrl */
1136         pci_write_config_dword(agp_bridge->dev, INTEL_AGPCTRL, 0x0000);
1137
1138         /* gmch */
1139         pci_read_config_word(agp_bridge->dev, INTEL_NBXCFG, &temp2);
1140         pci_write_config_word(agp_bridge->dev, INTEL_NBXCFG, temp2 | (1 << 9));
1141         /* clear any possible AGP-related error conditions */
1142         pci_write_config_word(agp_bridge->dev, INTEL_I830_ERRSTS, 0x1c);
1143         return 0;
1144 }
1145
1146 static int intel_7505_configure(void)
1147 {
1148         u32 temp;
1149         u16 temp2;
1150         struct aper_size_info_8 *current_size;
1151
1152         current_size = A_SIZE_8(agp_bridge->current_size);
1153
1154         /* aperture size */
1155         pci_write_config_byte(agp_bridge->dev, INTEL_APSIZE, current_size->size_value);
1156
1157         /* address to map to */
1158         pci_read_config_dword(agp_bridge->dev, AGP_APBASE, &temp);
1159         agp_bridge->gart_bus_addr = (temp & PCI_BASE_ADDRESS_MEM_MASK);
1160
1161         /* attbase - aperture base */
1162         pci_write_config_dword(agp_bridge->dev, INTEL_ATTBASE, agp_bridge->gatt_bus_addr);
1163
1164         /* agpctrl */
1165         pci_write_config_dword(agp_bridge->dev, INTEL_AGPCTRL, 0x0000);
1166
1167         /* mchcfg */
1168         pci_read_config_word(agp_bridge->dev, INTEL_I7505_MCHCFG, &temp2);
1169         pci_write_config_word(agp_bridge->dev, INTEL_I7505_MCHCFG, temp2 | (1 << 9));
1170
1171         return 0;
1172 }
1173
1174 /* Setup function */
1175 static struct gatt_mask intel_generic_masks[] =
1176 {
1177         {.mask = 0x00000017, .type = 0}
1178 };
1179
1180 static struct aper_size_info_8 intel_815_sizes[2] =
1181 {
1182         {64, 16384, 4, 0},
1183         {32, 8192, 3, 8},
1184 };
1185
1186 static struct aper_size_info_8 intel_8xx_sizes[7] =
1187 {
1188         {256, 65536, 6, 0},
1189         {128, 32768, 5, 32},
1190         {64, 16384, 4, 48},
1191         {32, 8192, 3, 56},
1192         {16, 4096, 2, 60},
1193         {8, 2048, 1, 62},
1194         {4, 1024, 0, 63}
1195 };
1196
1197 static struct aper_size_info_16 intel_generic_sizes[7] =
1198 {
1199         {256, 65536, 6, 0},
1200         {128, 32768, 5, 32},
1201         {64, 16384, 4, 48},
1202         {32, 8192, 3, 56},
1203         {16, 4096, 2, 60},
1204         {8, 2048, 1, 62},
1205         {4, 1024, 0, 63}
1206 };
1207
1208 static struct aper_size_info_8 intel_830mp_sizes[4] =
1209 {
1210         {256, 65536, 6, 0},
1211         {128, 32768, 5, 32},
1212         {64, 16384, 4, 48},
1213         {32, 8192, 3, 56}
1214 };
1215
1216 static struct agp_bridge_driver intel_generic_driver = {
1217         .owner                  = THIS_MODULE,
1218         .aperture_sizes         = intel_generic_sizes,
1219         .size_type              = U16_APER_SIZE,
1220         .num_aperture_sizes     = 7,
1221         .configure              = intel_configure,
1222         .fetch_size             = intel_fetch_size,
1223         .cleanup                = intel_cleanup,
1224         .tlb_flush              = intel_tlbflush,
1225         .mask_memory            = agp_generic_mask_memory,
1226         .masks                  = intel_generic_masks,
1227         .agp_enable             = agp_generic_enable,
1228         .cache_flush            = global_cache_flush,
1229         .create_gatt_table      = agp_generic_create_gatt_table,
1230         .free_gatt_table        = agp_generic_free_gatt_table,
1231         .insert_memory          = agp_generic_insert_memory,
1232         .remove_memory          = agp_generic_remove_memory,
1233         .alloc_by_type          = agp_generic_alloc_by_type,
1234         .free_by_type           = agp_generic_free_by_type,
1235         .agp_alloc_page         = agp_generic_alloc_page,
1236         .agp_destroy_page       = agp_generic_destroy_page,
1237 };
1238
1239 static struct agp_bridge_driver intel_810_driver = {
1240         .owner                  = THIS_MODULE,
1241         .aperture_sizes         = intel_i810_sizes,
1242         .size_type              = FIXED_APER_SIZE,
1243         .num_aperture_sizes     = 2,
1244         .needs_scratch_page     = TRUE,
1245         .configure              = intel_i810_configure,
1246         .fetch_size             = intel_i810_fetch_size,
1247         .cleanup                = intel_i810_cleanup,
1248         .tlb_flush              = intel_i810_tlbflush,
1249         .mask_memory            = intel_i810_mask_memory,
1250         .masks                  = intel_i810_masks,
1251         .agp_enable             = intel_i810_agp_enable,
1252         .cache_flush            = global_cache_flush,
1253         .create_gatt_table      = agp_generic_create_gatt_table,
1254         .free_gatt_table        = agp_generic_free_gatt_table,
1255         .insert_memory          = intel_i810_insert_entries,
1256         .remove_memory          = intel_i810_remove_entries,
1257         .alloc_by_type          = intel_i810_alloc_by_type,
1258         .free_by_type           = intel_i810_free_by_type,
1259         .agp_alloc_page         = agp_generic_alloc_page,
1260         .agp_destroy_page       = agp_generic_destroy_page,
1261 };
1262
1263 static struct agp_bridge_driver intel_815_driver = {
1264         .owner                  = THIS_MODULE,
1265         .aperture_sizes         = intel_815_sizes,
1266         .size_type              = U8_APER_SIZE,
1267         .num_aperture_sizes     = 2,
1268         .configure              = intel_815_configure,
1269         .fetch_size             = intel_815_fetch_size,
1270         .cleanup                = intel_8xx_cleanup,
1271         .tlb_flush              = intel_8xx_tlbflush,
1272         .mask_memory            = agp_generic_mask_memory,
1273         .masks                  = intel_generic_masks,
1274         .agp_enable             = agp_generic_enable,
1275         .cache_flush            = global_cache_flush,
1276         .create_gatt_table      = agp_generic_create_gatt_table,
1277         .free_gatt_table        = agp_generic_free_gatt_table,
1278         .insert_memory          = agp_generic_insert_memory,
1279         .remove_memory          = agp_generic_remove_memory,
1280         .alloc_by_type          = agp_generic_alloc_by_type,
1281         .free_by_type           = agp_generic_free_by_type,
1282         .agp_alloc_page         = agp_generic_alloc_page,
1283         .agp_destroy_page       = agp_generic_destroy_page,
1284 };
1285
1286 static struct agp_bridge_driver intel_830_driver = {
1287         .owner                  = THIS_MODULE,
1288         .aperture_sizes         = intel_i830_sizes,
1289         .size_type              = FIXED_APER_SIZE,
1290         .num_aperture_sizes     = 3,
1291         .needs_scratch_page     = TRUE,
1292         .configure              = intel_i830_configure,
1293         .fetch_size             = intel_i830_fetch_size,
1294         .cleanup                = intel_i830_cleanup,
1295         .tlb_flush              = intel_i810_tlbflush,
1296         .mask_memory            = intel_i810_mask_memory,
1297         .masks                  = intel_i810_masks,
1298         .agp_enable             = intel_i810_agp_enable,
1299         .cache_flush            = global_cache_flush,
1300         .create_gatt_table      = intel_i830_create_gatt_table,
1301         .free_gatt_table        = intel_i830_free_gatt_table,
1302         .insert_memory          = intel_i830_insert_entries,
1303         .remove_memory          = intel_i830_remove_entries,
1304         .alloc_by_type          = intel_i830_alloc_by_type,
1305         .free_by_type           = intel_i810_free_by_type,
1306         .agp_alloc_page         = agp_generic_alloc_page,
1307         .agp_destroy_page       = agp_generic_destroy_page,
1308 };
1309
1310 static struct agp_bridge_driver intel_820_driver = {
1311         .owner                  = THIS_MODULE,
1312         .aperture_sizes         = intel_8xx_sizes,
1313         .size_type              = U8_APER_SIZE,
1314         .num_aperture_sizes     = 7,
1315         .configure              = intel_820_configure,
1316         .fetch_size             = intel_8xx_fetch_size,
1317         .cleanup                = intel_820_cleanup,
1318         .tlb_flush              = intel_820_tlbflush,
1319         .mask_memory            = agp_generic_mask_memory,
1320         .masks                  = intel_generic_masks,
1321         .agp_enable             = agp_generic_enable,
1322         .cache_flush            = global_cache_flush,
1323         .create_gatt_table      = agp_generic_create_gatt_table,
1324         .free_gatt_table        = agp_generic_free_gatt_table,
1325         .insert_memory          = agp_generic_insert_memory,
1326         .remove_memory          = agp_generic_remove_memory,
1327         .alloc_by_type          = agp_generic_alloc_by_type,
1328         .free_by_type           = agp_generic_free_by_type,
1329         .agp_alloc_page         = agp_generic_alloc_page,
1330         .agp_destroy_page       = agp_generic_destroy_page,
1331 };
1332
1333 static struct agp_bridge_driver intel_830mp_driver = {
1334         .owner                  = THIS_MODULE,
1335         .aperture_sizes         = intel_830mp_sizes,
1336         .size_type              = U8_APER_SIZE,
1337         .num_aperture_sizes     = 4,
1338         .configure              = intel_830mp_configure,
1339         .fetch_size             = intel_8xx_fetch_size,
1340         .cleanup                = intel_8xx_cleanup,
1341         .tlb_flush              = intel_8xx_tlbflush,
1342         .mask_memory            = agp_generic_mask_memory,
1343         .masks                  = intel_generic_masks,
1344         .agp_enable             = agp_generic_enable,
1345         .cache_flush            = global_cache_flush,
1346         .create_gatt_table      = agp_generic_create_gatt_table,
1347         .free_gatt_table        = agp_generic_free_gatt_table,
1348         .insert_memory          = agp_generic_insert_memory,
1349         .remove_memory          = agp_generic_remove_memory,
1350         .alloc_by_type          = agp_generic_alloc_by_type,
1351         .free_by_type           = agp_generic_free_by_type,
1352         .agp_alloc_page         = agp_generic_alloc_page,
1353         .agp_destroy_page       = agp_generic_destroy_page,
1354 };
1355
1356 static struct agp_bridge_driver intel_840_driver = {
1357         .owner                  = THIS_MODULE,
1358         .aperture_sizes         = intel_8xx_sizes,
1359         .size_type              = U8_APER_SIZE,
1360         .num_aperture_sizes     = 7,
1361         .configure              = intel_840_configure,
1362         .fetch_size             = intel_8xx_fetch_size,
1363         .cleanup                = intel_8xx_cleanup,
1364         .tlb_flush              = intel_8xx_tlbflush,
1365         .mask_memory            = agp_generic_mask_memory,
1366         .masks                  = intel_generic_masks,
1367         .agp_enable             = agp_generic_enable,
1368         .cache_flush            = global_cache_flush,
1369         .create_gatt_table      = agp_generic_create_gatt_table,
1370         .free_gatt_table        = agp_generic_free_gatt_table,
1371         .insert_memory          = agp_generic_insert_memory,
1372         .remove_memory          = agp_generic_remove_memory,
1373         .alloc_by_type          = agp_generic_alloc_by_type,
1374         .free_by_type           = agp_generic_free_by_type,
1375         .agp_alloc_page         = agp_generic_alloc_page,
1376         .agp_destroy_page       = agp_generic_destroy_page,
1377 };
1378
1379 static struct agp_bridge_driver intel_845_driver = {
1380         .owner                  = THIS_MODULE,
1381         .aperture_sizes         = intel_8xx_sizes,
1382         .size_type              = U8_APER_SIZE,
1383         .num_aperture_sizes     = 7,
1384         .configure              = intel_845_configure,
1385         .fetch_size             = intel_8xx_fetch_size,
1386         .cleanup                = intel_8xx_cleanup,
1387         .tlb_flush              = intel_8xx_tlbflush,
1388         .mask_memory            = agp_generic_mask_memory,
1389         .masks                  = intel_generic_masks,
1390         .agp_enable             = agp_generic_enable,
1391         .cache_flush            = global_cache_flush,
1392         .create_gatt_table      = agp_generic_create_gatt_table,
1393         .free_gatt_table        = agp_generic_free_gatt_table,
1394         .insert_memory          = agp_generic_insert_memory,
1395         .remove_memory          = agp_generic_remove_memory,
1396         .alloc_by_type          = agp_generic_alloc_by_type,
1397         .free_by_type           = agp_generic_free_by_type,
1398         .agp_alloc_page         = agp_generic_alloc_page,
1399         .agp_destroy_page       = agp_generic_destroy_page,
1400 };
1401
1402 static struct agp_bridge_driver intel_850_driver = {
1403         .owner                  = THIS_MODULE,
1404         .aperture_sizes         = intel_8xx_sizes,
1405         .size_type              = U8_APER_SIZE,
1406         .num_aperture_sizes     = 7,
1407         .configure              = intel_850_configure,
1408         .fetch_size             = intel_8xx_fetch_size,
1409         .cleanup                = intel_8xx_cleanup,
1410         .tlb_flush              = intel_8xx_tlbflush,
1411         .mask_memory            = agp_generic_mask_memory,
1412         .masks                  = intel_generic_masks,
1413         .agp_enable             = agp_generic_enable,
1414         .cache_flush            = global_cache_flush,
1415         .create_gatt_table      = agp_generic_create_gatt_table,
1416         .free_gatt_table        = agp_generic_free_gatt_table,
1417         .insert_memory          = agp_generic_insert_memory,
1418         .remove_memory          = agp_generic_remove_memory,
1419         .alloc_by_type          = agp_generic_alloc_by_type,
1420         .free_by_type           = agp_generic_free_by_type,
1421         .agp_alloc_page         = agp_generic_alloc_page,
1422         .agp_destroy_page       = agp_generic_destroy_page,
1423 };
1424
1425 static struct agp_bridge_driver intel_860_driver = {
1426         .owner                  = THIS_MODULE,
1427         .aperture_sizes         = intel_8xx_sizes,
1428         .size_type              = U8_APER_SIZE,
1429         .num_aperture_sizes     = 7,
1430         .configure              = intel_860_configure,
1431         .fetch_size             = intel_8xx_fetch_size,
1432         .cleanup                = intel_8xx_cleanup,
1433         .tlb_flush              = intel_8xx_tlbflush,
1434         .mask_memory            = agp_generic_mask_memory,
1435         .masks                  = intel_generic_masks,
1436         .agp_enable             = agp_generic_enable,
1437         .cache_flush            = global_cache_flush,
1438         .create_gatt_table      = agp_generic_create_gatt_table,
1439         .free_gatt_table        = agp_generic_free_gatt_table,
1440         .insert_memory          = agp_generic_insert_memory,
1441         .remove_memory          = agp_generic_remove_memory,
1442         .alloc_by_type          = agp_generic_alloc_by_type,
1443         .free_by_type           = agp_generic_free_by_type,
1444         .agp_alloc_page         = agp_generic_alloc_page,
1445         .agp_destroy_page       = agp_generic_destroy_page,
1446 };
1447
1448 static struct agp_bridge_driver intel_915_driver = {
1449         .owner                  = THIS_MODULE,
1450         .aperture_sizes         = intel_i830_sizes,
1451         .size_type              = FIXED_APER_SIZE,
1452         .num_aperture_sizes     = 3,
1453         .needs_scratch_page     = TRUE,
1454         .configure              = intel_i915_configure,
1455         .fetch_size             = intel_i915_fetch_size,
1456         .cleanup                = intel_i915_cleanup,
1457         .tlb_flush              = intel_i810_tlbflush,
1458         .mask_memory            = intel_i810_mask_memory,
1459         .masks                  = intel_i810_masks,
1460         .agp_enable             = intel_i810_agp_enable,
1461         .cache_flush            = global_cache_flush,
1462         .create_gatt_table      = intel_i915_create_gatt_table,
1463         .free_gatt_table        = intel_i830_free_gatt_table,
1464         .insert_memory          = intel_i915_insert_entries,
1465         .remove_memory          = intel_i915_remove_entries,
1466         .alloc_by_type          = intel_i830_alloc_by_type,
1467         .free_by_type           = intel_i810_free_by_type,
1468         .agp_alloc_page         = agp_generic_alloc_page,
1469         .agp_destroy_page       = agp_generic_destroy_page,
1470 };
1471
1472
1473 static struct agp_bridge_driver intel_7505_driver = {
1474         .owner                  = THIS_MODULE,
1475         .aperture_sizes         = intel_8xx_sizes,
1476         .size_type              = U8_APER_SIZE,
1477         .num_aperture_sizes     = 7,
1478         .configure              = intel_7505_configure,
1479         .fetch_size             = intel_8xx_fetch_size,
1480         .cleanup                = intel_8xx_cleanup,
1481         .tlb_flush              = intel_8xx_tlbflush,
1482         .mask_memory            = agp_generic_mask_memory,
1483         .masks                  = intel_generic_masks,
1484         .agp_enable             = agp_generic_enable,
1485         .cache_flush            = global_cache_flush,
1486         .create_gatt_table      = agp_generic_create_gatt_table,
1487         .free_gatt_table        = agp_generic_free_gatt_table,
1488         .insert_memory          = agp_generic_insert_memory,
1489         .remove_memory          = agp_generic_remove_memory,
1490         .alloc_by_type          = agp_generic_alloc_by_type,
1491         .free_by_type           = agp_generic_free_by_type,
1492         .agp_alloc_page         = agp_generic_alloc_page,
1493         .agp_destroy_page       = agp_generic_destroy_page,
1494 };
1495
1496 static int find_i810(u16 device)
1497 {
1498         struct pci_dev *i810_dev;
1499
1500         i810_dev = pci_get_device(PCI_VENDOR_ID_INTEL, device, NULL);
1501         if (!i810_dev)
1502                 return 0;
1503         intel_i810_private.i810_dev = i810_dev;
1504         return 1;
1505 }
1506
1507 static int find_i830(u16 device)
1508 {
1509         struct pci_dev *i830_dev;
1510
1511         i830_dev = pci_get_device(PCI_VENDOR_ID_INTEL, device, NULL);
1512         if (i830_dev && PCI_FUNC(i830_dev->devfn) != 0) {
1513                 i830_dev = pci_get_device(PCI_VENDOR_ID_INTEL,
1514                                 device, i830_dev);
1515         }
1516
1517         if (!i830_dev)
1518                 return 0;
1519
1520         intel_i830_private.i830_dev = i830_dev;
1521         return 1;
1522 }
1523
1524 static int __devinit agp_intel_probe(struct pci_dev *pdev,
1525                                      const struct pci_device_id *ent)
1526 {
1527         struct agp_bridge_data *bridge;
1528         char *name = "(unknown)";
1529         u8 cap_ptr = 0;
1530         struct resource *r;
1531
1532         cap_ptr = pci_find_capability(pdev, PCI_CAP_ID_AGP);
1533
1534         bridge = agp_alloc_bridge();
1535         if (!bridge)
1536                 return -ENOMEM;
1537
1538         switch (pdev->device) {
1539         case PCI_DEVICE_ID_INTEL_82443LX_0:
1540                 bridge->driver = &intel_generic_driver;
1541                 name = "440LX";
1542                 break;
1543         case PCI_DEVICE_ID_INTEL_82443BX_0:
1544                 bridge->driver = &intel_generic_driver;
1545                 name = "440BX";
1546                 break;
1547         case PCI_DEVICE_ID_INTEL_82443GX_0:
1548                 bridge->driver = &intel_generic_driver;
1549                 name = "440GX";
1550                 break;
1551         case PCI_DEVICE_ID_INTEL_82810_MC1:
1552                 name = "i810";
1553                 if (!find_i810(PCI_DEVICE_ID_INTEL_82810_IG1))
1554                         goto fail;
1555                 bridge->driver = &intel_810_driver;
1556                 break;
1557         case PCI_DEVICE_ID_INTEL_82810_MC3:
1558                 name = "i810 DC100";
1559                 if (!find_i810(PCI_DEVICE_ID_INTEL_82810_IG3))
1560                         goto fail;
1561                 bridge->driver = &intel_810_driver;
1562                 break;
1563         case PCI_DEVICE_ID_INTEL_82810E_MC:
1564                 name = "i810 E";
1565                 if (!find_i810(PCI_DEVICE_ID_INTEL_82810E_IG))
1566                         goto fail;
1567                 bridge->driver = &intel_810_driver;
1568                 break;
1569          case PCI_DEVICE_ID_INTEL_82815_MC:
1570                 /*
1571                  * The i815 can operate either as an i810 style
1572                  * integrated device, or as an AGP4X motherboard.
1573                  */
1574                 if (find_i810(PCI_DEVICE_ID_INTEL_82815_CGC))
1575                         bridge->driver = &intel_810_driver;
1576                 else
1577                         bridge->driver = &intel_815_driver;
1578                 name = "i815";
1579                 break;
1580         case PCI_DEVICE_ID_INTEL_82820_HB:
1581         case PCI_DEVICE_ID_INTEL_82820_UP_HB:
1582                 bridge->driver = &intel_820_driver;
1583                 name = "i820";
1584                 break;
1585         case PCI_DEVICE_ID_INTEL_82830_HB:
1586                 if (find_i830(PCI_DEVICE_ID_INTEL_82830_CGC)) {
1587                         bridge->driver = &intel_830_driver;
1588                 } else {
1589                         bridge->driver = &intel_830mp_driver;
1590                 }
1591                 name = "830M";
1592                 break;
1593         case PCI_DEVICE_ID_INTEL_82840_HB:
1594                 bridge->driver = &intel_840_driver;
1595                 name = "i840";
1596                 break;
1597         case PCI_DEVICE_ID_INTEL_82845_HB:
1598                 bridge->driver = &intel_845_driver;
1599                 name = "i845";
1600                 break;
1601         case PCI_DEVICE_ID_INTEL_82845G_HB:
1602                 if (find_i830(PCI_DEVICE_ID_INTEL_82845G_IG)) {
1603                         bridge->driver = &intel_830_driver;
1604                 } else {
1605                         bridge->driver = &intel_845_driver;
1606                 }
1607                 name = "845G";
1608                 break;
1609         case PCI_DEVICE_ID_INTEL_82850_HB:
1610                 bridge->driver = &intel_850_driver;
1611                 name = "i850";
1612                 break;
1613         case PCI_DEVICE_ID_INTEL_82855PM_HB:
1614                 bridge->driver = &intel_845_driver;
1615                 name = "855PM";
1616                 break;
1617         case PCI_DEVICE_ID_INTEL_82855GM_HB:
1618                 if (find_i830(PCI_DEVICE_ID_INTEL_82855GM_IG)) {
1619                         bridge->driver = &intel_830_driver;
1620                         name = "855";
1621                 } else {
1622                         bridge->driver = &intel_845_driver;
1623                         name = "855GM";
1624                 }
1625                 break;
1626         case PCI_DEVICE_ID_INTEL_82860_HB:
1627                 bridge->driver = &intel_860_driver;
1628                 name = "i860";
1629                 break;
1630         case PCI_DEVICE_ID_INTEL_82865_HB:
1631                 if (find_i830(PCI_DEVICE_ID_INTEL_82865_IG)) {
1632                         bridge->driver = &intel_830_driver;
1633                 } else {
1634                         bridge->driver = &intel_845_driver;
1635                 }
1636                 name = "865";
1637                 break;
1638         case PCI_DEVICE_ID_INTEL_82875_HB:
1639                 bridge->driver = &intel_845_driver;
1640                 name = "i875";
1641                 break;
1642         case PCI_DEVICE_ID_INTEL_82915G_HB:
1643                 if (find_i830(PCI_DEVICE_ID_INTEL_82915G_IG)) {
1644                         bridge->driver = &intel_915_driver;
1645                 } else {
1646                         bridge->driver = &intel_845_driver;
1647                 }
1648                 name = "915G";
1649                 break;
1650         case PCI_DEVICE_ID_INTEL_7505_0:
1651                 bridge->driver = &intel_7505_driver;
1652                 name = "E7505";
1653                 break;
1654         case PCI_DEVICE_ID_INTEL_7205_0:
1655                 bridge->driver = &intel_7505_driver;
1656                 name = "E7205";
1657                 break;
1658         default:
1659                 if (cap_ptr)
1660                         printk(KERN_WARNING PFX "Unsupported Intel chipset (device id: %04x)\n",
1661                             pdev->device);
1662                 agp_put_bridge(bridge);
1663                 return -ENODEV;
1664         };
1665
1666         bridge->dev = pdev;
1667         bridge->capndx = cap_ptr;
1668
1669         if (bridge->driver == &intel_810_driver)
1670                 bridge->dev_private_data = &intel_i810_private;
1671         else if (bridge->driver == &intel_830_driver)
1672                 bridge->dev_private_data = &intel_i830_private;
1673
1674         printk(KERN_INFO PFX "Detected an Intel %s Chipset.\n", name);
1675
1676         /*
1677         * The following fixes the case where the BIOS has "forgotten" to
1678         * provide an address range for the GART.
1679         * 20030610 - hamish@zot.org
1680         */
1681         r = &pdev->resource[0];
1682         if (!r->start && r->end) {
1683                 if(pci_assign_resource(pdev, 0)) {
1684                         printk(KERN_ERR PFX "could not assign resource 0\n");
1685                         agp_put_bridge(bridge);
1686                         return -ENODEV;
1687                 }
1688         }
1689
1690         /*
1691         * If the device has not been properly setup, the following will catch
1692         * the problem and should stop the system from crashing.
1693         * 20030610 - hamish@zot.org
1694         */
1695         if (pci_enable_device(pdev)) {
1696                 printk(KERN_ERR PFX "Unable to Enable PCI device\n");
1697                 agp_put_bridge(bridge);
1698                 return -ENODEV;
1699         }
1700
1701         /* Fill in the mode register */
1702         if (cap_ptr) {
1703                 pci_read_config_dword(pdev,
1704                                 bridge->capndx+PCI_AGP_STATUS,
1705                                 &bridge->mode);
1706         }
1707
1708         pci_set_drvdata(pdev, bridge);
1709         return agp_add_bridge(bridge);
1710
1711 fail:
1712         printk(KERN_ERR PFX "Detected an Intel %s chipset, "
1713                 "but could not find the secondary device.\n", name);
1714         agp_put_bridge(bridge);
1715         return -ENODEV;
1716 }
1717
1718 static void __devexit agp_intel_remove(struct pci_dev *pdev)
1719 {
1720         struct agp_bridge_data *bridge = pci_get_drvdata(pdev);
1721
1722         pci_dev_put(pdev);
1723         agp_remove_bridge(bridge);
1724         agp_put_bridge(bridge);
1725 }
1726
1727 static int agp_intel_resume(struct pci_dev *pdev)
1728 {
1729         struct agp_bridge_data *bridge = pci_get_drvdata(pdev);
1730
1731         pci_restore_state(pdev);
1732
1733         if (bridge->driver == &intel_generic_driver)
1734                 intel_configure();
1735         else if (bridge->driver == &intel_845_driver)
1736                 intel_845_configure();
1737         else if (bridge->driver == &intel_830mp_driver)
1738                 intel_830mp_configure();
1739         else if (bridge->driver == &intel_915_driver)
1740                 intel_i915_configure();
1741
1742         return 0;
1743 }
1744
1745 static struct pci_device_id agp_intel_pci_table[] = {
1746 #define ID(x)                                           \
1747         {                                               \
1748         .class          = (PCI_CLASS_BRIDGE_HOST << 8), \
1749         .class_mask     = ~0,                           \
1750         .vendor         = PCI_VENDOR_ID_INTEL,          \
1751         .device         = x,                            \
1752         .subvendor      = PCI_ANY_ID,                   \
1753         .subdevice      = PCI_ANY_ID,                   \
1754         }
1755         ID(PCI_DEVICE_ID_INTEL_82443LX_0),
1756         ID(PCI_DEVICE_ID_INTEL_82443BX_0),
1757         ID(PCI_DEVICE_ID_INTEL_82443GX_0),
1758         ID(PCI_DEVICE_ID_INTEL_82810_MC1),
1759         ID(PCI_DEVICE_ID_INTEL_82810_MC3),
1760         ID(PCI_DEVICE_ID_INTEL_82810E_MC),
1761         ID(PCI_DEVICE_ID_INTEL_82815_MC),
1762         ID(PCI_DEVICE_ID_INTEL_82820_HB),
1763         ID(PCI_DEVICE_ID_INTEL_82820_UP_HB),
1764         ID(PCI_DEVICE_ID_INTEL_82830_HB),
1765         ID(PCI_DEVICE_ID_INTEL_82840_HB),
1766         ID(PCI_DEVICE_ID_INTEL_82845_HB),
1767         ID(PCI_DEVICE_ID_INTEL_82845G_HB),
1768         ID(PCI_DEVICE_ID_INTEL_82850_HB),
1769         ID(PCI_DEVICE_ID_INTEL_82855PM_HB),
1770         ID(PCI_DEVICE_ID_INTEL_82855GM_HB),
1771         ID(PCI_DEVICE_ID_INTEL_82860_HB),
1772         ID(PCI_DEVICE_ID_INTEL_82865_HB),
1773         ID(PCI_DEVICE_ID_INTEL_82875_HB),
1774         ID(PCI_DEVICE_ID_INTEL_7505_0),
1775         ID(PCI_DEVICE_ID_INTEL_7205_0),
1776         ID(PCI_DEVICE_ID_INTEL_82915G_HB),
1777         { }
1778 };
1779
1780 MODULE_DEVICE_TABLE(pci, agp_intel_pci_table);
1781
1782 static struct pci_driver agp_intel_pci_driver = {
1783         .name           = "agpgart-intel",
1784         .id_table       = agp_intel_pci_table,
1785         .probe          = agp_intel_probe,
1786         .remove         = __devexit_p(agp_intel_remove),
1787         .resume         = agp_intel_resume,
1788 };
1789
1790 static int __init agp_intel_init(void)
1791 {
1792         return pci_module_init(&agp_intel_pci_driver);
1793 }
1794
1795 static void __exit agp_intel_cleanup(void)
1796 {
1797         pci_unregister_driver(&agp_intel_pci_driver);
1798 }
1799
1800 module_init(agp_intel_init);
1801 module_exit(agp_intel_cleanup);
1802
1803 MODULE_AUTHOR("Dave Jones <davej@codemonkey.org.uk>");
1804 MODULE_LICENSE("GPL and additional rights");