2 * SiS AGPGART routines.
5 #include <linux/module.h>
7 #include <linux/init.h>
8 #include <linux/agp_backend.h>
11 #define SIS_ATTBASE 0x90
12 #define SIS_APSIZE 0x94
13 #define SIS_TLBCNTRL 0x97
14 #define SIS_TLBFLUSH 0x98
16 static int __devinitdata agp_sis_force_delay = 0;
17 static int __devinitdata agp_sis_agp_spec = -1;
19 static int sis_fetch_size(void)
23 struct aper_size_info_8 *values;
25 pci_read_config_byte(agp_bridge->dev, SIS_APSIZE, &temp_size);
26 values = A_SIZE_8(agp_bridge->driver->aperture_sizes);
27 for (i = 0; i < agp_bridge->driver->num_aperture_sizes; i++) {
28 if ((temp_size == values[i].size_value) ||
29 ((temp_size & ~(0x03)) ==
30 (values[i].size_value & ~(0x03)))) {
31 agp_bridge->previous_size =
32 agp_bridge->current_size = (void *) (values + i);
34 agp_bridge->aperture_size_idx = i;
35 return values[i].size;
42 static void sis_tlbflush(struct agp_memory *mem)
44 pci_write_config_byte(agp_bridge->dev, SIS_TLBFLUSH, 0x02);
47 static int sis_configure(void)
50 struct aper_size_info_8 *current_size;
52 current_size = A_SIZE_8(agp_bridge->current_size);
53 pci_write_config_byte(agp_bridge->dev, SIS_TLBCNTRL, 0x05);
54 pci_read_config_dword(agp_bridge->dev, AGP_APBASE, &temp);
55 agp_bridge->gart_bus_addr = (temp & PCI_BASE_ADDRESS_MEM_MASK);
56 pci_write_config_dword(agp_bridge->dev, SIS_ATTBASE,
57 agp_bridge->gatt_bus_addr);
58 pci_write_config_byte(agp_bridge->dev, SIS_APSIZE,
59 current_size->size_value);
63 static void sis_cleanup(void)
65 struct aper_size_info_8 *previous_size;
67 previous_size = A_SIZE_8(agp_bridge->previous_size);
68 pci_write_config_byte(agp_bridge->dev, SIS_APSIZE,
69 (previous_size->size_value & ~(0x03)));
72 static void sis_delayed_enable(u32 mode)
74 struct pci_dev *device = NULL;
78 printk(KERN_INFO PFX "Found an AGP %d.%d compliant device at %s.\n",
79 agp_bridge->major_version,
80 agp_bridge->minor_version,
81 agp_bridge->dev->slot_name);
83 pci_read_config_dword(agp_bridge->dev, agp_bridge->capndx + PCI_AGP_STATUS, &command);
84 command = agp_collect_device_status(mode, command);
85 command |= AGPSTAT_AGP_ENABLE;
86 rate = (command & 0x7) << 2;
88 while ((device = pci_find_device(PCI_ANY_ID, PCI_ANY_ID, device)) != NULL) {
89 u8 agp = pci_find_capability(device, PCI_CAP_ID_AGP);
93 printk(KERN_INFO PFX "Putting AGP V3 device at %s into %dx mode\n",
94 pci_name(device), rate);
96 pci_write_config_dword(device, agp + PCI_AGP_COMMAND, command);
99 * Weird: on some sis chipsets any rate change in the target
100 * command register triggers a 5ms screwup during which the master
101 * cannot be configured
103 if (device->device == agp_bridge->dev->device) {
104 printk(KERN_INFO PFX "SiS delay workaround: giving bridge time to recover.\n");
105 set_current_state(TASK_UNINTERRUPTIBLE);
106 schedule_timeout (1+(HZ*10)/1000);
111 static struct aper_size_info_8 sis_generic_sizes[7] =
122 struct agp_bridge_driver sis_driver = {
123 .owner = THIS_MODULE,
124 .aperture_sizes = sis_generic_sizes,
125 .size_type = U8_APER_SIZE,
126 .num_aperture_sizes = 7,
127 .configure = sis_configure,
128 .fetch_size = sis_fetch_size,
129 .cleanup = sis_cleanup,
130 .tlb_flush = sis_tlbflush,
131 .mask_memory = agp_generic_mask_memory,
133 .agp_enable = agp_generic_enable,
134 .cache_flush = global_cache_flush,
135 .create_gatt_table = agp_generic_create_gatt_table,
136 .free_gatt_table = agp_generic_free_gatt_table,
137 .insert_memory = agp_generic_insert_memory,
138 .remove_memory = agp_generic_remove_memory,
139 .alloc_by_type = agp_generic_alloc_by_type,
140 .free_by_type = agp_generic_free_by_type,
141 .agp_alloc_page = agp_generic_alloc_page,
142 .agp_destroy_page = agp_generic_destroy_page,
145 static struct agp_device_ids sis_agp_device_ids[] __devinitdata =
148 .device_id = PCI_DEVICE_ID_SI_530,
149 .chipset_name = "530",
152 .device_id = PCI_DEVICE_ID_SI_540,
153 .chipset_name = "540",
156 .device_id = PCI_DEVICE_ID_SI_550,
157 .chipset_name = "550",
160 .device_id = PCI_DEVICE_ID_SI_620,
161 .chipset_name = "620",
164 .device_id = PCI_DEVICE_ID_SI_630,
165 .chipset_name = "630",
168 .device_id = PCI_DEVICE_ID_SI_645,
169 .chipset_name = "645",
172 .device_id = PCI_DEVICE_ID_SI_646,
173 .chipset_name = "646",
176 .device_id = PCI_DEVICE_ID_SI_648,
177 .chipset_name = "648",
180 .device_id = PCI_DEVICE_ID_SI_650,
181 .chipset_name = "650",
184 .device_id = PCI_DEVICE_ID_SI_651,
185 .chipset_name = "651",
188 .device_id = PCI_DEVICE_ID_SI_655,
189 .chipset_name = "655",
192 .device_id = PCI_DEVICE_ID_SI_661,
193 .chipset_name = "661",
196 .device_id = PCI_DEVICE_ID_SI_730,
197 .chipset_name = "730",
200 .device_id = PCI_DEVICE_ID_SI_735,
201 .chipset_name = "735",
204 .device_id = PCI_DEVICE_ID_SI_740,
205 .chipset_name = "740",
208 .device_id = PCI_DEVICE_ID_SI_741,
209 .chipset_name = "741",
212 .device_id = PCI_DEVICE_ID_SI_745,
213 .chipset_name = "745",
216 .device_id = PCI_DEVICE_ID_SI_746,
217 .chipset_name = "746",
220 .device_id = PCI_DEVICE_ID_SI_760,
221 .chipset_name = "760",
223 { }, /* dummy final entry, always present */
227 // chipsets that require the 'delay hack'
228 static int sis_broken_chipsets[] __devinitdata = {
229 PCI_DEVICE_ID_SI_648,
230 PCI_DEVICE_ID_SI_746,
234 static void __devinit sis_get_driver(struct agp_bridge_data *bridge)
238 for(i=0; sis_broken_chipsets[i]!=0; ++i)
239 if(bridge->dev->device==sis_broken_chipsets[i])
242 if(sis_broken_chipsets[i] || agp_sis_force_delay)
243 sis_driver.agp_enable=sis_delayed_enable;
245 // sis chipsets that indicate less than agp3.5
246 // are not actually fully agp3 compliant
247 if ((agp_bridge->major_version == 3 && agp_bridge->minor_version >= 5
248 && agp_sis_agp_spec!=0) || agp_sis_agp_spec==1) {
249 sis_driver.aperture_sizes = agp3_generic_sizes;
250 sis_driver.size_type = U16_APER_SIZE;
251 sis_driver.num_aperture_sizes = AGP_GENERIC_SIZES_ENTRIES;
252 sis_driver.configure = agp3_generic_configure;
253 sis_driver.fetch_size = agp3_generic_fetch_size;
254 sis_driver.cleanup = agp3_generic_cleanup;
255 sis_driver.tlb_flush = agp3_generic_tlbflush;
260 static int __devinit agp_sis_probe(struct pci_dev *pdev,
261 const struct pci_device_id *ent)
263 struct agp_device_ids *devs = sis_agp_device_ids;
264 struct agp_bridge_data *bridge;
268 cap_ptr = pci_find_capability(pdev, PCI_CAP_ID_AGP);
272 /* probe for known chipsets */
273 for (j = 0; devs[j].chipset_name; j++) {
274 if (pdev->device == devs[j].device_id) {
275 printk(KERN_INFO PFX "Detected SiS %s chipset\n",
276 devs[j].chipset_name);
281 printk(KERN_ERR PFX "Unsupported SiS chipset (device id: %04x)\n",
286 bridge = agp_alloc_bridge();
290 bridge->driver = &sis_driver;
292 bridge->capndx = cap_ptr;
294 get_agp_version(bridge);
296 /* Fill in the mode register */
297 pci_read_config_dword(pdev, bridge->capndx+PCI_AGP_STATUS, &bridge->mode);
298 sis_get_driver(bridge);
300 pci_set_drvdata(pdev, bridge);
301 return agp_add_bridge(bridge);
304 static void __devexit agp_sis_remove(struct pci_dev *pdev)
306 struct agp_bridge_data *bridge = pci_get_drvdata(pdev);
308 agp_remove_bridge(bridge);
309 agp_put_bridge(bridge);
312 static struct pci_device_id agp_sis_pci_table[] = {
314 .class = (PCI_CLASS_BRIDGE_HOST << 8),
316 .vendor = PCI_VENDOR_ID_SI,
317 .device = PCI_ANY_ID,
318 .subvendor = PCI_ANY_ID,
319 .subdevice = PCI_ANY_ID,
324 MODULE_DEVICE_TABLE(pci, agp_sis_pci_table);
326 static struct pci_driver agp_sis_pci_driver = {
327 .name = "agpgart-sis",
328 .id_table = agp_sis_pci_table,
329 .probe = agp_sis_probe,
330 .remove = agp_sis_remove,
333 static int __init agp_sis_init(void)
335 return pci_module_init(&agp_sis_pci_driver);
338 static void __exit agp_sis_cleanup(void)
340 pci_unregister_driver(&agp_sis_pci_driver);
343 module_init(agp_sis_init);
344 module_exit(agp_sis_cleanup);
346 MODULE_PARM(agp_sis_force_delay,"i");
347 MODULE_PARM_DESC(agp_sis_force_delay,"forces sis delay hack");
348 MODULE_PARM(agp_sis_agp_spec,"i");
349 MODULE_PARM_DESC(agp_sis_agp_spec,"0=force sis init, 1=force generic agp3 init, default: autodetect");
350 MODULE_LICENSE("GPL and additional rights");