2 * SiS AGPGART routines.
5 #include <linux/module.h>
7 #include <linux/init.h>
8 #include <linux/agp_backend.h>
11 #define SIS_ATTBASE 0x90
12 #define SIS_APSIZE 0x94
13 #define SIS_TLBCNTRL 0x97
14 #define SIS_TLBFLUSH 0x98
17 static int sis_fetch_size(void)
21 struct aper_size_info_8 *values;
23 pci_read_config_byte(agp_bridge->dev, SIS_APSIZE, &temp_size);
24 values = A_SIZE_8(agp_bridge->driver->aperture_sizes);
25 for (i = 0; i < agp_bridge->driver->num_aperture_sizes; i++) {
26 if ((temp_size == values[i].size_value) ||
27 ((temp_size & ~(0x03)) ==
28 (values[i].size_value & ~(0x03)))) {
29 agp_bridge->previous_size =
30 agp_bridge->current_size = (void *) (values + i);
32 agp_bridge->aperture_size_idx = i;
33 return values[i].size;
40 static void sis_tlbflush(struct agp_memory *mem)
42 pci_write_config_byte(agp_bridge->dev, SIS_TLBFLUSH, 0x02);
45 static int sis_configure(void)
48 struct aper_size_info_8 *current_size;
50 current_size = A_SIZE_8(agp_bridge->current_size);
51 pci_write_config_byte(agp_bridge->dev, SIS_TLBCNTRL, 0x05);
52 pci_read_config_dword(agp_bridge->dev, AGP_APBASE, &temp);
53 agp_bridge->gart_bus_addr = (temp & PCI_BASE_ADDRESS_MEM_MASK);
54 pci_write_config_dword(agp_bridge->dev, SIS_ATTBASE,
55 agp_bridge->gatt_bus_addr);
56 pci_write_config_byte(agp_bridge->dev, SIS_APSIZE,
57 current_size->size_value);
61 static void sis_cleanup(void)
63 struct aper_size_info_8 *previous_size;
65 previous_size = A_SIZE_8(agp_bridge->previous_size);
66 pci_write_config_byte(agp_bridge->dev, SIS_APSIZE,
67 (previous_size->size_value & ~(0x03)));
70 static void sis_648_enable(u32 mode)
72 struct pci_dev *device = NULL;
76 printk(KERN_INFO PFX "Found an AGP %d.%d compliant device at %s.\n",
77 agp_bridge->major_version,
78 agp_bridge->minor_version,
79 agp_bridge->dev->slot_name);
81 pci_read_config_dword(agp_bridge->dev, agp_bridge->capndx + PCI_AGP_STATUS, &command);
82 command = agp_collect_device_status(mode, command);
83 command |= AGPSTAT_AGP_ENABLE;
84 rate = (command & 0x7) << 2;
86 while ((device = pci_find_device(PCI_ANY_ID, PCI_ANY_ID, device)) != NULL) {
87 u8 agp = pci_find_capability(device, PCI_CAP_ID_AGP);
91 printk(KERN_INFO PFX "Putting AGP V3 device at %s into %dx mode\n",
92 pci_name(device), rate);
94 pci_write_config_dword(device, agp + PCI_AGP_COMMAND, command);
97 * Weird: on 648(fx) and 746(fx) chipsets any rate change in the target
98 * command register triggers a 5ms screwup during which the master
99 * cannot be configured
101 if (device->device == PCI_DEVICE_ID_SI_648 ||
102 device->device == PCI_DEVICE_ID_SI_746) {
103 printk(KERN_INFO PFX "SiS chipset with AGP problems detected. Giving bridge time to recover.\n");
104 set_current_state(TASK_UNINTERRUPTIBLE);
105 schedule_timeout (1+(HZ*10)/1000);
110 static struct aper_size_info_8 sis_generic_sizes[7] =
121 struct agp_bridge_driver sis_driver = {
122 .owner = THIS_MODULE,
123 .aperture_sizes = sis_generic_sizes,
124 .size_type = U8_APER_SIZE,
125 .num_aperture_sizes = 7,
126 .configure = sis_configure,
127 .fetch_size = sis_fetch_size,
128 .cleanup = sis_cleanup,
129 .tlb_flush = sis_tlbflush,
130 .mask_memory = agp_generic_mask_memory,
132 .agp_enable = agp_generic_enable,
133 .cache_flush = global_cache_flush,
134 .create_gatt_table = agp_generic_create_gatt_table,
135 .free_gatt_table = agp_generic_free_gatt_table,
136 .insert_memory = agp_generic_insert_memory,
137 .remove_memory = agp_generic_remove_memory,
138 .alloc_by_type = agp_generic_alloc_by_type,
139 .free_by_type = agp_generic_free_by_type,
140 .agp_alloc_page = agp_generic_alloc_page,
141 .agp_destroy_page = agp_generic_destroy_page,
144 static struct agp_device_ids sis_agp_device_ids[] __devinitdata =
147 .device_id = PCI_DEVICE_ID_SI_530,
148 .chipset_name = "530",
151 .device_id = PCI_DEVICE_ID_SI_540,
152 .chipset_name = "540",
155 .device_id = PCI_DEVICE_ID_SI_550,
156 .chipset_name = "550",
159 .device_id = PCI_DEVICE_ID_SI_620,
160 .chipset_name = "620",
163 .device_id = PCI_DEVICE_ID_SI_630,
164 .chipset_name = "630",
167 .device_id = PCI_DEVICE_ID_SI_645,
168 .chipset_name = "645",
171 .device_id = PCI_DEVICE_ID_SI_646,
172 .chipset_name = "646",
175 .device_id = PCI_DEVICE_ID_SI_648,
176 .chipset_name = "648",
179 .device_id = PCI_DEVICE_ID_SI_650,
180 .chipset_name = "650",
183 .device_id = PCI_DEVICE_ID_SI_651,
184 .chipset_name = "651",
187 .device_id = PCI_DEVICE_ID_SI_655,
188 .chipset_name = "655",
191 .device_id = PCI_DEVICE_ID_SI_661,
192 .chipset_name = "661",
195 .device_id = PCI_DEVICE_ID_SI_730,
196 .chipset_name = "730",
199 .device_id = PCI_DEVICE_ID_SI_735,
200 .chipset_name = "735",
203 .device_id = PCI_DEVICE_ID_SI_740,
204 .chipset_name = "740",
207 .device_id = PCI_DEVICE_ID_SI_741,
208 .chipset_name = "741",
211 .device_id = PCI_DEVICE_ID_SI_745,
212 .chipset_name = "745",
215 .device_id = PCI_DEVICE_ID_SI_746,
216 .chipset_name = "746",
219 .device_id = PCI_DEVICE_ID_SI_760,
220 .chipset_name = "760",
222 { }, /* dummy final entry, always present */
226 static void __devinit sis_get_driver(struct agp_bridge_data *bridge)
228 if (bridge->dev->device == PCI_DEVICE_ID_SI_648) {
229 sis_driver.agp_enable=sis_648_enable;
230 if (agp_bridge->major_version == 3) {
231 sis_driver.aperture_sizes = agp3_generic_sizes;
232 sis_driver.size_type = U16_APER_SIZE;
233 sis_driver.num_aperture_sizes = AGP_GENERIC_SIZES_ENTRIES;
234 sis_driver.configure = agp3_generic_configure;
235 sis_driver.fetch_size = agp3_generic_fetch_size;
236 sis_driver.cleanup = agp3_generic_cleanup;
237 sis_driver.tlb_flush = agp3_generic_tlbflush;
241 if (bridge->dev->device == PCI_DEVICE_ID_SI_746) {
243 * We don't know enough about the 746 to enable it properly.
244 * Though we do know that it needs the 'delay' hack to settle
245 * after changing modes.
247 sis_driver.agp_enable=sis_648_enable;
252 static int __devinit agp_sis_probe(struct pci_dev *pdev,
253 const struct pci_device_id *ent)
255 struct agp_device_ids *devs = sis_agp_device_ids;
256 struct agp_bridge_data *bridge;
260 cap_ptr = pci_find_capability(pdev, PCI_CAP_ID_AGP);
264 /* probe for known chipsets */
265 for (j = 0; devs[j].chipset_name; j++) {
266 if (pdev->device == devs[j].device_id) {
267 printk(KERN_INFO PFX "Detected SiS %s chipset\n",
268 devs[j].chipset_name);
273 printk(KERN_ERR PFX "Unsupported SiS chipset (device id: %04x)\n",
278 bridge = agp_alloc_bridge();
282 bridge->driver = &sis_driver;
284 bridge->capndx = cap_ptr;
286 get_agp_version(bridge);
288 /* Fill in the mode register */
289 pci_read_config_dword(pdev, bridge->capndx+PCI_AGP_STATUS, &bridge->mode);
290 sis_get_driver(bridge);
292 pci_set_drvdata(pdev, bridge);
293 return agp_add_bridge(bridge);
296 static void __devexit agp_sis_remove(struct pci_dev *pdev)
298 struct agp_bridge_data *bridge = pci_get_drvdata(pdev);
300 agp_remove_bridge(bridge);
301 agp_put_bridge(bridge);
304 static struct pci_device_id agp_sis_pci_table[] = {
306 .class = (PCI_CLASS_BRIDGE_HOST << 8),
308 .vendor = PCI_VENDOR_ID_SI,
309 .device = PCI_ANY_ID,
310 .subvendor = PCI_ANY_ID,
311 .subdevice = PCI_ANY_ID,
316 MODULE_DEVICE_TABLE(pci, agp_sis_pci_table);
318 static struct pci_driver agp_sis_pci_driver = {
319 .name = "agpgart-sis",
320 .id_table = agp_sis_pci_table,
321 .probe = agp_sis_probe,
322 .remove = agp_sis_remove,
325 static int __init agp_sis_init(void)
327 return pci_module_init(&agp_sis_pci_driver);
330 static void __exit agp_sis_cleanup(void)
332 pci_unregister_driver(&agp_sis_pci_driver);
335 module_init(agp_sis_init);
336 module_exit(agp_sis_cleanup);
338 MODULE_LICENSE("GPL and additional rights");