2 * VIA AGPGART routines.
5 #include <linux/types.h>
6 #include <linux/module.h>
8 #include <linux/init.h>
9 #include <linux/agp_backend.h>
12 static struct pci_device_id agp_via_pci_table[];
14 #define VIA_GARTCTRL 0x80
15 #define VIA_APSIZE 0x84
16 #define VIA_ATTBASE 0x88
18 #define VIA_AGP3_GARTCTRL 0x90
19 #define VIA_AGP3_APSIZE 0x94
20 #define VIA_AGP3_ATTBASE 0x98
21 #define VIA_AGPSEL 0xfd
23 static int via_fetch_size(void)
27 struct aper_size_info_8 *values;
29 values = A_SIZE_8(agp_bridge->driver->aperture_sizes);
30 pci_read_config_byte(agp_bridge->dev, VIA_APSIZE, &temp);
31 for (i = 0; i < agp_bridge->driver->num_aperture_sizes; i++) {
32 if (temp == values[i].size_value) {
33 agp_bridge->previous_size =
34 agp_bridge->current_size = (void *) (values + i);
35 agp_bridge->aperture_size_idx = i;
36 return values[i].size;
43 static int via_configure(void)
46 struct aper_size_info_8 *current_size;
48 current_size = A_SIZE_8(agp_bridge->current_size);
50 pci_write_config_byte(agp_bridge->dev, VIA_APSIZE,
51 current_size->size_value);
52 /* address to map too */
53 pci_read_config_dword(agp_bridge->dev, AGP_APBASE, &temp);
54 agp_bridge->gart_bus_addr = (temp & PCI_BASE_ADDRESS_MEM_MASK);
56 /* GART control register */
57 pci_write_config_dword(agp_bridge->dev, VIA_GARTCTRL, 0x0000000f);
59 /* attbase - aperture GATT base */
60 pci_write_config_dword(agp_bridge->dev, VIA_ATTBASE,
61 (agp_bridge->gatt_bus_addr & 0xfffff000) | 3);
66 static void via_cleanup(void)
68 struct aper_size_info_8 *previous_size;
70 previous_size = A_SIZE_8(agp_bridge->previous_size);
71 pci_write_config_byte(agp_bridge->dev, VIA_APSIZE,
72 previous_size->size_value);
73 /* Do not disable by writing 0 to VIA_ATTBASE, it screws things up
74 * during reinitialization.
79 static void via_tlbflush(struct agp_memory *mem)
81 pci_write_config_dword(agp_bridge->dev, VIA_GARTCTRL, 0x0000008f);
82 pci_write_config_dword(agp_bridge->dev, VIA_GARTCTRL, 0x0000000f);
86 static struct aper_size_info_8 via_generic_sizes[7] =
98 static int via_fetch_size_agp3(void)
102 struct aper_size_info_16 *values;
104 values = A_SIZE_16(agp_bridge->driver->aperture_sizes);
105 pci_read_config_word(agp_bridge->dev, VIA_AGP3_APSIZE, &temp);
108 for (i = 0; i < agp_bridge->driver->num_aperture_sizes; i++) {
109 if (temp == values[i].size_value) {
110 agp_bridge->previous_size =
111 agp_bridge->current_size = (void *) (values + i);
112 agp_bridge->aperture_size_idx = i;
113 return values[i].size;
120 static int via_configure_agp3(void)
123 struct aper_size_info_16 *current_size;
125 current_size = A_SIZE_16(agp_bridge->current_size);
127 /* address to map too */
128 pci_read_config_dword(agp_bridge->dev, AGP_APBASE, &temp);
129 agp_bridge->gart_bus_addr = (temp & PCI_BASE_ADDRESS_MEM_MASK);
131 /* attbase - aperture GATT base */
132 pci_write_config_dword(agp_bridge->dev, VIA_AGP3_ATTBASE,
133 agp_bridge->gatt_bus_addr & 0xfffff000);
135 /* 1. Enable GTLB in RX90<7>, all AGP aperture access needs to fetch
136 * translation table first.
137 * 2. Enable AGP aperture in RX91<0>. This bit controls the enabling of the
138 * graphics AGP aperture for the AGP3.0 port.
140 pci_read_config_dword(agp_bridge->dev, VIA_AGP3_GARTCTRL, &temp);
141 pci_write_config_dword(agp_bridge->dev, VIA_AGP3_GARTCTRL, temp | (3<<7));
146 static void via_cleanup_agp3(void)
148 struct aper_size_info_16 *previous_size;
150 previous_size = A_SIZE_16(agp_bridge->previous_size);
151 pci_write_config_byte(agp_bridge->dev, VIA_APSIZE, previous_size->size_value);
155 static void via_tlbflush_agp3(struct agp_memory *mem)
159 pci_read_config_dword(agp_bridge->dev, VIA_AGP3_GARTCTRL, &temp);
160 pci_write_config_dword(agp_bridge->dev, VIA_AGP3_GARTCTRL, temp & ~(1<<7));
161 pci_write_config_dword(agp_bridge->dev, VIA_AGP3_GARTCTRL, temp);
165 struct agp_bridge_driver via_agp3_driver = {
166 .owner = THIS_MODULE,
167 .aperture_sizes = agp3_generic_sizes,
168 .size_type = U8_APER_SIZE,
169 .num_aperture_sizes = 10,
170 .configure = via_configure_agp3,
171 .fetch_size = via_fetch_size_agp3,
172 .cleanup = via_cleanup_agp3,
173 .tlb_flush = via_tlbflush_agp3,
174 .mask_memory = agp_generic_mask_memory,
176 .agp_enable = agp_generic_enable,
177 .cache_flush = global_cache_flush,
178 .create_gatt_table = agp_generic_create_gatt_table,
179 .free_gatt_table = agp_generic_free_gatt_table,
180 .insert_memory = agp_generic_insert_memory,
181 .remove_memory = agp_generic_remove_memory,
182 .alloc_by_type = agp_generic_alloc_by_type,
183 .free_by_type = agp_generic_free_by_type,
184 .agp_alloc_page = agp_generic_alloc_page,
185 .agp_destroy_page = agp_generic_destroy_page,
188 struct agp_bridge_driver via_driver = {
189 .owner = THIS_MODULE,
190 .aperture_sizes = via_generic_sizes,
191 .size_type = U8_APER_SIZE,
192 .num_aperture_sizes = 7,
193 .configure = via_configure,
194 .fetch_size = via_fetch_size,
195 .cleanup = via_cleanup,
196 .tlb_flush = via_tlbflush,
197 .mask_memory = agp_generic_mask_memory,
199 .agp_enable = agp_generic_enable,
200 .cache_flush = global_cache_flush,
201 .create_gatt_table = agp_generic_create_gatt_table,
202 .free_gatt_table = agp_generic_free_gatt_table,
203 .insert_memory = agp_generic_insert_memory,
204 .remove_memory = agp_generic_remove_memory,
205 .alloc_by_type = agp_generic_alloc_by_type,
206 .free_by_type = agp_generic_free_by_type,
207 .agp_alloc_page = agp_generic_alloc_page,
208 .agp_destroy_page = agp_generic_destroy_page,
211 static struct agp_device_ids via_agp_device_ids[] __devinitdata =
214 .device_id = PCI_DEVICE_ID_VIA_82C597_0,
215 .chipset_name = "Apollo VP3",
219 .device_id = PCI_DEVICE_ID_VIA_82C598_0,
220 .chipset_name = "Apollo MVP3",
224 .device_id = PCI_DEVICE_ID_VIA_8501_0,
225 .chipset_name = "Apollo MVP4",
230 .device_id = PCI_DEVICE_ID_VIA_8601_0,
231 .chipset_name = "Apollo ProMedia/PLE133Ta",
234 /* VT82C693A / VT28C694T */
236 .device_id = PCI_DEVICE_ID_VIA_82C691_0,
237 .chipset_name = "Apollo Pro 133",
241 .device_id = PCI_DEVICE_ID_VIA_8371_0,
242 .chipset_name = "KX133",
247 .device_id = PCI_DEVICE_ID_VIA_8633_0,
248 .chipset_name = "Pro 266",
252 .device_id = PCI_DEVICE_ID_VIA_XN266,
253 .chipset_name = "Apollo Pro266",
258 .device_id = PCI_DEVICE_ID_VIA_8361,
259 .chipset_name = "KLE133",
262 /* VT8365 / VT8362 */
264 .device_id = PCI_DEVICE_ID_VIA_8363_0,
265 .chipset_name = "Twister-K/KT133x/KM133",
270 .device_id = PCI_DEVICE_ID_VIA_8753_0,
271 .chipset_name = "P4X266",
276 .device_id = PCI_DEVICE_ID_VIA_8367_0,
277 .chipset_name = "KT266/KY266x/KT333",
280 /* VT8633 (for CuMine/ Celeron) */
282 .device_id = PCI_DEVICE_ID_VIA_8653_0,
283 .chipset_name = "Pro266T",
288 .device_id = PCI_DEVICE_ID_VIA_XM266,
289 .chipset_name = "PM266/KM266",
294 .device_id = PCI_DEVICE_ID_VIA_862X_0,
295 .chipset_name = "CLE266",
299 .device_id = PCI_DEVICE_ID_VIA_8377_0,
300 .chipset_name = "KT400/KT400A/KT600",
303 /* VT8604 / VT8605 / VT8603
304 * (Apollo Pro133A chipset with S3 Savage4) */
306 .device_id = PCI_DEVICE_ID_VIA_8605_0,
307 .chipset_name = "ProSavage PM133/PL133/PN133"
312 .device_id = PCI_DEVICE_ID_VIA_8703_51_0,
313 .chipset_name = "P4M266x/P4N266",
318 .device_id = PCI_DEVICE_ID_VIA_8754C_0,
319 .chipset_name = "PT800",
324 .device_id = PCI_DEVICE_ID_VIA_8763_0,
325 .chipset_name = "P4X600"
330 .device_id = PCI_DEVICE_ID_VIA_8378_0,
331 .chipset_name = "KM400/KM400A",
336 .device_id = PCI_DEVICE_ID_VIA_PT880,
337 .chipset_name = "PT880",
342 .device_id = PCI_DEVICE_ID_VIA_8783_0,
343 .chipset_name = "PT890",
346 /* PM800/PN800/PM880/PN880 */
348 .device_id = PCI_DEVICE_ID_VIA_PX8X0_0,
349 .chipset_name = "PM800/PN800/PM880/PN880",
353 .device_id = PCI_DEVICE_ID_VIA_3269_0,
354 .chipset_name = "KT880",
358 .device_id = PCI_DEVICE_ID_VIA_83_87XX_1,
359 .chipset_name = "VT83xx/VT87xx/KTxxx/Px8xx",
363 .device_id = PCI_DEVICE_ID_VIA_3296_0,
364 .chipset_name = "P4M800",
367 { }, /* dummy final entry, always present */
372 * VIA's AGP3 chipsets do magick to put the AGP bridge compliant
373 * with the same standards version as the graphics card.
375 static void check_via_agp3 (struct agp_bridge_data *bridge)
379 pci_read_config_byte(bridge->dev, VIA_AGPSEL, ®);
380 /* Check AGP 2.0 compatibility mode. */
381 if ((reg & (1<<1))==0)
382 bridge->driver = &via_agp3_driver;
386 static int __devinit agp_via_probe(struct pci_dev *pdev,
387 const struct pci_device_id *ent)
389 struct agp_device_ids *devs = via_agp_device_ids;
390 struct agp_bridge_data *bridge;
394 cap_ptr = pci_find_capability(pdev, PCI_CAP_ID_AGP);
398 j = ent - agp_via_pci_table;
399 printk (KERN_INFO PFX "Detected VIA %s chipset\n", devs[j].chipset_name);
401 bridge = agp_alloc_bridge();
406 bridge->capndx = cap_ptr;
407 bridge->driver = &via_driver;
410 * Garg, there are KT400s with KT266 IDs.
412 if (pdev->device == PCI_DEVICE_ID_VIA_8367_0) {
413 /* Is there a KT400 subsystem ? */
414 if (pdev->subsystem_device == PCI_DEVICE_ID_VIA_8377_0) {
415 printk(KERN_INFO PFX "Found KT400 in disguise as a KT266.\n");
416 check_via_agp3(bridge);
420 /* If this is an AGP3 bridge, check which mode its in and adjust. */
421 get_agp_version(bridge);
422 if (bridge->major_version >= 3)
423 check_via_agp3(bridge);
425 /* Fill in the mode register */
426 pci_read_config_dword(pdev,
427 bridge->capndx+PCI_AGP_STATUS, &bridge->mode);
429 pci_set_drvdata(pdev, bridge);
430 return agp_add_bridge(bridge);
433 static void __devexit agp_via_remove(struct pci_dev *pdev)
435 struct agp_bridge_data *bridge = pci_get_drvdata(pdev);
437 agp_remove_bridge(bridge);
438 agp_put_bridge(bridge);
443 static int agp_via_suspend(struct pci_dev *pdev, u32 state)
445 pci_save_state (pdev);
446 pci_set_power_state (pdev, 3);
451 static int agp_via_resume(struct pci_dev *pdev)
453 struct agp_bridge_data *bridge = pci_get_drvdata(pdev);
455 pci_set_power_state (pdev, 0);
456 pci_restore_state(pdev);
458 if (bridge->driver == &via_agp3_driver)
459 return via_configure_agp3();
460 else if (bridge->driver == &via_driver)
461 return via_configure();
466 #endif /* CONFIG_PM */
468 /* must be the same order as name table above */
469 static struct pci_device_id agp_via_pci_table[] = {
472 .class = (PCI_CLASS_BRIDGE_HOST << 8), \
474 .vendor = PCI_VENDOR_ID_VIA, \
476 .subvendor = PCI_ANY_ID, \
477 .subdevice = PCI_ANY_ID, \
479 ID(PCI_DEVICE_ID_VIA_82C597_0),
480 ID(PCI_DEVICE_ID_VIA_82C598_0),
481 ID(PCI_DEVICE_ID_VIA_8501_0),
482 ID(PCI_DEVICE_ID_VIA_8601_0),
483 ID(PCI_DEVICE_ID_VIA_82C691_0),
484 ID(PCI_DEVICE_ID_VIA_8371_0),
485 ID(PCI_DEVICE_ID_VIA_8633_0),
486 ID(PCI_DEVICE_ID_VIA_XN266),
487 ID(PCI_DEVICE_ID_VIA_8361),
488 ID(PCI_DEVICE_ID_VIA_8363_0),
489 ID(PCI_DEVICE_ID_VIA_8753_0),
490 ID(PCI_DEVICE_ID_VIA_8367_0),
491 ID(PCI_DEVICE_ID_VIA_8653_0),
492 ID(PCI_DEVICE_ID_VIA_XM266),
493 ID(PCI_DEVICE_ID_VIA_862X_0),
494 ID(PCI_DEVICE_ID_VIA_8377_0),
495 ID(PCI_DEVICE_ID_VIA_8605_0),
496 ID(PCI_DEVICE_ID_VIA_8703_51_0),
497 ID(PCI_DEVICE_ID_VIA_8754C_0),
498 ID(PCI_DEVICE_ID_VIA_8763_0),
499 ID(PCI_DEVICE_ID_VIA_8378_0),
500 ID(PCI_DEVICE_ID_VIA_PT880),
501 ID(PCI_DEVICE_ID_VIA_8783_0),
502 ID(PCI_DEVICE_ID_VIA_PX8X0_0),
503 ID(PCI_DEVICE_ID_VIA_3269_0),
504 ID(PCI_DEVICE_ID_VIA_83_87XX_1),
505 ID(PCI_DEVICE_ID_VIA_3296_0),
509 MODULE_DEVICE_TABLE(pci, agp_via_pci_table);
512 static struct pci_driver agp_via_pci_driver = {
513 .name = "agpgart-via",
514 .id_table = agp_via_pci_table,
515 .probe = agp_via_probe,
516 .remove = agp_via_remove,
518 .suspend = agp_via_suspend,
519 .resume = agp_via_resume,
524 static int __init agp_via_init(void)
528 return pci_module_init(&agp_via_pci_driver);
531 static void __exit agp_via_cleanup(void)
533 pci_unregister_driver(&agp_via_pci_driver);
536 module_init(agp_via_init);
537 module_exit(agp_via_cleanup);
539 MODULE_LICENSE("GPL");
540 MODULE_AUTHOR("Dave Jones <davej@codemonkey.org.uk>");