2 * sma cpu5 watchdog driver
4 * Copyright (C) 2003 Heiko Ronsdorf <hero@ihg.uni-duisburg.de>
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
22 #include <linux/module.h>
23 #include <linux/moduleparam.h>
24 #include <linux/types.h>
25 #include <linux/errno.h>
26 #include <linux/miscdevice.h>
28 #include <linux/init.h>
29 #include <linux/ioport.h>
30 #include <linux/timer.h>
32 #include <asm/uaccess.h>
34 #include <linux/watchdog.h>
36 /* adjustable parameters */
38 static int verbose = 0;
39 static int port = 0x91;
40 static int ticks = 10000;
42 #define PFX "cpu5wdt: "
44 #define CPU5WDT_EXTENT 0x0A
46 #define CPU5WDT_STATUS_REG 0x00
47 #define CPU5WDT_TIME_A_REG 0x02
48 #define CPU5WDT_TIME_B_REG 0x03
49 #define CPU5WDT_MODE_REG 0x04
50 #define CPU5WDT_TRIGGER_REG 0x07
51 #define CPU5WDT_ENABLE_REG 0x08
52 #define CPU5WDT_RESET_REG 0x09
54 #define CPU5WDT_INTERVAL (HZ/10+1)
56 /* some device data */
59 struct semaphore stop;
61 struct timer_list timer;
67 /* generic helper functions */
69 static void cpu5wdt_trigger(unsigned long unused)
72 printk(KERN_DEBUG PFX "trigger at %i ticks\n", ticks);
74 if( cpu5wdt_device.running )
77 /* keep watchdog alive */
78 outb(1, port + CPU5WDT_TRIGGER_REG);
81 if( cpu5wdt_device.queue && ticks ) {
82 cpu5wdt_device.timer.expires = jiffies + CPU5WDT_INTERVAL;
83 add_timer(&cpu5wdt_device.timer);
86 /* ticks doesn't matter anyway */
87 up(&cpu5wdt_device.stop);
92 static void cpu5wdt_reset(void)
94 ticks = cpu5wdt_device.default_ticks;
97 printk(KERN_DEBUG PFX "reset (%i ticks)\n", (int) ticks);
101 static void cpu5wdt_start(void)
103 if ( !cpu5wdt_device.queue ) {
104 cpu5wdt_device.queue = 1;
105 outb(0, port + CPU5WDT_TIME_A_REG);
106 outb(0, port + CPU5WDT_TIME_B_REG);
107 outb(1, port + CPU5WDT_MODE_REG);
108 outb(0, port + CPU5WDT_RESET_REG);
109 outb(0, port + CPU5WDT_ENABLE_REG);
110 cpu5wdt_device.timer.expires = jiffies + CPU5WDT_INTERVAL;
111 add_timer(&cpu5wdt_device.timer);
113 /* if process dies, counter is not decremented */
114 cpu5wdt_device.running++;
117 static int cpu5wdt_stop(void)
119 if ( cpu5wdt_device.running )
120 cpu5wdt_device.running = 0;
122 ticks = cpu5wdt_device.default_ticks;
125 printk(KERN_CRIT PFX "stop not possible\n");
130 /* filesystem operations */
132 static int cpu5wdt_open(struct inode *inode, struct file *file)
134 if ( test_and_set_bit(0, &cpu5wdt_device.inuse) )
140 static int cpu5wdt_release(struct inode *inode, struct file *file)
142 clear_bit(0, &cpu5wdt_device.inuse);
146 static int cpu5wdt_ioctl(struct inode *inode, struct file *file, unsigned int cmd, unsigned long arg)
149 static struct watchdog_info ident =
151 .options = WDIOF_CARDRESET,
152 .identity = "CPU5 WDT",
156 case WDIOC_KEEPALIVE:
159 case WDIOC_GETSTATUS:
160 value = inb(port + CPU5WDT_STATUS_REG);
161 value = (value >> 2) & 1;
162 if ( copy_to_user((int *)arg, (int *)&value, sizeof(int)) )
165 case WDIOC_GETSUPPORT:
166 if ( copy_to_user((struct watchdog_info *)arg, &ident, sizeof(ident)) )
169 case WDIOC_SETOPTIONS:
170 if ( copy_from_user(&value, (int *)arg, sizeof(int)) )
173 case WDIOS_ENABLECARD:
176 case WDIOS_DISABLECARD:
177 return cpu5wdt_stop();
188 static ssize_t cpu5wdt_write(struct file *file, const char *buf, size_t count, loff_t *ppos)
198 static struct file_operations cpu5wdt_fops = {
199 .owner = THIS_MODULE,
200 .ioctl = cpu5wdt_ioctl,
201 .open = cpu5wdt_open,
202 .write = cpu5wdt_write,
203 .release = cpu5wdt_release,
206 static struct miscdevice cpu5wdt_misc = {
207 .minor = WATCHDOG_MINOR,
209 .fops = &cpu5wdt_fops,
212 /* init/exit function */
214 static int __devinit cpu5wdt_init(void)
220 printk(KERN_DEBUG PFX "port=0x%x, verbose=%i\n", port, verbose);
222 if ( (err = misc_register(&cpu5wdt_misc)) < 0 ) {
223 printk(KERN_ERR PFX "misc_register failed\n");
227 if ( !request_region(port, CPU5WDT_EXTENT, PFX) ) {
228 printk(KERN_ERR PFX "request_region failed\n");
233 /* watchdog reboot? */
234 val = inb(port + CPU5WDT_STATUS_REG);
235 val = (val >> 2) & 1;
237 printk(KERN_INFO PFX "sorry, was my fault\n");
239 init_MUTEX_LOCKED(&cpu5wdt_device.stop);
240 cpu5wdt_device.queue = 0;
242 clear_bit(0, &cpu5wdt_device.inuse);
244 init_timer(&cpu5wdt_device.timer);
245 cpu5wdt_device.timer.function = cpu5wdt_trigger;
246 cpu5wdt_device.timer.data = 0;
248 cpu5wdt_device.default_ticks = ticks;
250 printk(KERN_INFO PFX "init success\n");
255 misc_deregister(&cpu5wdt_misc);
260 static int __devinit cpu5wdt_init_module(void)
262 return cpu5wdt_init();
265 static void __devexit cpu5wdt_exit(void)
267 if ( cpu5wdt_device.queue ) {
268 cpu5wdt_device.queue = 0;
269 down(&cpu5wdt_device.stop);
272 misc_deregister(&cpu5wdt_misc);
274 release_region(port, CPU5WDT_EXTENT);
278 static void __devexit cpu5wdt_exit_module(void)
283 /* module entry points */
285 module_init(cpu5wdt_init_module);
286 module_exit(cpu5wdt_exit_module);
288 MODULE_AUTHOR("Heiko Ronsdorf <hero@ihg.uni-duisburg.de>");
289 MODULE_DESCRIPTION("sma cpu5 watchdog driver");
290 MODULE_SUPPORTED_DEVICE("sma cpu5 watchdog");
291 MODULE_LICENSE("GPL");
292 MODULE_ALIAS_MISCDEV(WATCHDOG_MINOR);
294 module_param(port, int, 0);
295 MODULE_PARM_DESC(port, "base address of watchdog card, default is 0x91");
297 module_param(verbose, int, 0);
298 MODULE_PARM_DESC(verbose, "be verbose, default is 0 (no)");
300 module_param(ticks, int, 0);
301 MODULE_PARM_DESC(ticks, "count down ticks, default is 10000");