2 * (C) Copyright 2003-2004
3 * Humboldt Solutions Ltd, adrian@humboldt.co.uk.
5 * This is a combined i2c adapter and algorithm driver for the
6 * MPC107/Tsi107 PowerPC northbridge and processors that include
7 * the same I2C unit (8240, 8245, 85xx).
11 * This file is licensed under the terms of the GNU General Public
12 * License version 2. This program is licensed "as is" without any
13 * warranty of any kind, whether express or implied.
16 #include <linux/config.h>
17 #include <linux/kernel.h>
18 #include <linux/module.h>
19 #include <linux/sched.h>
20 #include <linux/init.h>
21 #include <linux/pci.h>
24 #include <linux/i2c.h>
25 #include <linux/interrupt.h>
27 #define MPC_I2C_ADDR 0x00
28 #define MPC_I2C_FDR 0x04
29 #define MPC_I2C_CR 0x08
30 #define MPC_I2C_SR 0x0c
31 #define MPC_I2C_DR 0x10
32 #define MPC_I2C_DFSRR 0x14
33 #define MPC_I2C_REGION 0x20
52 struct ocp_def *ocpdef;
54 wait_queue_head_t queue;
55 struct i2c_adapter adap;
58 static __inline__ void writeccr(struct mpc_i2c *i2c, u32 x)
60 writeb(x, i2c->base + MPC_I2C_CR);
63 static irqreturn_t mpc_i2c_isr(int irq, void *dev_id, struct pt_regs *regs)
65 struct mpc_i2c *i2c = dev_id;
66 if (readb(i2c->base + MPC_I2C_SR) & CSR_MIF) {
67 /* Read again to allow register to stabilise */
68 i2c->interrupt = readb(i2c->base + MPC_I2C_SR);
69 writeb(0, i2c->base + MPC_I2C_SR);
70 wake_up_interruptible(&i2c->queue);
75 static int i2c_wait(struct mpc_i2c *i2c, unsigned timeout, int writing)
77 DECLARE_WAITQUEUE(wait, current);
78 unsigned long orig_jiffies = jiffies;
82 if (i2c->ocpdef->irq == OCP_IRQ_NA) {
83 while (!(readb(i2c->base + MPC_I2C_SR) & CSR_MIF)) {
85 if (time_after(jiffies, orig_jiffies + timeout)) {
86 pr_debug("I2C: timeout\n");
91 x = readb(i2c->base + MPC_I2C_SR);
92 writeb(0, i2c->base + MPC_I2C_SR);
94 add_wait_queue(&i2c->queue, &wait);
95 while (!(i2c->interrupt & CSR_MIF)) {
96 set_current_state(TASK_INTERRUPTIBLE);
97 if (signal_pending(current)) {
98 pr_debug("I2C: Interrupted\n");
102 if (time_after(jiffies, orig_jiffies + timeout)) {
103 pr_debug("I2C: timeout\n");
107 schedule_timeout(timeout);
109 current->state = TASK_RUNNING;
110 remove_wait_queue(&i2c->queue, &wait);
118 if (!(x & CSR_MCF)) {
119 pr_debug("I2C: unfinished\n");
124 pr_debug("I2C: MAL\n");
128 if (writing && (x & CSR_RXAK)) {
129 pr_debug("I2C: No RXAK\n");
131 writeccr(i2c, CCR_MEN);
137 static void mpc_i2c_setclock(struct mpc_i2c *i2c)
139 struct ocp_fs_i2c_data *i2c_data = i2c->ocpdef->additions;
140 /* Set clock and filters */
141 if (i2c_data && (i2c_data->flags & FS_I2C_SEPARATE_DFSRR)) {
142 writeb(0x31, i2c->base + MPC_I2C_FDR);
143 writeb(0x10, i2c->base + MPC_I2C_DFSRR);
144 } else if (i2c_data && (i2c_data->flags & FS_I2C_CLOCK_5200))
145 writeb(0x3f, i2c->base + MPC_I2C_FDR);
147 writel(0x1031, i2c->base + MPC_I2C_FDR);
150 static void mpc_i2c_start(struct mpc_i2c *i2c)
152 /* Clear arbitration */
153 writeb(0, i2c->base + MPC_I2C_SR);
155 writeccr(i2c, CCR_MEN);
158 static void mpc_i2c_stop(struct mpc_i2c *i2c)
160 writeccr(i2c, CCR_MEN);
163 static int mpc_write(struct mpc_i2c *i2c, int target,
164 const u8 * data, int length, int restart)
167 unsigned timeout = HZ;
168 u32 flags = restart ? CCR_RSTA : 0;
172 writeccr(i2c, CCR_MEN);
173 /* Start as master */
174 writeccr(i2c, CCR_MIEN | CCR_MEN | CCR_MSTA | CCR_MTX | flags);
175 /* Write target byte */
176 writeb((target << 1), i2c->base + MPC_I2C_DR);
178 if (i2c_wait(i2c, timeout, 1) < 0)
181 for (i = 0; i < length; i++) {
182 /* Write data byte */
183 writeb(data[i], i2c->base + MPC_I2C_DR);
185 if (i2c_wait(i2c, timeout, 1) < 0)
192 static int mpc_read(struct mpc_i2c *i2c, int target,
193 u8 * data, int length, int restart)
195 unsigned timeout = HZ;
197 u32 flags = restart ? CCR_RSTA : 0;
201 writeccr(i2c, CCR_MEN);
202 /* Switch to read - restart */
203 writeccr(i2c, CCR_MIEN | CCR_MEN | CCR_MSTA | CCR_MTX | flags);
204 /* Write target address byte - this time with the read flag set */
205 writeb((target << 1) | 1, i2c->base + MPC_I2C_DR);
207 if (i2c_wait(i2c, timeout, 1) < 0)
212 writeccr(i2c, CCR_MIEN | CCR_MEN | CCR_MSTA | CCR_TXAK);
214 writeccr(i2c, CCR_MIEN | CCR_MEN | CCR_MSTA);
216 readb(i2c->base + MPC_I2C_DR);
219 for (i = 0; i < length; i++) {
220 if (i2c_wait(i2c, timeout, 0) < 0)
223 /* Generate txack on next to last byte */
225 writeccr(i2c, CCR_MIEN | CCR_MEN | CCR_MSTA | CCR_TXAK);
226 /* Generate stop on last byte */
228 writeccr(i2c, CCR_MIEN | CCR_MEN | CCR_TXAK);
229 data[i] = readb(i2c->base + MPC_I2C_DR);
235 static int mpc_xfer(struct i2c_adapter *adap, struct i2c_msg msgs[], int num)
237 struct i2c_msg *pmsg;
240 unsigned long orig_jiffies = jiffies;
241 struct mpc_i2c *i2c = i2c_get_adapdata(adap);
245 /* Allow bus up to 1s to become not busy */
246 while (readb(i2c->base + MPC_I2C_SR) & CSR_MBB) {
247 if (signal_pending(current)) {
248 pr_debug("I2C: Interrupted\n");
251 if (time_after(jiffies, orig_jiffies + HZ)) {
252 pr_debug("I2C: timeout\n");
258 for (i = 0; ret >= 0 && i < num; i++) {
260 pr_debug("Doing %s %d bytes to 0x%02x - %d of %d messages\n",
261 pmsg->flags & I2C_M_RD ? "read" : "write",
262 pmsg->len, pmsg->addr, i + 1, num);
263 if (pmsg->flags & I2C_M_RD)
265 mpc_read(i2c, pmsg->addr, pmsg->buf, pmsg->len, i);
268 mpc_write(i2c, pmsg->addr, pmsg->buf, pmsg->len, i);
271 return (ret < 0) ? ret : num;
274 static u32 mpc_functionality(struct i2c_adapter *adap)
276 return I2C_FUNC_I2C | I2C_FUNC_SMBUS_EMUL;
279 static struct i2c_algorithm mpc_algo = {
280 .name = "MPC algorithm",
281 .id = I2C_ALGO_MPC107,
282 .master_xfer = mpc_xfer,
283 .functionality = mpc_functionality,
286 static struct i2c_adapter mpc_ops = {
287 .owner = THIS_MODULE,
288 .name = "MPC adapter",
289 .id = I2C_ALGO_MPC107 | I2C_HW_MPC107,
291 .class = I2C_CLASS_HWMON,
296 static int __devinit mpc_i2c_probe(struct ocp_device *ocp)
301 if (!(i2c = kmalloc(sizeof(*i2c), GFP_KERNEL))) {
304 i2c->ocpdef = ocp->def;
305 init_waitqueue_head(&i2c->queue);
307 if (!request_mem_region(ocp->def->paddr, MPC_I2C_REGION, "i2c-mpc")) {
308 printk(KERN_ERR "i2c-mpc - resource unavailable\n");
312 i2c->base = ioremap(ocp->def->paddr, MPC_I2C_REGION);
315 printk(KERN_ERR "i2c-mpc - failed to map controller\n");
320 if (ocp->def->irq != OCP_IRQ_NA)
321 if ((result = request_irq(ocp->def->irq, mpc_i2c_isr,
322 0, "i2c-mpc", i2c)) < 0) {
324 "i2c-mpc - failed to attach interrupt\n");
329 i2c_set_adapdata(&i2c->adap, i2c);
330 if ((result = i2c_add_adapter(&i2c->adap)) < 0) {
331 printk(KERN_ERR "i2c-mpc - failed to add adapter\n");
335 mpc_i2c_setclock(i2c);
336 ocp_set_drvdata(ocp, i2c);
340 if (ocp->def->irq != OCP_IRQ_NA)
341 free_irq(ocp->def->irq, 0);
345 release_mem_region(ocp->def->paddr, MPC_I2C_REGION);
349 static void __devexit mpc_i2c_remove(struct ocp_device *ocp)
351 struct mpc_i2c *i2c = ocp_get_drvdata(ocp);
352 ocp_set_drvdata(ocp, NULL);
353 i2c_del_adapter(&i2c->adap);
355 if (ocp->def->irq != OCP_IRQ_NA)
356 free_irq(i2c->ocpdef->irq, i2c);
358 release_mem_region(i2c->ocpdef->paddr, MPC_I2C_REGION);
362 static struct ocp_device_id mpc_iic_ids[] __devinitdata = {
363 {.vendor = OCP_VENDOR_FREESCALE,.function = OCP_FUNC_IIC},
364 {.vendor = OCP_VENDOR_INVALID}
367 MODULE_DEVICE_TABLE(ocp, mpc_iic_ids);
369 static struct ocp_driver mpc_iic_driver = {
371 .id_table = mpc_iic_ids,
372 .probe = mpc_i2c_probe,
373 .remove = __devexit_p(mpc_i2c_remove)
376 static int __init iic_init(void)
378 return ocp_register_driver(&mpc_iic_driver);
381 static void __exit iic_exit(void)
383 ocp_unregister_driver(&mpc_iic_driver);
386 module_init(iic_init);
387 module_exit(iic_exit);
389 MODULE_AUTHOR("Adrian Cox <adrian@humboldt.co.uk>");
391 ("I2C-Bus adapter for MPC107 bridge and MPC824x/85xx/52xx processors");
392 MODULE_LICENSE("GPL");