2 * (C) Copyright 2003-2004
3 * Humboldt Solutions Ltd, adrian@humboldt.co.uk.
5 * This is a combined i2c adapter and algorithm driver for the
6 * MPC107/Tsi107 PowerPC northbridge and processors that include
7 * the same I2C unit (8240, 8245, 85xx).
11 * This file is licensed under the terms of the GNU General Public
12 * License version 2. This program is licensed "as is" without any
13 * warranty of any kind, whether express or implied.
16 #include <linux/config.h>
17 #include <linux/kernel.h>
18 #include <linux/module.h>
19 #include <linux/sched.h>
20 #include <linux/init.h>
21 #include <linux/pci.h>
24 #include <linux/i2c.h>
25 #include <linux/interrupt.h>
26 #include <linux/delay.h>
28 #define MPC_I2C_ADDR 0x00
29 #define MPC_I2C_FDR 0x04
30 #define MPC_I2C_CR 0x08
31 #define MPC_I2C_SR 0x0c
32 #define MPC_I2C_DR 0x10
33 #define MPC_I2C_DFSRR 0x14
34 #define MPC_I2C_REGION 0x20
53 struct ocp_def *ocpdef;
55 wait_queue_head_t queue;
56 struct i2c_adapter adap;
59 static __inline__ void writeccr(struct mpc_i2c *i2c, u32 x)
61 writeb(x, i2c->base + MPC_I2C_CR);
64 static irqreturn_t mpc_i2c_isr(int irq, void *dev_id, struct pt_regs *regs)
66 struct mpc_i2c *i2c = dev_id;
67 if (readb(i2c->base + MPC_I2C_SR) & CSR_MIF) {
68 /* Read again to allow register to stabilise */
69 i2c->interrupt = readb(i2c->base + MPC_I2C_SR);
70 writeb(0, i2c->base + MPC_I2C_SR);
71 wake_up_interruptible(&i2c->queue);
76 static int i2c_wait(struct mpc_i2c *i2c, unsigned timeout, int writing)
78 DECLARE_WAITQUEUE(wait, current);
79 unsigned long orig_jiffies = jiffies;
83 if (i2c->ocpdef->irq == OCP_IRQ_NA) {
84 while (!(readb(i2c->base + MPC_I2C_SR) & CSR_MIF)) {
86 if (time_after(jiffies, orig_jiffies + timeout)) {
87 pr_debug("I2C: timeout\n");
92 x = readb(i2c->base + MPC_I2C_SR);
93 writeb(0, i2c->base + MPC_I2C_SR);
95 set_current_state(TASK_INTERRUPTIBLE);
96 add_wait_queue(&i2c->queue, &wait);
97 while (!(i2c->interrupt & CSR_MIF)) {
98 if (signal_pending(current)) {
99 pr_debug("I2C: Interrupted\n");
103 if (time_after(jiffies, orig_jiffies + timeout)) {
104 pr_debug("I2C: timeout\n");
108 msleep_interruptible(jiffies_to_msecs(timeout));
110 set_current_state(TASK_RUNNING);
111 remove_wait_queue(&i2c->queue, &wait);
119 if (!(x & CSR_MCF)) {
120 pr_debug("I2C: unfinished\n");
125 pr_debug("I2C: MAL\n");
129 if (writing && (x & CSR_RXAK)) {
130 pr_debug("I2C: No RXAK\n");
132 writeccr(i2c, CCR_MEN);
138 static void mpc_i2c_setclock(struct mpc_i2c *i2c)
140 struct ocp_fs_i2c_data *i2c_data = i2c->ocpdef->additions;
141 /* Set clock and filters */
142 if (i2c_data && (i2c_data->flags & FS_I2C_SEPARATE_DFSRR)) {
143 writeb(0x31, i2c->base + MPC_I2C_FDR);
144 writeb(0x10, i2c->base + MPC_I2C_DFSRR);
145 } else if (i2c_data && (i2c_data->flags & FS_I2C_CLOCK_5200))
146 writeb(0x3f, i2c->base + MPC_I2C_FDR);
148 writel(0x1031, i2c->base + MPC_I2C_FDR);
151 static void mpc_i2c_start(struct mpc_i2c *i2c)
153 /* Clear arbitration */
154 writeb(0, i2c->base + MPC_I2C_SR);
156 writeccr(i2c, CCR_MEN);
159 static void mpc_i2c_stop(struct mpc_i2c *i2c)
161 writeccr(i2c, CCR_MEN);
164 static int mpc_write(struct mpc_i2c *i2c, int target,
165 const u8 * data, int length, int restart)
168 unsigned timeout = HZ;
169 u32 flags = restart ? CCR_RSTA : 0;
173 writeccr(i2c, CCR_MEN);
174 /* Start as master */
175 writeccr(i2c, CCR_MIEN | CCR_MEN | CCR_MSTA | CCR_MTX | flags);
176 /* Write target byte */
177 writeb((target << 1), i2c->base + MPC_I2C_DR);
179 if (i2c_wait(i2c, timeout, 1) < 0)
182 for (i = 0; i < length; i++) {
183 /* Write data byte */
184 writeb(data[i], i2c->base + MPC_I2C_DR);
186 if (i2c_wait(i2c, timeout, 1) < 0)
193 static int mpc_read(struct mpc_i2c *i2c, int target,
194 u8 * data, int length, int restart)
196 unsigned timeout = HZ;
198 u32 flags = restart ? CCR_RSTA : 0;
202 writeccr(i2c, CCR_MEN);
203 /* Switch to read - restart */
204 writeccr(i2c, CCR_MIEN | CCR_MEN | CCR_MSTA | CCR_MTX | flags);
205 /* Write target address byte - this time with the read flag set */
206 writeb((target << 1) | 1, i2c->base + MPC_I2C_DR);
208 if (i2c_wait(i2c, timeout, 1) < 0)
213 writeccr(i2c, CCR_MIEN | CCR_MEN | CCR_MSTA | CCR_TXAK);
215 writeccr(i2c, CCR_MIEN | CCR_MEN | CCR_MSTA);
217 readb(i2c->base + MPC_I2C_DR);
220 for (i = 0; i < length; i++) {
221 if (i2c_wait(i2c, timeout, 0) < 0)
224 /* Generate txack on next to last byte */
226 writeccr(i2c, CCR_MIEN | CCR_MEN | CCR_MSTA | CCR_TXAK);
227 /* Generate stop on last byte */
229 writeccr(i2c, CCR_MIEN | CCR_MEN | CCR_TXAK);
230 data[i] = readb(i2c->base + MPC_I2C_DR);
236 static int mpc_xfer(struct i2c_adapter *adap, struct i2c_msg msgs[], int num)
238 struct i2c_msg *pmsg;
241 unsigned long orig_jiffies = jiffies;
242 struct mpc_i2c *i2c = i2c_get_adapdata(adap);
246 /* Allow bus up to 1s to become not busy */
247 while (readb(i2c->base + MPC_I2C_SR) & CSR_MBB) {
248 if (signal_pending(current)) {
249 pr_debug("I2C: Interrupted\n");
252 if (time_after(jiffies, orig_jiffies + HZ)) {
253 pr_debug("I2C: timeout\n");
259 for (i = 0; ret >= 0 && i < num; i++) {
261 pr_debug("Doing %s %d bytes to 0x%02x - %d of %d messages\n",
262 pmsg->flags & I2C_M_RD ? "read" : "write",
263 pmsg->len, pmsg->addr, i + 1, num);
264 if (pmsg->flags & I2C_M_RD)
266 mpc_read(i2c, pmsg->addr, pmsg->buf, pmsg->len, i);
269 mpc_write(i2c, pmsg->addr, pmsg->buf, pmsg->len, i);
272 return (ret < 0) ? ret : num;
275 static u32 mpc_functionality(struct i2c_adapter *adap)
277 return I2C_FUNC_I2C | I2C_FUNC_SMBUS_EMUL;
280 static struct i2c_algorithm mpc_algo = {
281 .name = "MPC algorithm",
282 .id = I2C_ALGO_MPC107,
283 .master_xfer = mpc_xfer,
284 .functionality = mpc_functionality,
287 static struct i2c_adapter mpc_ops = {
288 .owner = THIS_MODULE,
289 .name = "MPC adapter",
290 .id = I2C_ALGO_MPC107 | I2C_HW_MPC107,
292 .class = I2C_CLASS_HWMON,
297 static int __devinit mpc_i2c_probe(struct ocp_device *ocp)
302 if (!(i2c = kmalloc(sizeof(*i2c), GFP_KERNEL))) {
305 i2c->ocpdef = ocp->def;
306 init_waitqueue_head(&i2c->queue);
308 if (!request_mem_region(ocp->def->paddr, MPC_I2C_REGION, "i2c-mpc")) {
309 printk(KERN_ERR "i2c-mpc - resource unavailable\n");
313 i2c->base = ioremap(ocp->def->paddr, MPC_I2C_REGION);
316 printk(KERN_ERR "i2c-mpc - failed to map controller\n");
321 if (ocp->def->irq != OCP_IRQ_NA)
322 if ((result = request_irq(ocp->def->irq, mpc_i2c_isr,
323 0, "i2c-mpc", i2c)) < 0) {
325 "i2c-mpc - failed to attach interrupt\n");
330 i2c_set_adapdata(&i2c->adap, i2c);
331 if ((result = i2c_add_adapter(&i2c->adap)) < 0) {
332 printk(KERN_ERR "i2c-mpc - failed to add adapter\n");
336 mpc_i2c_setclock(i2c);
337 ocp_set_drvdata(ocp, i2c);
341 if (ocp->def->irq != OCP_IRQ_NA)
342 free_irq(ocp->def->irq, 0);
346 release_mem_region(ocp->def->paddr, MPC_I2C_REGION);
350 static void __devexit mpc_i2c_remove(struct ocp_device *ocp)
352 struct mpc_i2c *i2c = ocp_get_drvdata(ocp);
353 ocp_set_drvdata(ocp, NULL);
354 i2c_del_adapter(&i2c->adap);
356 if (ocp->def->irq != OCP_IRQ_NA)
357 free_irq(i2c->ocpdef->irq, i2c);
359 release_mem_region(i2c->ocpdef->paddr, MPC_I2C_REGION);
363 static struct ocp_device_id mpc_iic_ids[] __devinitdata = {
364 {.vendor = OCP_VENDOR_FREESCALE,.function = OCP_FUNC_IIC},
365 {.vendor = OCP_VENDOR_INVALID}
368 MODULE_DEVICE_TABLE(ocp, mpc_iic_ids);
370 static struct ocp_driver mpc_iic_driver = {
372 .id_table = mpc_iic_ids,
373 .probe = mpc_i2c_probe,
374 .remove = __devexit_p(mpc_i2c_remove)
377 static int __init iic_init(void)
379 return ocp_register_driver(&mpc_iic_driver);
382 static void __exit iic_exit(void)
384 ocp_unregister_driver(&mpc_iic_driver);
387 module_init(iic_init);
388 module_exit(iic_exit);
390 MODULE_AUTHOR("Adrian Cox <adrian@humboldt.co.uk>");
392 ("I2C-Bus adapter for MPC107 bridge and MPC824x/85xx/52xx processors");
393 MODULE_LICENSE("GPL");